Oleksij Rempel,
Thank you for your reply.
And which cable do you use?
BR,
J.
>
>
> Am 04.03.2013 17:57, schrieb jana1...@centrum.cz:
> > We need to use a JTAG with MIPS CPU and look for a solution.
> > Last year we tried openOCD version 5 but it had problems to bring a device
> > into halt s
We need to use a JTAG with MIPS CPU and look for a solution.
Last year we tried openOCD version 5 but it had problems to bring a device
into halt state.
These days we tried openOCD version 6 but still seems to be the same.
>From many attempts issuing HALT command, only very, very few were suc
As a newbie I study board.cfg configurations and find various addresses that
developers use
to change behaviour of the boards(of CPUs used with these boards).
Where can be those exact addresses found?
As an example at91rm9200-ek board.cfg,( that uses ARM920T CPU)
in this board.cfg there is
We are looking for a programmer that is able to make a OpenOCD board.cfg
for a particular board, according to our needs.
If anyone is interested here, please provide an email or similar contact so
that we would
inform you about details.
Thanks
J.
---
Stefan,
you say
"I would check the datasheet. :) "
but I think that addresses depend on the design of each device,
in other words in different devices the same electronic part( flash, BIOS, DDR)
can have a diferent memory ranges.
Or am I wrong?
BR,
Jan.
>
> > And is there any way how to find
Stefan,
Thank you for your reply.
And is there any way how to find out the address range?
I mean how to find out which address range was assigned to BIOS and which to
SDRAM
and FLASH?
There is NAND flash ( in the device) that also must have address range
I tried
cat /proc/mtd
linux command
Stefan,
Thank you for your reply.
> If you can connect the MIPS CPU with OpenOCD, your CPU is most probably
> OK. You can read/write registers or talk to integrated peripherals.
Do you mean if I read ONLY CPU Chip ID , the CPU is most probably
OK?
> To check SDRAM, initialize your SDRAM control
> > I would like to use openocd for my project but not sure if it is
> > useful for me to learn it.
>
> What are you doing, on what hardware and what _other_ possibilities
> do you have?
>
> > What do YOU use openOCD for?
>
> Debugging embedded applications where the environment does not
> alr
Hi guys,
I would like to use openocd for my project but not sure if it is useful for me
to learn it.
What do YOU use openOCD for?
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Thank you ALL for the replies.
No, I have NOT initialized the SDRAM controller?
How can I do that?
Or where can I find out more details or any samples/tutorials?
Thanks
> On Tue, 03 Apr 2012 08:23:42 +0200
> jana1...@centrum.cz wrote:
>
> > In my a Linux based device there are CPU( yes, it is
Hi,
In my a Linux based device there are CPU( yes, it is MIPS) and BIOS and SDRAM modules.
If I have BIOS chip in that device, I can easily write to SDRAM and I read the same value I
wrote.
But if I remove BIOS I can not read the same values that should have been written.
(
Hi
I tried recently to use OpenOCD with BCM7401, but not with a big success.
E.g. I could not make easily BCM7401 enter a debug mode.
IMHO, OpenOCD
is still not mature enough for using with MIPS
such as Broadcom processors.
Most users here are those who work with ARM so not a big development for
I checked datasheet and it says that
TRST has INTERNAL pull DOWN resistor
TMS has INTERNAL pull UP resistor
TCK has INTERNAL pull UP resistor
TDI has INTERNAL pull UP resistor
and TDO requires EXTERNAL pull UP.
But when I checked the design of that device(using the processor) , an
ex
Thank you for your reply.
I noticed that the CPU has also
EJTAG_CE0 and EJTAG_CE1 pins.
These pins are used to select between JTAG and
EJTAG functions.
There 3 working modes
1.
Normal EJTAG operation - default
2.
Internal test only
Is it usual that a CPU manufacturer disable JTAG?
I read about that and now I have a device that
reports all zeros
like this
Info : clock speed 500 kHz
Error: JTAG scan chain interrogation failed: all zeroes
Error: Check JTAG interface, timings, target power, etc.
I tried 2 pcs of the same devi
Alex,
Thank you for your reply.
I bought JTAGKey to use it with my laptop, using USB port.
As a software I wanted to use OpenOCD but it does not work properly for my
needs(MIPS
CPU).
So I use a different program that uses wiggler cable( interface) .But it must
be used with a
PC that has parale
Thank you for your reply.
But I would like to know
where I can see how OpenOCD communicate with interfaces, particular with
jtagkey
interface.Which modules /programs of OpenOCD takes care of that ?
In other words what programs must I write so that jtagkey will work also with
MY OWN jtag
progra
I can use openOCD with my JTAG that is jtagkey like this
c:/openocd/bin/openocd.exe -f interface/jtagkey.cfg -f
target/myConfiguration.cfg
Is there any way how I can use my JTAG, that is jtagkey, with another jtag
programs and not
only with openOCD?
Where can I check how OpenOCD communicate
Drasko ,
Thank you for your reply.
> Yes and no.
> mwh stands for "memory write half (word)", i.e.16 bits, i.e. 2 bytes (not 4
> as you mentioned).
do you mean mwh should display 4 characters because each character are 4
bits?
Is it so?
>
> Did you suceed to halt your processor ? If yes, how
My embeded system with MIPS CPU uses 4 modules of SDRAM module with 16 bits
of
data bus.
(Each module has 64MB, that is the configuration is 32Mx16=512Mb, that is the
whole SDRAM is
256MB)
I want to write some data to SDRAM via JTAG.
Is my thinking correct saying that
mwh 0x123456 0xac23
Hi,
further to my previous emails, I am sending some more info
Here is a log after I changed the speed
to 500kHz, as Spen suggested
C:\openocd-0.6.0-dev-111231122355\bin>openocd.exe -f interface/jtagkey.cfg
-f ta
rget/bcm7401.cfg
Open On-Chip Debugger 0.6.0-dev-00308-g7e22576 (2011-12
I tried to halt the CPU with halt command.
It failed but the debug shows
#
Debug: 40 13610 command.c:151 script_debug(): command - ocd_command ocd_command
type ocd_halt
Debug: 41 13625 command.c:151 script_debug(): command - halt ocd_halt
Debug: 43 13625 target.c:2354 handle_halt_command(
I try to read a RAM with this command
$target_name mdw addr [count]
but I receive
##
Warn : target not halted
Runtime Error: embedded:startup.tcl:20: error reading target @ 0x0100
in procedure 'script'
at file "embedded:startup.tcl", line 58
in procedure 'bcm7401.cpu' called at fil
I use a clone of Amontec JtagKey.It has
a pin marked nTRST and a pin nSRST
Which one should I use with Amontec JtagKey interface?
nTRST or nSRST?
I think nTRST
but when I try, I get the error.
Error: JTAG scan chain interrogation faile
Hi,
Can anyone suggest a good way how to start using OpenOCD?
I have USB Jtag adaptor ( using FTDI ) and I want to use it with WindowsXP.
My first task is to read IDCODE,IMPCODE and bring the target( that is MIPS CPU)
into
debug mode
Thanks for help
> > says:
> > The following logic shamelessly cloned from HairyDairyMaid's wrt54g_debrick
> > * to support the Broadcom BCM5352 SoC in the Linksys WRT54GL wireless
> > router
> > * (and any others that support EJTAG DMA transfers).
> [snip]
> > How was found out (it is nescessary) to use that bi
I browsed a source codes of OpenOCD and would like to ask any
experts
A file
mips32_dmaacc.c
says:
The following logic shamelessly cloned from HairyDairyMaid's wrt54g_debrick
* to support the Broadcom BCM5352 SoC in the Linksys WRT54GL wireless router
* (and any others that support EJTAG DMA
Is there any tutorial how to use OpenOCD with MIPS?
I would like to use OpenOCD with a MIPS CPU that has
EJTAG Implementation flags: R4k MIPS16 MIPS32
Thanks
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Hi,
can anyone correct my understanding( if I am wrong) of the following function?
This function should bring MIPS processor into debug mode .
It sets bit 3 of
EJTAG_INST_CONTROL register.
> int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
> {
Drasko ,
Thank you for your reply.
> and where can I find out mips_ejtag_enter_debug() function?
I meant in source code, where I can find out that
mips_ejtag_enter_debug() function.
>
> Find a EJTAG manual. It is a first hit on a Google. In Table 6-9 EJTAG
>
I can read IDCODE, IMPCODE as well.
But can not make the CPU enter debug state
> On Thu, Feb 09, 2012 at 02:40:21PM +0100, jana1...@centrum.cz wrote:
> > Hi,
> > Thank you for your reply.
> > MIPS CPU is Broadcom BCM 7401.
> > I tested it further and found out that if HALT state,
> > SDRAM provi
Hi,
Thank you for your reply.
MIPS CPU is Broadcom BCM 7401.
I tested it further and found out that if HALT state,
SDRAM provides only 0s( zeros).
I think it is logical, because the internal processor system bus clock
was stopped and SDRAM is not refreshed.
Or am I wrong?
I think DEBUG state wo
I need to read data, from SDRAM of my device, via JTAG.
Must I make my device enter Debug state or only Halt state?
Or none is nescessary?
Thanks
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Cloud comput
Which EJTAG Control Register Fields must be set so that a processor will enter
the debug
mode?
I tried the following fields of the EJTAG Control Register
PrAcc( bit 18)
ProbEn( bit 15)
ProbTrap( bit 14)
and
EjtagBrk( bit 12)
but without success.
I used a code like this
...
set_instr(INST
I started developing my own JTAG program for my particular needs( my MIPS CPU)
It works OK for IDCODE and IMPCODE instructions. In other words my program
works well
for those instructions that does not need any input data ( no need to change
bits in EJTAG
registers).
But it does not seem to w
Hi
> >
>
> I think he is referring to ejtag rather than the jtag - ejtag is a
> mips extension to the jtag std.
Exactly. My CPU ( I need to use JTAG with) is of EJTAG 2.0 spec.
And I read there is a Memory Protection bit that must be cleared before I can
write any data
to memory via JTAG.
Is
When I want to write to flash/RAM, via JTAG, must be the CPU halted first?
Thanks
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I try to write some data to a system using JTAG but without any success.
I can read the data, but the data is not written to a given address.
The CPU uses JTAG 2.0
Must I clear memory protection bit first?
Thanks
P.S.
Is there JTAG 2.0 specification available? I found out 2.6 and higher only
Is there EJTAG 2.0 ( or lower) version specification available anywhere?
Thanks
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I looked carefully at /var/log/messages but could not see that.
I can not find out the physical ranges for the SDRAM.
> Hey, most distributions now show pretty picture when booting and not such
> useless information :-(
It may be useless for some( most ) users but definitely not for all.
I need t
I have a Linux embeded device that consists
CPU, BIOS,FLASH and SDRAM.
Is there any way how to determine the memory address range for BIOS, flash and SDRAM?
(BIOS is 4Mb,Flash 64MB and SDRAM( 4 modules ) has 256MB).
I would like to write some data to flash and
I would like to debug
MIPS embedded system via JTAG.
Which software for the debugging would you recommend?
Thanks
L.
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Does openOCD support EJTAG 2.0 standards?
Thanks
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So I found out TCK,TMS,TDO,TDI and RST signals on the JTAG connector on my PCB.
The datasheet for the BCM7401 says the values for these are 3.3V.
But I can not find
Vcc/Vref on JTAG.
Where should lead that Vcc/Vref from that JTAG connector on PCB? Directly to
CPU?
And wha
Hi , Peter ,
Thank you for your reply.
I checked the website http://www.versaloon.com/
But which model shall I buy?
My JTAG on PCB is 14pins, and TCK,TMS,TDO,TDI and RST has 3.3V , datasheet says
Thank you for the reply
> jana1...@centrum.cz wrote:
> > No I have not tried it yet.
>
> Try it o
Thanks for the reply.
No I have not tried it yet.
I did not know that BCM7401 should be supported.It is not listed among the
supported CPU
list.
And is there a recommended hardware schematic of jtag cable for this CPU
(mips32) ?
(So that I will eliminate hardware problem )
Thanks
> The BCM740
Hi ,
I need a jtag that can work with Broadcom CPU model BCM7401.
BCM7401 is a kind of BMIPS3300 processors.
Does anyone know if OpenOCD works with that kind of CPUs?
Or what must be changed in the code of OpenOCD so that OpenOCD will work as
jtag with
that kind of CPUs too.?
Thank
> Hi,
>
I found out that BCM7401 is a kind of BMIPS3300 processors.
Does OpenOCD have a support for such processors?
Thanks
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Hi,can anyone help with a jtag for Broadcom CPU BCM7401?
Thanks
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Can OpenOCD work as JTAG for Broadcom CPU BCM7401?
Thanks for the reply
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