I have compiled the openocd from https://xpack.github.io/openocd/ (master
stream) and started working in both the boards.
so it appears that Rev V of stm32h753xi had issues with old openocd and
stmqpsi.
Thanks a lot for the support!!!
---
** [tickets:#290] QSPI debugging is not working
I have found one another difference between the working and non working boards.
In non working board has Rev V of stm32h753xi and whereas working board has Rev
Y of stm32h753xi. I have found some other observation found with respect to
Rev V stm32h7 micros from internet
Hope the latest Openonc
Attached cfg file herewith
Attachments:
-
[stm32h7_UI_QSPI1.cfg](https://sourceforge.net/p/openocd/tickets/_discuss/thread/4989434d46/570a/attachment/stm32h7_UI_QSPI1.cfg)
(4.1 kB; application/octet-stream)
---
** [tickets:#290] QSPI debugging is not working in some stm32h753 mcu**
**Statu
I took pre built binaries from http://openocd.org/getting-openocd/
When i ran the cfg file I'm getting error as follows "Error: Flash driver
'stmqspi'not found
Do i need to apply http://openocd.zylin.com/4321 patch. If yes, Kindly provide
the steps to apply the patch.
I have attached my cfg
How to build Openocd from git://git.code.sf.net/p/openocd/code . I have used
to build using build repo https://github.com/gnu-mcu-eclipse/openocd.git but i
am getting older version of openocd which doesnt support QSPI
Can you please provide the steps to build from
git://git.code.sf.net/p/op
I have replaced the flash chip in other board also, but no luck. it fails to
start the debug session.
When will be RDJDID send from Openocd? does it send once after memory mapped is
configured from cfg or before that?
Can i comment the validation of flash id in openocd source and allow to prog
Flash chips were from different batch. But i could able to read the flash ID
from STM32CubeProg from external loader.
Tried stmqspi cmd 2 3 0x9F it throws error
---
** [tickets:#290] QSPI debugging is not working in some stm32h753 mcu**
**Status:** new
**Milestone:** 0.10.0
**Created:** T
I have made below changes in the cfg file with that, the memory mode operation
works fine.
- Configured SPI CLK as 66MHZ to match Dummy cycles(6) for 0xEC
- Used 0xEC in memory mapped operation
Now i need to fix the issue with "stmqspi setparms".
I have attached latest cfg and error logs for
Yes. SPI clock is configured as 8MHZ.
I have corrected CCR setting for memory mapped by using 0xEC but it throws same
error.
I have commented out "setparms" to verify the memory mapped mode works but it
shows error as below
->Log:QSPI INIT
->Log:QSPI GPIO INIT
->Log:QSPI CLK INIT
->Log:EXTERNAL
Thanks for the quick response.
I am using two similar boards with same firmware. In that I'm able to debug
from one board but could not debug from other board and it throws below error.
Error: auto_probe failed
in procedure 'reset'
in procedure 'ocd_bouncer'
in procedure 'ocd_process_reset'
i
---
** [tickets:#290] QSPI debugging is not working in some stm32h753 mcu**
**Status:** new
**Milestone:** 0.10.0
**Created:** Thu Jan 07, 2021 10:44 AM UTC by shaalik
**Last Updated:** Thu Jan 07, 2021 10:44 AM UTC
**Owner:** nobody
Hi All,
i have two custom stm32H753XI + NOR QSPI flash (I
---
** [tickets:#221] Support for DTR in QSPI debugging**
**Status:** new
**Milestone:** 0.9.0
**Created:** Mon Jan 21, 2019 04:17 AM UTC by shaalik
**Last Updated:** Mon Jan 21, 2019 04:17 AM UTC
**Owner:** nobody
Hi,
We want to use Double Data Rate mode with qspi memory mapped mode while
Great. "stmqspi setparms" fixes our need. Thanks lot for your support.
---
** [tickets:#211] Enable break points on QSPI debugging + OpenOCD**
**Status:** new
**Milestone:** 0.9.0
**Created:** Thu Nov 29, 2018 07:45 AM UTC by shaalik
**Last Updated:** Tue Dec 11, 2018 05:27 PM UTC
**Owner:** n
We found some issue in .cfg file and fixed the issue. Now we are getting
following,
Warn : Unknown flash1 device id = 0x1a609d
Warn : FSIZE field in QSPI_DCR(1) doesn't match actual capacity.
Warn : Unknown flash1 device id = 0x1a609d
Warn : FSIZE field in QSPI_DCR(1) doesn't match actual capacit
Hi,
We are trying to erase and program the external flash using openocd before
debugging starts. We referred configuration files from
http://openocd.zylin.com/4321 and wrote the .cfg to program the external
flash(ISSI IS25LP512). But we are getting following errors in the console,
Info : Device
Adding 'mem' readonly in gdb enabled the Break point debugging. Thanks a lot
@Tom.
---
** [tickets:#211] Enable break points on QSPI debugging + OpenOCD**
**Status:** new
**Milestone:** 0.9.0
**Created:** Thu Nov 29, 2018 07:45 AM UTC by shaalik
**Last Updated:** Sun Dec 02, 2018 10:25 PM UTC
---
** [tickets:#211] Enable break points on QSPI debugging + OpenOCD**
**Status:** new
**Milestone:** 0.9.0
**Created:** Thu Nov 29, 2018 07:45 AM UTC by shaalik
**Last Updated:** Thu Nov 29, 2018 07:45 AM UTC
**Owner:** nobody
Hi,
We were able to debug from QSPI NOR flash on custom stm32H
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