the
debugger ..
Cheers,
Bernie
On Mon, Feb 14, 2011 at 5:00 PM, Andrew Leech coronasen...@gmail.comwrote:
On Mon, Feb 14, 2011 at 12:48 PM, Bernard Mentink bment...@gmail.com
wrote:
Hi All,
I apologize for posting a somewhat openocd off-topic question, but I am
in a
bind.
I have been using
I'm running:
Version: Helios Service Release 1
Build id: 20100917-0705
I highly suggest you update it, when I first tried the original Helios
it was so incredibly buggy I switched back to the previous release
until this update came out.
I have just updated it and re-installed cdt-master
Hi All,
I apologize for posting a somewhat openocd off-topic question, but I am in a
bind.
I have been using openocd and gdb from within eclipse quite happily, until I
duplicated a project to start a new one, and tried debugging it.
When gdb launches from within eclipse, I get a windoze crash
@Laurent:
For now, if you want to speed up your OpenOCD , build OpenOCD with d2xx driver
:-) !
Tried that on windows ... Makes no difference, either driver gives the same
speed, the bottleneck is OpenOCD, on Linux I can't even get openocd to see the
adapter with the d2xx driver, I have to
I have got decent results in Helios using the GDB (DSF) Hardware
Debugging Launcher with the following, pretty straight-forward,
configuration.
Main tab:
Select project and binary as usual
Debugger tab:
GDB Command: arm-none-eabi-gdb
Check Use remote target
JTAG Device: OpenOCD (via pipe)
(GDB
path as well.
I will have a go at doing this different, so can run it as a pipe.
Cheers,
Bernie
But that's exactly what the event handlers in openocd.cfg does! Calling
reset init before and after gdb flashing.
Den 19 okt 2010 21.26, Bernard Mentink
bernard.ment...@trimble.co.nz skrev
Hi Andreas,
I have tried to do what you describe below.
I have setup my windows paths so that openocd (cygwin version) runs fine
in a normal console window .. That works.
I can now run openocd with the pipe option in eclipse.. I also have
modified my openocd.cfg file to include the
Hi again Andreas,
An update to this: The error below was because I had several instances
of gdb running, they were not closed off correctly in eclipse.
Now when I run it, the program downloades and I get to main correctly
However, when I hit continue, I end up in the g_pfnVectors() at
Bernard Mentink wrote:
A PC is USELESS for any kind of bitbanging or the like
Rubbish! The bottleneck is OpenOCD, A PC is more than capable to do
all the work necessary to support dumb (read simple) interface chips
like the FT2232,
I think you missed my point; even though the PC CPU
Hi there Freddie,
I have the same issue with an LPC1766 (ruunig at 100Mhz) ... I have my
JTAG set up for 6Mhz and can only flash at about 8..10kB/s, even slower
than you ..
Is this an OpenOCD issue? I also tried flashing an i.mx31 with external
flash, and that flashed at about the same rate, so
-Original Message-
From: Øyvind Harboe [mailto:oyvind.har...@zylin.com]
Sent: Tuesday, 19 October 2010 7:23 a.m.
To: Bernard Mentink
Cc: Freddie Chopin; openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] STM32 flash write speed
I measured ca. 100kBytes/s w/ZY1000
On 2010-10-18 20:54, Bernard Mentink wrote:
Well I have tried that, but I get this error from the GDB
(DSF)Hardware debugger plugin for Eclipse:
You need to select Standard GDB Hardware Debugging Launcher and
instead of load command - use the available options below Load Image
and Symbols
This test was caused by curiosity which started after reading one
forum post in which someone describes that in CrossWorks when using
the same JTAG he achieved almost 150kB/s, over 14x faster than OpenOCD.
Well, that's BS. The STM32 flash has a nominal programming time of 52.5µs per
16
, schrieb Bernard Mentink:
# LPC2000 LPC1700 - SRST causes TRST reset_config srst_pulls_trst
That does not work for me anymore since the Cortex-M3 reset handling
patch is in. Have you tried
reset_config srst_only?
target remote localhost:
Here must be a mon reset init. Otherwise, you'll have
October 2010 10:02 a.m.
To: Bernard Mentink
Cc: Jörg Fischer; openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] Problem getting reliable reset init on
LPC1766 target.
If I set to 20khz, I get perfect debugging no errors ..
I have found that the JTAG clock needs
--
Hiding the Truth with Political Correctness is the same as Lying ... BRM
-Original Message-
From: Øyvind Harboe [mailto:oyvind.har...@zylin.com]
Sent: Wednesday, 13 October 2010 10:31 a.m.
To: Bernard Mentink
Cc: Jörg Fischer; openocd-development
--
Hiding the Truth with Political Correctness is the same as Lying ... BRM
-Original Message-
From: Øyvind Harboe [mailto:oyvind.har...@zylin.com]
Sent: Wednesday, 13 October 2010 10:41 a.m.
To: Bernard Mentink
[mailto:oyvind.har...@zylin.com]
Sent: Wednesday, 13 October 2010 10:57 a.m.
To: Bernard Mentink
Cc: Jörg Fischer; openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] Problem getting reliable reset init on
LPC1766 target.
mon reset halt
Resetting turns the RC oscillator back
--
Hiding the Truth with Political Correctness is the same as Lying ... BRM
-Original Message-
From: Øyvind Harboe [mailto:oyvind.har...@zylin.com]
Sent: Wednesday, 13 October 2010 10:57 a.m.
To: Bernard
-development] Problem getting reliable reset init on
LPC1766 target.
Hi,
Am 12.10.2010 23:36, schrieb Bernard Mentink:
Yes, you are correct, I was looking at an old script that had it set to
500khz.
This work for me _reliable_ on a custom lpc1768 board:
adapter_khz 500
#delays on reset lines
Hi All,
I am using an FT2232D based debugger board with the Olimex LPC1766 STK
development board. I have compiled the latest OpenOCD and am running
it from Cygwin.
I also am running GDB from within eclipse(Zylin) ... although that is
irrelevant since the same error exists on the command
of IAP
commands, but the checksum is check only when flashing via UART.
Lubomir VALEK
Message: 3
Date: Tue, 12 Oct 2010 09:04:56 +1300
From: Bernard Mentink bernard.ment...@trimble.co.nz
To: openocd-development@lists.berlios.de
Subject: [Openocd-development] Problem getting reliable reset init
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