Hi, all.
I'm having a problem with an abstraction I've created to produce a shift
register at the audio rate.
Here's a picture of the patch and a help patch explaining how it works.
https://raw.githubusercontent.com/TricksterSam/Personal-Pure-Data-Development/main/shiftregister~.png
Also, here's
On Tue, 2022-02-22 at 17:08 -0500, Samuel Burt wrote:
>
>Is there some kind of delay introduced by [delwrite~] [delread~]
> even when the delay is set to 0ms?
Yes. 0 delay can only be achieved if the [delwrite~] is ordered before
the [delread~] in the DSP graph. In your case, since you send
After searching the list about 0 delay delwrites~, I was reminded that they
do indeed produce at least a one block delay. It seems send~ and receive~
do too. So, I set the abstraction to have [block 1] and that's fixed it.
Hope this message helps anyone. I'll upload a new version to Github later
fo
On 2/23/22 01:29, Samuel Burt wrote:
After searching the list about 0 delay delwrites~, I was reminded that they
do indeed produce at least a one block delay. It seems send~ and receive~
do too.
no.
check the documentation (3.audio.examples/G05.execution.order.pd; which
btw is also reference
