here's a topic i don't recall hearing discussed
for QFP (and other SMD) type packages what is the general preference
regarding the pads being rounded on the ends (as in Protel's ly-berries)
vs rectangular shape
i think this has both reflow and routing room implications
on many boards that i hav
Hi Brad,
Right. But these are very easy to spot visually. The reason for a
systematic approach is to find anything one might have missed on visual
inspection. I find the antenna problem a very annoying problem with Protel
and similarly (going back some years) PCAD and Tango. The genesis of th
Hi Dennis,
No, it isn't bad. It is absolutely essential to do visual scans of a PCB
layout. The idea of a system for eliminating antennas is to catch anything
one might have missed on inspection. Remember when all PCB designs were
done without computers? All checking was visual. One major ad
I do not want a "circular block in the center of the pad".
For this board using Via in Pad:
The board fabrication process drills a through hole through the board
and plates the holes (so far just like any other plated hole). Then they
plug the hole in the BGA pads using a process that leaves the
If I understand this, it still can't work. The paste-mask stencil has an
opening for the pad, and you want a circular block in the center of the
pad -- but there's nothing to support it.
> -Original Message-
> From: David W. Gulley
> Sent: Saturday, June 01, 2002 11:13 AM
>
> Richard Sum
Dennis,
"/" is not a valid signal name character in Verilog. It also is used as a
directory name separator, which could lead to problems in some cases.
If you don't want to use the same names in other tools or languages, then
you are more free. Certainly "/" works in Protel, as does "~". I'm n
thanks, that's the kind of info i was both looking for and hoping to
hear
Dennis Saputelli
Matt Pobursky wrote:
>
> On Sat, 01 Jun 2002 10:42:41 -0700, Dennis Saputelli wrote:
> >
> >does anyone have any production experience with surface mount
> >ceramic resonators with internal caps?
>
> Yep
boy that's some tight stuff, good luck! and keep us posted
Dennis Saputelli
"David W. Gulley" wrote:
>
> Dennis Saputelli wrote:
>
> > are you sure you don't want the bottom pads untented?
>
> > a recent customer specifically wanted the bottom via fanouts to be
> > untented for test probing
>
On Sat, 01 Jun 2002 10:42:41 -0700, Dennis Saputelli wrote:
>
>does anyone have any production experience with surface mount
>ceramic resonators with internal caps?
Yep, used many 10,000's (maybe 100,000's by now?) in quite a few
designs. I've had good luck with parts from Murata, AVX and ECS.
Mu
> 3) Lower case and underscore are accepted as parts of a name by most tools.
> On the other hand, both "*" and "-" are operators in many languages.
that was my fear, but what about the "/" as brian suggested i think i
like that one best
Dennis Saputelli
Joey Nelson wrote:
>
> Dennis,
>
> I'
Dennis Saputelli wrote:
> are you sure you don't want the bottom pads untented?
> a recent customer specifically wanted the bottom via fanouts to be
> untented for test probing
> (i realize yours are in pad)
> your via in pad only goes to the layer below, right?
>
> in my understanding this is
Dennis,
I've gone with the convention of RW_n for the following reasons:
1) Some tools (Protel Schematic -> PCB) loose case. Occasionally I'm left
thinking what the heck some NOBCLP or whatever signal is, especially bad
when the preceding N makes a meaningful word: nAP becomes NAP.
2) I do a f
Dennis Saputelli wrote:
> I know this has been widely discussed but ...
>
> re:
> pin naming on schematic symbols and the negation character thereof
>
> what was the consensus, or was there?
> i know the bar symbol is problematic and i have decided to never use it
> again
>
> i recall someone
Hi, Dennis;
I use, and have often seen used, the slash (/) for negation on
pin signal names as well as Net names. Seems to work OK.
eg: "/OUTPUT" for negative output.
Brian
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* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave th
Richard Sumner wrote:
> David,
>
> Talk to your assembler before you invest time in this. The paste mask
> becomes a metal stencil for applying the solder paste. So donuts will
> not work (the donut hole is unsupported).
Actually my idea was to make the width of the track greater than 2x the
I know this has been widely discussed but ...
re:
pin naming on schematic symbols and the negation character thereof
what was the consensus, or was there?
i know the bar symbol is problematic and i have decided to never use it
again
i recall someone advocating the use of "n" as in nRW
that does
are you sure you don't want the bottom pads untented?
a recent customer specifically wanted the bottom via fanouts to be
untented for test probing
(i realize yours are in pad)
your via in pad only goes to the layer below, right?
in my understanding this is the only way it can be small enough to n
does anyone have any production experience with surface mount ceramic
resonators with internal caps?
i remember looking into this several years ago and at that time i saw
two 'issues' (problems?):
the price was 2-3x thru hole parts
there were many admonitions on the data sheets re handling and p
David,
Talk to your assembler before you invest time in this. The paste mask
becomes a metal stencil for applying the solder paste. So donuts will not
work (the donut hole is unsupported). Big BGA's are a pain. If you could
only get the designer to use only the two outer rows ...
Richard
I am doing some via-in-pad BGAs and need to figure out if there is a
"good" way to provide the top solder and top paste masks while keeping
the bottom solder mask and bottom paste masks off.
I defined the BGA pads as multilayer since I am doing via-in-pad (sort
of like it was a PGA) except I d
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