-Original Message-
From: Bruce Walter [mailto:[EMAIL PROTECTED]
Sent: Tuesday, July 27, 2004 6:57 PM
To: Protel EDA Forum
Subject: Re: [PEDA] stopping second instance of 99SE
With regard to ExplorerPlus, I have, and like this product. Have been using
it (or something like it) ever
I have and like this product. Have been using it (or something like it) ever
since Norton File Manager circa Windows 3.0.
Most used functions: being able to see contents of ZIP files as if they were
sub-directories, using the viewer to see the contents of files without
opening them in another app
>From these screen captures, this seems to be what is happening.
There are two windows shown, the design explorer parent, and the
schematic/ddb child. Each has its own three buttons for minimize,
maximize/restore, and close.
In SCRN2, both are maximized, in SCRN1 the parent is maximized, but the
You have to look out for the auto-wrap on e-mails. If you look, the
remainder of the link got put on the next line. You have to copy and paste
each part onto the address line of your internet browser. This happens all
the time.
-Original Message-
From: John Williams [mailto:[EMAIL PROTE
Yes - he was willing to pay the price - if he had to.
But, the motivation was not that he wanted it, not that he needed it, but to
raise the price so others would no longer be able to win at a lower price,
and hope that someone would outbid him so he wouldn't have to pay.
-Original Message-
'Abd ul-Rahman Lomax' said:
"I placed a bid on that license even though I'm short of cash (I bid $2025)
simply because I couldn't stand to see it go for under $2,000. I'm trying to
sell an extra 99SE license for $4500! (OBO)."
I (and others may) still think that the attitude;
I see someone on
Seems to me you want the flying probes to check for conductivity on all ends
of each net, then check for opens (non-shorts) on all adjacent traces. The
list would be large, but finite and manageable
-Original Message-
From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, Se
I think I have also had loop removal remove teardrops from the net I am
working on. I haven't pursued detail as to the circumstances (it doesn't
happen that often), I just fix them.
-Original Message-
From: Robert M. Wolfe [mailto:[EMAIL PROTECTED]]
Sent: Thursday, September 05, 2002 6:3
Heck, I am still using P98, PCB only!
We have a P99SE license, but I have been unwilling to go through the learning
curve for PCB, much less use P99SE schematic vs. OrCAD 7.2!
That being the case, why would I want to spend ANY money on DXP, and get
trapped into annual maintenance?
Once again, s
As for W98 vs. W2K, I know W2K has better resources, and it was implied to me
that there is no actual limit - it is handled in a completely different way.
A typical environment is for me to have PowerDesk, Outlook 2K, 3x ie6, OrCAD
7.2, P98, Acrobat (not reader) with many large datasheets opened,
I am still running P98, and this will happen if I try to minimize Protel
before the splash disappears on its own.
I just wait the second or two for the splash to disappear before minimizing -
never had a problem.
* Tracking
To make things worse, what about all the poor people who bought Protel in the last
year, got the 'FREE' ATS for a year, but it will run out long before DXP has been
released for a year?
-Original Message-
From: Phillip Stevens [mailto:[EMAIL PROTECTED]]
Sent: Thursday, August 01, 2002 4
I came in on P98, and there were three service packs. I couldn't say before that.
-Original Message-
From: Rene Tschaggelar [mailto:[EMAIL PROTECTED]]
Sent: Thursday, August 01, 2002 12:04 PM
To: Protel EDA Forum
Subject: Re: [PEDA] DXP: Free updates?
AFAIR, 99SE was to first to have s
>forget ATS, you don't require it.
>we'll see what happens with future service packs.
>Whether ther are available for free or not.
(snip)
>Rene
I think it is very clear that in order to get service packs, you have to be a current
ATS subscriber. That is the whole point. I would hope that mo
At about the same time as JaMi, My employer bought a Dell system. It had the current
versions of included software when Dell accepted the release, including the
Intellimouse drivers that worked well for all the included software, most of which was
fairly recent - the new software was written t
: "Bruce Walter" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Wednesday, July 24, 2002 6:18 PM
Subject: Re: [PEDA] Auto-Pan patch Speaking of Protel Bugs.
Well, I tried this patch, I even had both your patch bars AND the Placement Tools and
PCBt
updates when there are no primitives.
-Original Message-
From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, July 24, 2002 1:33 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Auto-Pan patch Speaking of Protel Bugs.
>- Original Message -
>From: "Bruce Walt
It sounds like there was a problem with the Intellimouse driver - I had similar
problems with a similarly configured system of around the same vintage.
I however updated the drivers (as well as taking Protel out of the list of application
for the scroll wheel), and have had a very stable system
Where is there more detail about this fix?
I tried moving both my Placement Tools and PCBtoolbar box into my work area. I also
tried having my Windows Task Manager always on top in my work area. Each produced
little or no change.
Am I missing something, or is there detail somewhere else that
Could be simply a bad switch - they are mechanical, not perfect, and don't
last forever.
I have had similar experiences before, and was forced to replace the mouse,
as replacing the switch was un-realistic.
-Original Message-
From: Terry Creer [mailto:[EMAIL PROTECTED]]
Sent: Wednesday,
Is it possible that they somehow manage to get around the 64K resource
limits of Win98/SE/ME?
-Original Message-
From: Tony Karavidas [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, July 09, 2002 11:36 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Protel under Win4Lin (WAS OpenOffice & 3D CAD)
Anybody know if there would be a problem using a dash (minus sign) as a
prefix?
-Original Message-
From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, June 04, 2002 8:28 AM
To: Protel EDA Forum
Subject: Re: [PEDA] negation character redux
> We use "\". In PCAD you can type
As I recall, hidden pins get assigned a net that is the pin name. If all
parts have the same hidden pin name, they will be connected.
The original intent of hidden pins was to allow common power pins (VCC, VDD,
GND, etc.) to be connected while reducing schematic clutter.
Obviously, there are pr
I am also interested in this. What are the differences between LPI and wet?
We have had problems with soldermask getting thin on the sharp hole edge of
vias, allowing corrosion of the un-plated copper beneath. Another
indication of this thinness is some of the holes being filled during wave
sol
I wait until just after the splash disappears before minimizing Prottle.
-Original Message-
From: Mira [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, May 15, 2002 6:45 AM
To: Protel EDA Forum
Subject: [PEDA] startup window
Hi,
Normally i'm too patient when opening Protel but this
time I h
We used to do one - punch and return. Got a panel, stuffed, waved, then
just pop out. I didn't do the board, just saw the result.
-Original Message-
From: Jeff Stout [mailto:[EMAIL PROTECTED]]
Sent: Friday, May 10, 2002 2:55 PM
To: Protel EDA Forum
Subject: Re: [PEDA] round PCB?
I'm
I have made a 20 pin version that I have used successfully. You can scale
it easily.
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]]
Sent: Thursday, May 02, 2002 3:33 AM
To: proteledaforum
Subject: [PEDA] Footprint for Hirose Connectors
I am looking for a source (
It is OK to put vias under components - I do it all the time. To deny this
is unnecessary, and would produce huge routing constraints.
What you need to be aware of, is to not put vias so close to the pad that
solder is wicked away from the part pin during reflow. This is typically
accomplished
When you create an SMT part, all pads are set to top layer. Similarly,
silkscreen goes on top overlay.
When placing these components, changing the component layer to bottom, moves
the pads to bottom layer, silkscreen to bottom overlay, and mirrors both.
The effect being that SMT components on t
It was quite simple in these cases (including the original post) as there
was a net assigned, and so a rats nest going to that point.
Yes, if there is a no-net version, there would be little way of knowing
without some utility.
-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL
I just tried EDIT-DELETE, and drawing a track beginning at the virtual point
- highlight - delete, and they both worked if the begin-end points were
on-grid.
-Original Message-
From: Mark E Witherite [mailto:[EMAIL PROTECTED]]
Sent: Friday, February 08, 2002 6:14 AM
To: Protel EDA Forum
S
Seems to me that this somewhat defeats the purpose of the swapfile, and may
be less effective than eliminating the swapfile altogether with this much
RAM.
Unless there is a problem with the OS (despite warnings) not having any
swapfile defined. If this is the case, that the ramdisk is just a way
Que?
-Original Message-
From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, September 25, 2001 3:51 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Windows 2000
It's called the SBLive drivers.
Brian Guralnick
- Original Message -
From: "Colin Weber" <[EM
Sure, I can see the usefulness of this.
However, since free pads and vias are not ON any 'layer', having a mechanism
to distinguish between when you do, and when you don't want to include these
items.
Also, I would imagine that you might want to include SOME items, but not
others.
When I want t
This is no bug. This is Protel operating as it is designed.
If you turn off a layer, it is assumed that you do not want to manipulate
items on that layer!
So, by placing components on (in this case) the top layer, then turning off
the top layer, I would EXPECT it to not be selectable, in spite
Here is my take:
1206 parts are becoming harder to find and more expensive that 0805's due to
(in my understanding) the amount of expensive and rare materials used to
form the end contacts. The amounts in an 0805 are a fraction of what is
used in a 1206.
I am looking to the future when 0805's m
This is great!
This problem has been around since Protel 98. I always was careful to wait
until the splash goes away before minimizing - but this is better!
-Original Message-
From: Konrad Iten [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, July 17, 2001 11:37 AM
To: Protel EDA Forum
Subject
When I saw Ivan's initial request, I remembered using a small 10 pin package
made by Analog Devices recently.
I looked on the web, found the uMax package drawing, and compared it to the
footprint I had made for that part, and it seemed to be compatible.
I cannot now re-create where I got the dat
9 direct
Fax (604) 292-9010
website www.norsat.com
> -Original Message-
> From: Bruce Walter [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, July 12, 2001 4:54 PM
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] 20H rule, Planes etc (Ex: perimeter
> stitched ground
> vi as
My understanding of the 20H rule, was with regard to planes.
If the planes have noise fields between them (I don't know how this can be
avoided, regardless of component/trace/via placement), when the planes end
equally at the edge of the board, this makes a nice dipole antenna, and the
noise radi
It is unlikely that tying an input high or low makes much of a difference on
current consumption, with the exception of a uP with internal pull-ups
enabled. You have to look at what the input goes to. Spare gates -
probably no difference. uP pins, depends on if it changes the operation of
the c
What I have done for this is to create a 3 pin part (SCH and PBC) with an A
side and a B side. This should work fine.
-Original Message-
From: Afshin Salehi [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, March 28, 2001 4:21 PM
To: Protel EDA Forum
Subject: [PEDA] Overlapping Pads
Hello,
There are many reasons to terminate all un-used inputs - some already
stated.
Relate it to a un-plugged air hose on an automobile. It may have little or
no effect, but it may also cause serious problems or complete failure! Best
to plug the hose. In the case of a uP, it is perfectly acceptable
I think this will work...
Select all (E-S-A), then with a large grid (100 or more) move EVERYTHING up
enough to get to the offending items. Manipulate as necessary, then move
everything back. Using caution, assisted by the large grid when necessary,
will assist in getting the board back exactly
All good stuff... Glad to see a range of options.
After mulling over everyone's wisdom, I propose the most clear-cut easy
solution:
De-select all (X-A)
Select outside (E-S-O), then draw the box around your work to be un-affected
Move Selection (M-S), this allows you to move the selection (what
The thread on resizing fills got me thinking...
Here are some other mouse characteristics that can be handy to know.
To manipulate vias and tracks while maintaining connected track connections
(dragging endpoints), you click once to focus, click again to manipulate.
On vias there is not much you
I do a lot of double sided boards with ground planes on both sides, so I do
a lot of stitching - and here is how I do it:
Place a free pad off the board. Select, copy, paste, copy, paste, etc.
This replicates (doubles each time) the quantities each time until I have
about the number of 'stitches
I'm no expert, but here are my 2cents:
I'm not sure, but I recall that for a six layer board, the center two layers
are on either side of the 'core' material, which is the thickest part of the
sandwich (~=30mil?). This is the most popular (and most appropriate) place
for the power and ground pla
I do a lot of double sided boards with ground planes on both sides, so I do
a lot of stitching - and here is how I do it:
Place a free pad off the board. Select, copy, paste, copy, paste, etc.
This replicates (doubles each time) the quantities each time until I have
about the number of 'stitches
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