[pypy-commit] pypy default: a much faster implementation of enumerate

Author: Carl Friedrich Bolz Branch: Changeset: r80539:8c1d8f7986a2 Date: 2015-11-04 23:36 +0100 http://bitbucket.org/pypy/pypy/changeset/8c1d8f7986a2/ Log:a much faster implementation of enumerate diff --git a/pypy/module/__builtin__/functional.py

[pypy-commit] pypy stmgc-c8: hg merge stmgc-c8-gcc

Author: Armin Rigo Branch: stmgc-c8 Changeset: r80542:10fa5e673328 Date: 2015-11-05 07:43 +0100 http://bitbucket.org/pypy/pypy/changeset/10fa5e673328/ Log:hg merge stmgc-c8-gcc diff too long, truncating to 2000 out of 35822 lines diff --git a/.hgtags b/.hgtags ---

[pypy-commit] pypy stmgc-c8-gcc: close branch to be merged

Author: Armin Rigo Branch: stmgc-c8-gcc Changeset: r80541:507bae789a11 Date: 2015-11-05 07:42 +0100 http://bitbucket.org/pypy/pypy/changeset/507bae789a11/ Log:close branch to be merged ___ pypy-commit mailing list

[pypy-commit] pypy stmgc-c8-gcc: import stmgc/41227d7659ac (the current head, only a comment added)

Author: Armin Rigo Branch: stmgc-c8-gcc Changeset: r80540:38e00aff4334 Date: 2015-11-05 07:41 +0100 http://bitbucket.org/pypy/pypy/changeset/38e00aff4334/ Log:import stmgc/41227d7659ac (the current head, only a comment added) diff --git

[pypy-commit] pypy s390x-backend: ironed out issues that took the wrong register. excluding the scratch register from managed ones and correctly setting the registers on the cpu now gives the desired

Author: Richard Plangger Branch: s390x-backend Changeset: r80536:78a1e03178a0 Date: 2015-11-04 13:43 +0100 http://bitbucket.org/pypy/pypy/changeset/78a1e03178a0/ Log:ironed out issues that took the wrong register. excluding the scratch register from managed ones

[pypy-commit] pypy s390x-backend: reordered free registers and force result in register (wrong order double loaded values already in a register)

Author: Richard Plangger Branch: s390x-backend Changeset: r80537:094ee6d25c63 Date: 2015-11-04 14:20 +0100 http://bitbucket.org/pypy/pypy/changeset/094ee6d25c63/ Log:reordered free registers and force result in register (wrong order double loaded values already

[pypy-commit] pypy vmprof-newstack: random progres

Author: fijal Branch: vmprof-newstack Changeset: r80533:92eb26363b25 Date: 2015-11-01 12:36 + http://bitbucket.org/pypy/pypy/changeset/92eb26363b25/ Log:random progres diff --git a/rpython/rlib/rvmprof/cintf.py b/rpython/rlib/rvmprof/cintf.py --- a/rpython/rlib/rvmprof/cintf.py +++

[pypy-commit] pypy vmprof-newstack: fixes

Author: fijal Branch: vmprof-newstack Changeset: r80534:c67fc4fb2414 Date: 2015-11-04 08:49 + http://bitbucket.org/pypy/pypy/changeset/c67fc4fb2414/ Log:fixes diff --git a/rpython/rlib/rvmprof/rvmprof.py b/rpython/rlib/rvmprof/rvmprof.py --- a/rpython/rlib/rvmprof/rvmprof.py +++

[pypy-commit] pypy vmprof-newstack: don't scan the first item of shadowstack and always use an extra one

Author: fijal Branch: vmprof-newstack Changeset: r80535:f276c700c181 Date: 2015-11-04 09:46 + http://bitbucket.org/pypy/pypy/changeset/f276c700c181/ Log:don't scan the first item of shadowstack and always use an extra one diff --git a/rpython/memory/gctransform/shadowstack.py