[pypy-commit] pypy ppc-vsx-support: changes vec_guard to pass more tests (work in progress)

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85491:dd3b78c15f4f Date: 2016-07-01 16:25 +0200 http://bitbucket.org/pypy/pypy/changeset/dd3b78c15f4f/ Log:changes vec_guard to pass more tests (work in progress) diff --git a/rpython/jit/backend/ppc/vector_ext.py b/rpython/jit/ba

[pypy-commit] pypy s390x-old-cpu-no-jit: (s390x) add a config switch, not supported cpu revisions build a no jit version. #2318

Author: Richard Plangger Branch: s390x-old-cpu-no-jit Changeset: r85531:3a21d6a5c5bc Date: 2016-07-04 11:02 +0200 http://bitbucket.org/pypy/pypy/changeset/3a21d6a5c5bc/ Log:(s390x) add a config switch, not supported cpu revisions build a no jit version. #2318 diff --git a/pypy/goal/t

[pypy-commit] pypy ppc-vsx-support: vectorized reduction test now passes (ppc)

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85536:1f00adc7b0fd Date: 2016-07-04 15:29 +0200 http://bitbucket.org/pypy/pypy/changeset/1f00adc7b0fd/ Log:vectorized reduction test now passes (ppc) diff --git a/rpython/jit/backend/ppc/codebuilder.py b/rpython/jit/backend/ppc/co

[pypy-commit] pypy default: (mattip, arigato, plan_rich) solve issue #2339

Author: Richard Plangger Branch: Changeset: r85537:f24ba12ad3d2 Date: 2016-07-04 16:39 +0200 http://bitbucket.org/pypy/pypy/changeset/f24ba12ad3d2/ Log:(mattip, arigato, plan_rich) solve issue #2339 diff --git a/pypy/module/cpyext/test/test_cpyext.py b/pypy/module/cpyext/test

[pypy-commit] pypy ppc-vsx-support: updates the ppc opcode for vec_int_xor (veqv was used instead of vxor)

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85538:2a82f60bb1d6 Date: 2016-07-04 17:24 +0200 http://bitbucket.org/pypy/pypy/changeset/2a82f60bb1d6/ Log:updates the ppc opcode for vec_int_xor (veqv was used instead of vxor) diff --git a/rpython/jit/backend/ppc/vector_e

[pypy-commit] pypy default: (s390x) apply same changes as in 2269d1d, push/pop gcmap callsites/calls modified/added

Author: Richard Plangger Branch: Changeset: r85553:316ea0980c19 Date: 2016-07-05 11:55 +0200 http://bitbucket.org/pypy/pypy/changeset/316ea0980c19/ Log:(s390x) apply same changes as in 2269d1d, push/pop gcmap callsites/calls modified/added diff --git a/rpython/jit/backend/zarch/arch

[pypy-commit] pypy default: (s390x, ppc) resolve issue in test_gc_integration (test_malloc_slowpath), register allocator will not use register slots, but the frame slots on the gcmap

Author: Richard Plangger Branch: Changeset: r85554:a09c99e17a27 Date: 2016-07-05 13:06 +0200 http://bitbucket.org/pypy/pypy/changeset/a09c99e17a27/ Log:(s390x,ppc) resolve issue in test_gc_integration (test_malloc_slowpath), register allocator will not use register slots, but

[pypy-commit] pypy ppc-vsx-support: add intmask to arith in test (vec_int_sub), implement stitch guard

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85560:b45d23fda408 Date: 2016-07-05 14:48 +0200 http://bitbucket.org/pypy/pypy/changeset/b45d23fda408/ Log:add intmask to arith in test (vec_int_sub), implement stitch guard diff --git a/rpython/jit/backend/ppc/locations.py b/rpyt

[pypy-commit] pypy ppc-vsx-support: merge default

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85559:ac89a39486d5 Date: 2016-07-05 13:16 +0200 http://bitbucket.org/pypy/pypy/changeset/ac89a39486d5/ Log:merge default diff --git a/dotviewer/graphparse.py b/dotviewer/graphparse.py --- a/dotviewer/graphparse.py +++ b/dotviewer/g

[pypy-commit] pypy ppc-vsx-support: implement more unpack_i combinations, conversion function float -> int

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85561:e9942271f923 Date: 2016-07-05 15:42 +0200 http://bitbucket.org/pypy/pypy/changeset/e9942271f923/ Log:implement more unpack_i combinations, conversion function float -> int diff --git a/rpython/jit/backend/ppc/codebuil

[pypy-commit] pypy ppc-vsx-support: remove the integer register allocator. float and int vector register are colocated (i.e. float 32 -> int 0, float 33 -> int 1, ...), this makes things much easier

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85562:c97b2b5608a4 Date: 2016-07-05 16:27 +0200 http://bitbucket.org/pypy/pypy/changeset/c97b2b5608a4/ Log:remove the integer register allocator. float and int vector register are colocated (i.e. float 32 -> int 0, float 33

[pypy-commit] pypy new-jit-log: merge default

Author: Richard Plangger Branch: new-jit-log Changeset: r85570:4c3925486347 Date: 2016-07-05 17:13 +0200 http://bitbucket.org/pypy/pypy/changeset/4c3925486347/ Log:merge default diff too long, truncating to 2000 out of 5472 lines diff --git a/dotviewer/graphparse.py b/dotviewer/graphparse.p

[pypy-commit] pypy ppc-vsx-support: removes mixin class and add functions directly to BasicPPCAssembler

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85571:7da69acc5ef4 Date: 2016-07-06 10:30 +0200 http://bitbucket.org/pypy/pypy/changeset/7da69acc5ef4/ Log:removes mixin class and add functions directly to BasicPPCAssembler diff --git a/rpython/jit/backend/ppc/codebuilder.py b/r

[pypy-commit] pypy ppc-vsx-support: invoked missing function (typo)

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85573:2f5745203fcb Date: 2016-07-06 11:24 +0200 http://bitbucket.org/pypy/pypy/changeset/2f5745203fcb/ Log:invoked missing function (typo) diff --git a/rpython/jit/backend/ppc/vector_ext.py b/rpython/jit/backend/ppc/vector_ext.py

[pypy-commit] pypy default: apply further changes to correctly push/pop gcmap (started in a09c99e17a27)

Author: Richard Plangger Branch: Changeset: r85572:35001d8b5219 Date: 2016-07-06 11:19 +0200 http://bitbucket.org/pypy/pypy/changeset/35001d8b5219/ Log:apply further changes to correctly push/pop gcmap (started in a09c99e17a27) diff --git a/rpython/jit/backend/zarch/assembler.py b/

[pypy-commit] pypy default: remove pop_gcmap just before returning from malloc_slowpath, this will overwrite the nursery free ptr hold in r1 (s390x)

Author: Richard Plangger Branch: Changeset: r85575:e472905e4fec Date: 2016-07-06 12:29 +0200 http://bitbucket.org/pypy/pypy/changeset/e472905e4fec/ Log:remove pop_gcmap just before returning from malloc_slowpath, this will overwrite the nursery free ptr hold in r1 (s390x) diff --git

[pypy-commit] pypy ppc-vsx-support: solve some translation issues

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85577:5576d80ffa0b Date: 2016-07-06 17:43 +0200 http://bitbucket.org/pypy/pypy/changeset/5576d80ffa0b/ Log:solve some translation issues diff --git a/rpython/jit/backend/llsupport/vector_ext.py b/rpython/jit/backend/llsupport/vect

[pypy-commit] pypy default: fix test_compile_asmlen

Author: Richard Plangger Branch: Changeset: r85581:5a0e839de8ba Date: 2016-07-06 18:14 +0200 http://bitbucket.org/pypy/pypy/changeset/5a0e839de8ba/ Log:fix test_compile_asmlen diff --git a/rpython/jit/backend/zarch/test/test_runner.py b/rpython/jit/backend/zarch/test/test_runner.py --- a/r

[pypy-commit] pypy new-jit-log: using the the same trick as done in rlib/jithook to call flush_trace_counters on the assembler

Author: Richard Plangger Branch: new-jit-log Changeset: r85583:f669d0340e40 Date: 2016-07-06 18:37 +0200 http://bitbucket.org/pypy/pypy/changeset/f669d0340e40/ Log:using the the same trick as done in rlib/jithook to call flush_trace_counters on the assembler diff --git a/rpython/jit/

[pypy-commit] pypy new-jit-log: change import in disable_jitlog

Author: Richard Plangger Branch: new-jit-log Changeset: r85588:c08693600013 Date: 2016-07-06 20:25 +0200 http://bitbucket.org/pypy/pypy/changeset/c08693600013/ Log:change import in disable_jitlog diff --git a/rpython/rlib/rvmprof/rvmprof.py b/rpython/rlib/rvmprof/rvmprof.py --- a/rpython/rli

[pypy-commit] pypy new-jit-log: remove set trace

Author: Richard Plangger Branch: new-jit-log Changeset: r85587:a5bf76474c9d Date: 2016-07-06 20:24 +0200 http://bitbucket.org/pypy/pypy/changeset/a5bf76474c9d/ Log:remove set trace diff --git a/rpython/jit/metainterp/warmspot.py b/rpython/jit/metainterp/warmspot.py --- a/rpython/jit/metaint

[pypy-commit] pypy ppc-vsx-support: remove the flags on the cpu, and push them down to the object in the field vector_ext (saved on the cpu). simplifies the vector extension handling

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85590:7dd9c13d12f8 Date: 2016-07-06 21:00 +0200 http://bitbucket.org/pypy/pypy/changeset/7dd9c13d12f8/ Log:remove the flags on the cpu, and push them down to the object in the field vector_ext (saved on the cpu). simplifies

[pypy-commit] pypy ppc-vsx-support: continue refactoring started in last commit

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85595:b129dbdbe458 Date: 2016-07-07 10:22 +0200 http://bitbucket.org/pypy/pypy/changeset/b129dbdbe458/ Log:continue refactoring started in last commit diff --git a/rpython/jit/backend/llgraph/runner.py b/rpython/jit/backend/llgrap

[pypy-commit] pypy ppc-vsx-support: call mulld, codebuilder has no method mul

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85596:6d2e011d1895 Date: 2016-07-07 13:57 +0200 http://bitbucket.org/pypy/pypy/changeset/6d2e011d1895/ Log:call mulld, codebuilder has no method mul diff --git a/rpython/jit/backend/ppc/vector_ext.py b/rpython/jit/backend/ppc/vect

[pypy-commit] pypy ppc-vsx-support: merge default

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85597:fb6cdfd34d1b Date: 2016-07-07 13:58 +0200 http://bitbucket.org/pypy/pypy/changeset/fb6cdfd34d1b/ Log:merge default diff --git a/pypy/module/_cffi_backend/ctypestruct.py b/pypy/module/_cffi_backend/ctypestruct.py --- a/pypy/m

[pypy-commit] pypy new-jit-log: change the loop numbering (token.number) to use jitlog's trace id,

Author: Richard Plangger Branch: new-jit-log Changeset: r85635:4f7beec17bd8 Date: 2016-07-09 22:41 +0200 http://bitbucket.org/pypy/pypy/changeset/4f7beec17bd8/ Log:change the loop numbering (token.number) to use jitlog's trace id, change test in test_compile, modify the emitted jitlog

[pypy-commit] extradoc extradoc: some changes to the compiler workshop talk

Author: Richard Plangger Branch: extradoc Changeset: r5651:8a0577f1e4a7 Date: 2016-07-11 09:44 -0500 http://bitbucket.org/pypy/extradoc/changeset/8a0577f1e4a7/ Log:some changes to the compiler workshop talk diff --git a/talk/compiler-workshop-2016/slides/index.html b/talk/compiler-workshop-

[pypy-commit] extradoc extradoc: slides for the compiler workshop (reveal.js)

Author: Richard Plangger Branch: extradoc Changeset: r5650:25b5647471e6 Date: 2016-07-10 19:22 -0500 http://bitbucket.org/pypy/extradoc/changeset/25b5647471e6/ Log:slides for the compiler workshop (reveal.js) diff too long, truncating to 2000 out of 20939 lines diff --git a/talk/compiler-wo

[pypy-commit] extradoc extradoc: changed first slide a bit (suggestions made by fijal)

Author: Richard Plangger Branch: extradoc Changeset: r5652:78b0da4925c1 Date: 2016-07-12 09:53 -0500 http://bitbucket.org/pypy/extradoc/changeset/78b0da4925c1/ Log:changed first slide a bit (suggestions made by fijal) diff --git a/talk/compiler-workshop-2016/slides/index.html b/talk/compile

[pypy-commit] pypy ppc-vsx-support: adds removed function to free fail args registers

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85698:2954ca91b89a Date: 2016-07-13 18:16 -0500 http://bitbucket.org/pypy/pypy/changeset/2954ca91b89a/ Log:adds removed function to free fail args registers diff --git a/rpython/jit/backend/ppc/codebuilder.py b/rpython/jit/backend

[pypy-commit] pypy json-surrogates: add test to ensure to adapt the behaviour in the json module (see #2345)

Author: Richard Plangger Branch: json-surrogates Changeset: r85699:e3ee9d867add Date: 2016-07-14 11:13 -0500 http://bitbucket.org/pypy/pypy/changeset/e3ee9d867add/ Log:add test to ensure to adapt the behaviour in the json module (see #2345) diff --git a/pypy/module/_pypyjson/test/tes

[pypy-commit] pypy json-surrogates: align json module decode with the cpython's impl

Author: Richard Plangger Branch: json-surrogates Changeset: r85700:ec18acf52840 Date: 2016-07-14 11:43 -0500 http://bitbucket.org/pypy/pypy/changeset/ec18acf52840/ Log:align json module decode with the cpython's impl diff --git a/pypy/module/_pypyjson/interp_decoder.py b/pypy/module/_pypyjs

[pypy-commit] pypy default: merged default head

Author: Richard Plangger Branch: Changeset: r85706:0cdc78795c00 Date: 2016-07-14 13:49 -0500 http://bitbucket.org/pypy/pypy/changeset/0cdc78795c00/ Log:merged default head diff --git a/pypy/module/_pypyjson/interp_decoder.py b/pypy/module/_pypyjson/interp_decoder.py --- a/pypy/module/_pypy

[pypy-commit] pypy json-surrogates: close branch

Author: Richard Plangger Branch: json-surrogates Changeset: r85704:409c2338bd70 Date: 2016-07-14 13:39 -0500 http://bitbucket.org/pypy/pypy/changeset/409c2338bd70/ Log:close branch ___ pypy-commit mailing list pypy-commit@python.org https://mail.py

[pypy-commit] pypy default: merge fix for issue #2345

Author: Richard Plangger Branch: Changeset: r85705:fb7becc5ce15 Date: 2016-07-14 13:40 -0500 http://bitbucket.org/pypy/pypy/changeset/fb7becc5ce15/ Log:merge fix for issue #2345 diff --git a/pypy/module/_pypyjson/interp_decoder.py b/pypy/module/_pypyjson/interp_decoder.py --- a/pypy/module

[pypy-commit] pypy new-jit-log: update print out when rlib.py is directly invoked

Author: Richard Plangger Branch: new-jit-log Changeset: r85752:a327ccd71bad Date: 2016-07-18 15:52 +0200 http://bitbucket.org/pypy/pypy/changeset/a327ccd71bad/ Log:update print out when rlib.py is directly invoked diff --git a/rpython/rlib/jitlog.py b/rpython/rlib/jitlog.py --- a/rpython/rli

[pypy-commit] pypy ppc-vsx-support: merge default

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85753:6d7932738c3d Date: 2016-07-18 15:53 +0200 http://bitbucket.org/pypy/pypy/changeset/6d7932738c3d/ Log:merge default diff --git a/lib_pypy/_ctypes/basics.py b/lib_pypy/_ctypes/basics.py --- a/lib_pypy/_ctypes/basics.py +++ b/li

[pypy-commit] pypy ppc-vsx-support: change runpack("LL", ...) to 2x runpack("L", ...), translation issue

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85754:0ccc38247048 Date: 2016-07-18 16:19 +0200 http://bitbucket.org/pypy/pypy/changeset/0ccc38247048/ Log:change runpack("LL", ...) to 2x runpack("L", ...), translation issue diff --git a/rpython/jit/backend/ppc/detect_feature.py

[pypy-commit] pypy new-jit-log: enable inject debug code if jitlog is enabled

Author: Richard Plangger Branch: new-jit-log Changeset: r85756:6f329da03bc9 Date: 2016-07-18 16:34 +0200 http://bitbucket.org/pypy/pypy/changeset/6f329da03bc9/ Log:enable inject debug code if jitlog is enabled diff --git a/rpython/jit/backend/llsupport/assembler.py b/rpython/jit/backend/lls

[pypy-commit] pypy new-jit-log: merge default

Author: Richard Plangger Branch: new-jit-log Changeset: r85755:3c9d6acbc144 Date: 2016-07-18 16:29 +0200 http://bitbucket.org/pypy/pypy/changeset/3c9d6acbc144/ Log:merge default diff too long, truncating to 2000 out of 3103 lines diff --git a/lib_pypy/_ctypes/basics.py b/lib_pypy/_ctypes/ba

[pypy-commit] pypy ppc-vsx-support: defer vector_ext init to a point where release gil is possible

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85767:15cafdc0f60b Date: 2016-07-18 17:51 +0200 http://bitbucket.org/pypy/pypy/changeset/15cafdc0f60b/ Log:defer vector_ext init to a point where release gil is possible diff --git a/rpython/jit/backend/llsupport/vector_ext.py b/r

[pypy-commit] pypy ppc-vsx-support: resolve translation issues, pypy on ppc compiles now

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85768:5b99dbc493ed Date: 2016-07-19 11:54 +0200 http://bitbucket.org/pypy/pypy/changeset/5b99dbc493ed/ Log:resolve translation issues, pypy on ppc compiles now diff --git a/rpython/jit/backend/ppc/vector_ext.py b/rpython/jit/backe

[pypy-commit] pypy ppc-vsx-support: merge default

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85770:5090a8e44421 Date: 2016-07-19 13:51 +0200 http://bitbucket.org/pypy/pypy/changeset/5090a8e44421/ Log:merge default diff --git a/lib_pypy/_pypy_winbase_build.py b/lib_pypy/_pypy_winbase_build.py new file mode 100644 --- /dev/n

[pypy-commit] pypy ppc-vsx-support: consider that the returned value (variable new_index_box) can be None)

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85769:b87a50154458 Date: 2016-07-19 13:51 +0200 http://bitbucket.org/pypy/pypy/changeset/b87a50154458/ Log:consider that the returned value (variable new_index_box) can be None) diff --git a/rpython/jit/backend/llsupport/re

[pypy-commit] pypy ppc-vsx-support: removed comments, fixed problem with rewrite (was changed slightly for vectorization)

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85772:1932988064a3 Date: 2016-07-19 16:45 +0200 http://bitbucket.org/pypy/pypy/changeset/1932988064a3/ Log:removed comments, fixed problem with rewrite (was changed slightly for vectorization) diff --git a/rpython/jit/backe

[pypy-commit] pypy ppc-vsx-support: return None for index_box in cpu_scale if the box is not modified by rewrite

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85771:1c9aa0ce8cd2 Date: 2016-07-19 14:21 +0200 http://bitbucket.org/pypy/pypy/changeset/1c9aa0ce8cd2/ Log:return None for index_box in cpu_scale if the box is not modified by rewrite diff --git a/rpython/jit/backend/llsupp

[pypy-commit] pypy ppc-vsx-support: resolve another issue, regalloc must free var if it is a ref type

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85773:7991ed15f296 Date: 2016-07-19 17:00 +0200 http://bitbucket.org/pypy/pypy/changeset/7991ed15f296/ Log:resolve another issue, regalloc must free var if it is a ref type diff --git a/rpython/jit/backend/llsupport/rewrite.py b/r

[pypy-commit] pypy ppc-vsx-support: remove the special cpu for sse4, cpu now has a field which describes the vector extension

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85775:ec08d8d7e121 Date: 2016-07-20 12:46 +0200 http://bitbucket.org/pypy/pypy/changeset/ec08d8d7e121/ Log:remove the special cpu for sse4, cpu now has a field which describes the vector extension undo several changes for ss

[pypy-commit] pypy ppc-vsx-support: add test to reproduce failure at runtime. compute_vars_longevity disallows const values in the fail args

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85776:a2551c202077 Date: 2016-07-20 13:46 +0200 http://bitbucket.org/pypy/pypy/changeset/a2551c202077/ Log:add test to reproduce failure at runtime. compute_vars_longevity disallows const values in the fail args diff --git

[pypy-commit] pypy default: apply changes to s390x backend

Author: Richard Plangger Branch: Changeset: r85781:65dc95275780 Date: 2016-07-20 13:54 +0200 http://bitbucket.org/pypy/pypy/changeset/65dc95275780/ Log:apply changes to s390x backend diff --git a/rpython/jit/backend/zarch/assembler.py b/rpython/jit/backend/zarch/assembler.py --- a/rpython/

[pypy-commit] pypy ppc-vsx-support: merge default

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85782:474f49c7293b Date: 2016-07-20 15:51 +0200 http://bitbucket.org/pypy/pypy/changeset/474f49c7293b/ Log:merge default diff --git a/pypy/doc/install.rst b/pypy/doc/install.rst --- a/pypy/doc/install.rst +++ b/pypy/doc/install.rst

[pypy-commit] pypy ppc-vsx-support: added load_factors to ll_graph runner

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85783:2c29f2c72be4 Date: 2016-07-20 17:19 +0200 http://bitbucket.org/pypy/pypy/changeset/2c29f2c72be4/ Log:added load_factors to ll_graph runner diff --git a/rpython/jit/backend/llgraph/runner.py b/rpython/jit/backend/llgraph/runn

[pypy-commit] pypy ppc-vsx-support: resolve some import issues in the x86 simd backend

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85784:6c0d5cf2699e Date: 2016-07-20 17:32 +0200 http://bitbucket.org/pypy/pypy/changeset/6c0d5cf2699e/ Log:resolve some import issues in the x86 simd backend diff --git a/rpython/jit/backend/x86/vector_ext.py b/rpython/jit/backend

[pypy-commit] pypy default: modify test (s390x) that used call_malloc_gc

Author: Richard Plangger Branch: Changeset: r85786:bf2dbf7c5f0f Date: 2016-07-21 09:17 +0200 http://bitbucket.org/pypy/pypy/changeset/bf2dbf7c5f0f/ Log:modify test (s390x) that used call_malloc_gc diff --git a/rpython/jit/backend/zarch/test/test_pool.py b/rpython/jit/backend/zarch/test/tes

[pypy-commit] pypy default: apply patch provided by David Naylor to enable vmprof on Dragon Fly BSD

Author: Richard Plangger Branch: Changeset: r85787:c6bbfff6404e Date: 2016-07-21 10:29 +0200 http://bitbucket.org/pypy/pypy/changeset/c6bbfff6404e/ Log:apply patch provided by David Naylor to enable vmprof on Dragon Fly BSD diff --git a/rpython/rlib/rvmprof/src/vmprof_config.h b/rp

[pypy-commit] pypy new-jit-log: remove a syntax error

Author: Richard Plangger Branch: new-jit-log Changeset: r85788:bb2d7492de70 Date: 2016-07-21 13:20 +0200 http://bitbucket.org/pypy/pypy/changeset/bb2d7492de70/ Log:remove a syntax error diff --git a/rpython/jit/backend/llsupport/assembler.py b/rpython/jit/backend/llsupport/assembler.py ---

[pypy-commit] pypy new-jit-log: did not log debug counter if it is zero,

Author: Richard Plangger Branch: new-jit-log Changeset: r85789:f60175c7834a Date: 2016-07-21 13:35 +0200 http://bitbucket.org/pypy/pypy/changeset/f60175c7834a/ Log:did not log debug counter if it is zero, enable inject_debug_counters when run only using jitlog diff --git a/rpython/ji

[pypy-commit] pypy new-jit-log: remove old import and not used lloperations

Author: Richard Plangger Branch: new-jit-log Changeset: r85791:e82414d26ebf Date: 2016-07-21 15:17 +0200 http://bitbucket.org/pypy/pypy/changeset/e82414d26ebf/ Log:remove old import and not used lloperations diff --git a/rpython/jit/metainterp/test/test_ajit.py b/rpython/jit/metainterp/test

[pypy-commit] pypy new-jit-log: merge default

Author: Richard Plangger Branch: new-jit-log Changeset: r85790:3a2bd151550e Date: 2016-07-21 14:59 +0200 http://bitbucket.org/pypy/pypy/changeset/3a2bd151550e/ Log:merge default diff --git a/pypy/doc/install.rst b/pypy/doc/install.rst --- a/pypy/doc/install.rst +++ b/pypy/doc/install.rst @@

[pypy-commit] pypy new-jit-log: refactor jitlog and unwind it into a new module

Author: Richard Plangger Branch: new-jit-log Changeset: r85809:755792b503d9 Date: 2016-07-22 10:46 +0200 http://bitbucket.org/pypy/pypy/changeset/755792b503d9/ Log:refactor jitlog and unwind it into a new module diff --git a/pypy/module/_vmprof/interp_vmprof.py b/pypy/module/_vmprof/interp_

[pypy-commit] pypy new-jit-log: rename imports to redirect to the right module

Author: Richard Plangger Branch: new-jit-log Changeset: r85810:0823f6a05604 Date: 2016-07-22 10:58 +0200 http://bitbucket.org/pypy/pypy/changeset/0823f6a05604/ Log:rename imports to redirect to the right module diff --git a/pypy/module/pypyjit/interp_jit.py b/pypy/module/pypyjit/interp_jit.

[pypy-commit] pypy new-jit-log: more import issues, separated jitlog into its own module called _jitlog

Author: Richard Plangger Branch: new-jit-log Changeset: r85811:12396196cd6e Date: 2016-07-22 11:35 +0200 http://bitbucket.org/pypy/pypy/changeset/12396196cd6e/ Log:more import issues, separated jitlog into its own module called _jitlog diff --git a/pypy/module/_jitlog/__init__.py b/p

[pypy-commit] pypy new-jit-log: check generated jitlog header in app level test

Author: Richard Plangger Branch: new-jit-log Changeset: r85812:bb50587b2582 Date: 2016-07-22 11:48 +0200 http://bitbucket.org/pypy/pypy/changeset/bb50587b2582/ Log:check generated jitlog header in app level test diff --git a/pypy/module/_jitlog/test/test__jitlog.py b/pypy/module/_jitlog/tes

[pypy-commit] pypy new-jit-log: merge default

Author: Richard Plangger Branch: new-jit-log Changeset: r85813:b665a816a992 Date: 2016-07-22 11:50 +0200 http://bitbucket.org/pypy/pypy/changeset/b665a816a992/ Log:merge default diff --git a/pypy/module/cpyext/test/test_cpyext.py b/pypy/module/cpyext/test/test_cpyext.py --- a/pypy/module/cp

[pypy-commit] pypy new-jit-log: remove the old functions from the _vmprof module

Author: Richard Plangger Branch: new-jit-log Changeset: r85814:1fb6d893fd12 Date: 2016-07-22 11:59 +0200 http://bitbucket.org/pypy/pypy/changeset/1fb6d893fd12/ Log:remove the old functions from the _vmprof module diff --git a/pypy/module/_vmprof/__init__.py b/pypy/module/_vmprof/__init__.py

[pypy-commit] pypy new-jit-log: remove include of jitlog header

Author: Richard Plangger Branch: new-jit-log Changeset: r85815:0ef7d860a335 Date: 2016-07-22 13:42 +0200 http://bitbucket.org/pypy/pypy/changeset/0ef7d860a335/ Log:remove include of jitlog header diff --git a/rpython/rlib/rvmprof/src/rvmprof.c b/rpython/rlib/rvmprof/src/rvmprof.c --- a/rpyt

[pypy-commit] pypy new-jit-log: merged default, applied changes to zarch assembler

Author: Richard Plangger Branch: new-jit-log Changeset: r85837:46a75e79ab0d Date: 2016-07-24 12:22 +0200 http://bitbucket.org/pypy/pypy/changeset/46a75e79ab0d/ Log:merged default, applied changes to zarch assembler diff --git a/lib-python/2.7/test/test_hash.py b/lib-python/2.7/test/test_hash

[pypy-commit] pypy new-jit-log: test_jitlog can be run on any cpu, restructed to make this possible

Author: Richard Plangger Branch: new-jit-log Changeset: r85839:1ebc580e133e Date: 2016-07-24 15:47 +0200 http://bitbucket.org/pypy/pypy/changeset/1ebc580e133e/ Log:test_jitlog can be run on any cpu, restructed to make this possible diff --git a/rpython/jit/backend/test/jitlog_test.py b/rpyt

[pypy-commit] pypy new-jit-log: arm & ppc changes to assembler to emit rewritten loop

Author: Richard Plangger Branch: new-jit-log Changeset: r85843:d74d50b47077 Date: 2016-07-24 15:57 +0200 http://bitbucket.org/pypy/pypy/changeset/d74d50b47077/ Log:arm & ppc changes to assembler to emit rewritten loop diff --git a/rpython/jit/backend/arm/assembler.py b/rpython/jit/backend/a

[pypy-commit] pypy new-jit-log: add _jitlog module to pypyoptions

Author: Richard Plangger Branch: new-jit-log Changeset: r85845:6d59af4538b7 Date: 2016-07-24 16:59 +0200 http://bitbucket.org/pypy/pypy/changeset/6d59af4538b7/ Log:add _jitlog module to pypyoptions diff --git a/pypy/config/pypyoption.py b/pypy/config/pypyoption.py --- a/pypy/config/pypyoptio

[pypy-commit] pypy new-jit-log: merged default

Author: Richard Plangger Branch: new-jit-log Changeset: r85849:8923ef06cabd Date: 2016-07-25 11:02 +0200 http://bitbucket.org/pypy/pypy/changeset/8923ef06cabd/ Log:merged default diff --git a/rpython/translator/c/src/entrypoint.c b/rpython/translator/c/src/entrypoint.c --- a/rpython/transla

[pypy-commit] pypy default: merge new-jit-log

Author: Richard Plangger Branch: Changeset: r85850:1a36f95ed5d8 Date: 2016-07-25 11:03 +0200 http://bitbucket.org/pypy/pypy/changeset/1a36f95ed5d8/ Log:merge new-jit-log diff too long, truncating to 2000 out of 2221 lines diff --git a/pypy/config/pypyoption.py b/pypy/config/pypyoption.py -

[pypy-commit] pypy default: document branch new-jit-log

Author: Richard Plangger Branch: Changeset: r85851:c24a95335e2c Date: 2016-07-25 11:07 +0200 http://bitbucket.org/pypy/pypy/changeset/c24a95335e2c/ Log:document branch new-jit-log diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst --- a/pypy/doc/whatsnew-head.rst +++ b/pyp

[pypy-commit] pypy new-jit-log: close branch

Author: Richard Plangger Branch: new-jit-log Changeset: r85852:c327a2fa5f02 Date: 2016-07-25 11:10 +0200 http://bitbucket.org/pypy/pypy/changeset/c327a2fa5f02/ Log:close branch ___ pypy-commit mailing list pypy-commit@python.org https://mail.python

[pypy-commit] pypy default: provide faildescr to start_new_trace instead of addr to resumekey,

Author: Richard Plangger Branch: Changeset: r85853:12db98eab76c Date: 2016-07-25 13:24 +0200 http://bitbucket.org/pypy/pypy/changeset/12db98eab76c/ Log:provide faildescr to start_new_trace instead of addr to resumekey, arm backend add missing import diff --git a/rpython/jit/backend/

[pypy-commit] pypy default: resumekey.guard_op is not a proper field, skip this for now

Author: Richard Plangger Branch: Changeset: r85854:a138005e21f6 Date: 2016-07-25 14:33 +0200 http://bitbucket.org/pypy/pypy/changeset/a138005e21f6/ Log:resumekey.guard_op is not a proper field, skip this for now diff --git a/rpython/jit/metainterp/compile.py b/rpython/jit/metainterp/compil

[pypy-commit] pypy default: undo trace_id increment & align to MARK_START_TRACE

Author: Richard Plangger Branch: Changeset: r85858:ad3052f353ad Date: 2016-07-25 17:40 +0200 http://bitbucket.org/pypy/pypy/changeset/ad3052f353ad/ Log:undo trace_id increment & align to MARK_START_TRACE diff --git a/rpython/rlib/rjitlog/rjitlog.py b/rpython/rlib/rjitlog/rjitlog.py --- a/rp

[pypy-commit] pypy default: that should do, only catched the issue in trace_abort, not write trace

Author: Richard Plangger Branch: Changeset: r85859:cf8cdcde2343 Date: 2016-07-25 17:44 +0200 http://bitbucket.org/pypy/pypy/changeset/cf8cdcde2343/ Log:that should do, only catched the issue in trace_abort, not write trace diff --git a/rpython/rlib/rjitlog/rjitlog.py b/rpython/rlib/

[pypy-commit] pypy default: (mattip, plan_rich) fix test_debug_merge_point, it used encode_addr instead of encode_64bit value (failed on 32bit)

Author: Richard Plangger Branch: Changeset: r85857:f051867d04fa Date: 2016-07-25 17:37 +0200 http://bitbucket.org/pypy/pypy/changeset/f051867d04fa/ Log:(mattip, plan_rich) fix test_debug_merge_point, it used encode_addr instead of encode_64bit value (failed on 32bit) diff --git a

[pypy-commit] pypy jitlog-32bit: include information in the log if a 32bit machine wrote the log

Author: Richard Plangger Branch: jitlog-32bit Changeset: r85860:793961128c70 Date: 2016-07-25 17:49 +0200 http://bitbucket.org/pypy/pypy/changeset/793961128c70/ Log:include information in the log if a 32bit machine wrote the log diff --git a/rpython/rlib/rjitlog/rjitlog.py b/rpython/rlib/rji

[pypy-commit] pypy jitlog-32bit: initialize trace_id with 0 instead of -1

Author: Richard Plangger Branch: jitlog-32bit Changeset: r85861:7087aa60a936 Date: 2016-07-25 17:59 +0200 http://bitbucket.org/pypy/pypy/changeset/7087aa60a936/ Log:initialize trace_id with 0 instead of -1 diff --git a/rpython/rlib/rjitlog/rjitlog.py b/rpython/rlib/rjitlog/rjitlog.py --- a/r

[pypy-commit] pypy default: merge jitlog-32bit and document branch

Author: Richard Plangger Branch: Changeset: r85862:fac5eed8e650 Date: 2016-07-25 18:05 +0200 http://bitbucket.org/pypy/pypy/changeset/fac5eed8e650/ Log:merge jitlog-32bit and document branch diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst --- a/pypy/doc/whatsnew-head.rs

[pypy-commit] pypy jitlog-32bit: do not subroutine call encode_le_32bit, but inline it directly into encode_str

Author: Richard Plangger Branch: jitlog-32bit Changeset: r85864:ecef6ae71893 Date: 2016-07-25 21:10 +0200 http://bitbucket.org/pypy/pypy/changeset/ecef6ae71893/ Log:do not subroutine call encode_le_32bit, but inline it directly into encode_str diff --git a/rpython/rlib/rjitlog/rjitlo

[pypy-commit] pypy default: put 32bit indication just after the version

Author: Richard Plangger Branch: Changeset: r85865:1668dc360f19 Date: 2016-07-25 18:14 +0200 http://bitbucket.org/pypy/pypy/changeset/1668dc360f19/ Log:put 32bit indication just after the version diff --git a/rpython/rlib/rjitlog/rjitlog.py b/rpython/rlib/rjitlog/rjitlog.py --- a/rpython/rl

[pypy-commit] pypy default: merge jitlog-32bit

Author: Richard Plangger Branch: Changeset: r85867:2b292dbd9644 Date: 2016-07-25 22:05 +0200 http://bitbucket.org/pypy/pypy/changeset/2b292dbd9644/ Log:merge jitlog-32bit diff --git a/rpython/rlib/rjitlog/rjitlog.py b/rpython/rlib/rjitlog/rjitlog.py --- a/rpython/rlib/rjitlog/rjitlog.py +++

[pypy-commit] pypy default: adapt test to check for the new header

Author: Richard Plangger Branch: Changeset: r85868:4afa4a9d8caf Date: 2016-07-26 12:44 +0200 http://bitbucket.org/pypy/pypy/changeset/4afa4a9d8caf/ Log:adapt test to check for the new header diff --git a/pypy/module/_jitlog/test/test__jitlog.py b/pypy/module/_jitlog/test/test__jitlog.py --

[pypy-commit] pypy jitlog-32bit: catchup default

Author: Richard Plangger Branch: jitlog-32bit Changeset: r85871:a15583f4da0f Date: 2016-07-26 13:06 +0200 http://bitbucket.org/pypy/pypy/changeset/a15583f4da0f/ Log:catchup default diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst --- a/pypy/doc/whatsnew-head.rst +++ b/pyp

[pypy-commit] pypy ppc-vsx-support: merge default (pull in new-jit-log)

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85872:dd5d6c50f5bd Date: 2016-07-27 12:43 +0200 http://bitbucket.org/pypy/pypy/changeset/dd5d6c50f5bd/ Log:merge default (pull in new-jit-log) diff too long, truncating to 2000 out of 2870 lines diff --git a/lib-python/2.7/test/te

[pypy-commit] pypy jitlog-32bit: backward incompatible change (fine, because jitlog is not officially released yet) adds machine to the header of the file

Author: Richard Plangger Branch: jitlog-32bit Changeset: r85873:66d565a40b09 Date: 2016-07-27 13:22 +0200 http://bitbucket.org/pypy/pypy/changeset/66d565a40b09/ Log:backward incompatible change (fine, because jitlog is not officially released yet) adds machine to the header of the fil

[pypy-commit] pypy jitlog-32bit: close branch

Author: Richard Plangger Branch: jitlog-32bit Changeset: r85874:50483d6e3473 Date: 2016-07-27 13:23 +0200 http://bitbucket.org/pypy/pypy/changeset/50483d6e3473/ Log:close branch ___ pypy-commit mailing list pypy-commit@python.org https://mail.pytho

[pypy-commit] pypy default: merge jitlog-32bit

Author: Richard Plangger Branch: Changeset: r85875:72ee095e6176 Date: 2016-07-27 13:23 +0200 http://bitbucket.org/pypy/pypy/changeset/72ee095e6176/ Log:merge jitlog-32bit diff --git a/pypy/module/_jitlog/test/test__jitlog.py b/pypy/module/_jitlog/test/test__jitlog.py --- a/pypy/module/_jit

[pypy-commit] pypy ppc-vsx-support: rpythonify detect_feature. it can now be done while running the vm,

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85894:27e39abe0a99 Date: 2016-07-28 17:47 +0200 http://bitbucket.org/pypy/pypy/changeset/27e39abe0a99/ Log:rpythonify detect_feature. it can now be done while running the vm, catchup some changes to the vectorizer model dif

[pypy-commit] pypy py3.5-async: add __await__ method to Coroutine typedef and redirect it to descr__await__

Author: Richard Plangger Branch: py3.5-async Changeset: r85904:000728f0465a Date: 2016-07-29 15:31 +0200 http://bitbucket.org/pypy/pypy/changeset/000728f0465a/ Log:add __await__ method to Coroutine typedef and redirect it to descr__await__ diff --git a/pypy/interpreter/generator.py b

[pypy-commit] extradoc extradoc: merge heads

Author: Richard Plangger Branch: extradoc Changeset: r5659:15244739241e Date: 2016-08-01 10:46 +0200 http://bitbucket.org/pypy/extradoc/changeset/15244739241e/ Log:merge heads diff --git a/blog/draft/revdb.rst b/blog/draft/revdb.rst --- a/blog/draft/revdb.rst +++ b/blog/draft/revdb.rst @@ -2

[pypy-commit] extradoc extradoc: draft for jitlog blog post

ke it into the current release) + +* Extend the jitlog to capture the information of the optimization stage + +plan_rich and the PyPy team + ___ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit

[pypy-commit] pypy ppc-vsx-support: impl. vec_float_xor (missing change)

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85954:7510e65f6e05 Date: 2016-08-01 14:45 +0200 http://bitbucket.org/pypy/pypy/changeset/7510e65f6e05/ Log:impl. vec_float_xor (missing change) diff --git a/rpython/jit/backend/x86/vector_ext.py b/rpython/jit/backend/x86/vector_ex

[pypy-commit] pypy ppc-vsx-support: correct the scaling for vec_load/store

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85955:84c8a9345e22 Date: 2016-08-01 16:22 +0200 http://bitbucket.org/pypy/pypy/changeset/84c8a9345e22/ Log:correct the scaling for vec_load/store diff --git a/rpython/jit/backend/llsupport/vector_ext.py b/rpython/jit/backend/llsup

[pypy-commit] pypy jitlog-exact-source-lines: use offset2lineno as proposed by cfbolz

Author: Richard Plangger Branch: jitlog-exact-source-lines Changeset: r85956:7467ad8d230f Date: 2016-08-01 16:41 +0200 http://bitbucket.org/pypy/pypy/changeset/7467ad8d230f/ Log:use offset2lineno as proposed by cfbolz diff --git a/pypy/module/pypyjit/interp_jit.py b/pypy/module/pypyjit/inte

[pypy-commit] pypy ppc-vsx-support: impl. flush_vector_cc for x86 using PBLENDVB

Author: Richard Plangger Branch: ppc-vsx-support Changeset: r85962:7673f44c3693 Date: 2016-08-01 19:04 +0200 http://bitbucket.org/pypy/pypy/changeset/7673f44c3693/ Log:impl. flush_vector_cc for x86 using PBLENDVB diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/as

[pypy-commit] pypy default: documented branch

Author: Richard Plangger Branch: Changeset: r85966:2831d94d2fec Date: 2016-08-01 19:10 +0200 http://bitbucket.org/pypy/pypy/changeset/2831d94d2fec/ Log:documented branch diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst --- a/pypy/doc/whatsnew-head.rst +++ b/pypy/doc/what

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