[Qemu-commits] [qemu/qemu] 6b568e: target/sparc/cpu: Rename the CPU models with a "+"...

isc/cpu.c M target/openrisc/mmu.c M target/ppc/internal.h M target/ppc/mmu-hash32.c M target/ppc/mmu-hash64.c M target/ppc/mmu-radix64.c M target/ppc/mmu-radix64.h M target/ppc/mmu_common.c M target/ppc/mmu_helper.c M target/riscv/cpu_helper.c M target/riscv/pmp

[Qemu-commits] [qemu/qemu] 6b568e: target/sparc/cpu: Rename the CPU models with a "+"...

isc/cpu.c M target/openrisc/mmu.c M target/ppc/internal.h M target/ppc/mmu-hash32.c M target/ppc/mmu-hash64.c M target/ppc/mmu-radix64.c M target/ppc/mmu-radix64.h M target/ppc/mmu_common.c M target/ppc/mmu_helper.c M target/riscv/cpu_helper.c M tar

[Qemu-commits] [qemu/qemu] 6a5a63: target/i386: Give IRQs a chance when resetting HF_...

Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 6a5a63f74ba5c5355b7a8468d3d814bfffe928fb https://github.com/qemu/qemu/commit/6a5a63f74ba5c5355b7a8468d3d814bfffe928fb Author: Ruihan Li Date: 2024-05-03 (Fri, 03 May 2024) Changed paths: M

[Qemu-commits] [qemu/qemu] 6a5a63: target/i386: Give IRQs a chance when resetting HF_...

Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 6a5a63f74ba5c5355b7a8468d3d814bfffe928fb https://github.com/qemu/qemu/commit/6a5a63f74ba5c5355b7a8468d3d814bfffe928fb Author: Ruihan Li Date: 2024-05-03 (Fri, 03 May 2024) Changed paths: M