defined spi bus and spi slave QOM interfaces. Inspired by and loosley based on
existing I2C framework.
Signed-off-by: Peter A. G. Crosthwaite
---
Makefile.target |1 +
hw/spi.c| 175 +++
hw/spi.h| 86 +
Hi Wei-Ren,
Thanks for your reply.
According your email, the function "do_interrupt" handle the external
interrupt just like keyboard interrupt, and the function "gen_exception"
handle the exception just like “SWI”.etc. So the function “gen_exception”
seems to be the answer.
Any comments are app
Hi all:
Are there any materials introduce how to use the scripts under scripts/
?
Regards,
Wanpeng Li
--
LTC China, IBM, Shanghai
Hi Everyone,
We currently have a somewhat hacky PL353 device model in our tree that
we wish to refactor and ultimately push to mainline. Before I go about
reworking it, I wish to discuss the architecture of this device model
because its non-trivial. The pl353 is sysbus slave that is a combined
NAN
Added device model for m25p80 SPI flash
Signed-off-by: Peter A. G. Crosthwaite
---
Makefile.target |1 +
hw/m25p80.c | 495 +++
2 files changed, 496 insertions(+), 0 deletions(-)
create mode 100644 hw/m25p80.c
diff --git a/Makefile.t
On 30 March 2012 07:37, Peter A. G. Crosthwaite
wrote:
> defined spi bus and spi slave QOM interfaces. Inspired by and loosley based on
> existing I2C framework.
There's also SPI support in qemu-linaro thanks to the folks at Nokia:
http://git.linaro.org/gitweb?p=qemu/qemu-linaro.git;a=blob;f=hw/s
Il 29/03/2012 22:01, Anthony Liguori ha scritto:
>> Then, we open-code the marshaller to process the QDict, rather than
>> embedding
>> it in the script or passing it through to qmp_device_add().
>
> You could also just do gen=False...
>
> But I don't think open coding the marshaller is the right
Hi Peter,
One major flaw in that interface (which is similar to another that we
originally used) is it doesnt have an API for wiggling the CS lines.
Some spi devices (e.g. the m25p80 in this series) have side effects
from cs strobing whether or not a txrx occurs during cs assertion,
which is not p
The sofv value only ever gets a value assigned and is never used (read)
anywhere, so we can just drop it.
Signed-off-by: Hans de Goede
---
hw/usb/hcd-ehci.c |8
1 file changed, 8 deletions(-)
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index 53c3c8f..64b58e3 100644
--- a/hw/
Also cleanup (reset) our device state when we reject a device due to a
speed mismatch.
Signed-off-by: Hans de Goede
---
hw/usb/redirect.c |8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c
index 8e9f175..c9d22e4 100644
--- a/hw/usb
Looks good, ack series.
Acked-by: Hans de Goede
On 03/29/2012 04:48 PM, Gerd Hoffmann wrote:
Hi,
This patch series reworks the usb descriptor handling in qemu. It adds
a struct for the binary representation of usb descriptors. It is put
into use for both generating usb descriptors (for e
On 03/29/12 22:24, Alon Levy wrote:
> DEFINE_PROP_UINT32("ram_size_mb", PCIQXLDevice, ram_size_mb, -1),
> -DEFINE_PROP_UINT32("vram_size_mb", PCIQXLDevice, vram32_size_mb, 0),
> -DEFINE_PROP_UINT32("vram64_size_mb", PCIQXLDevice, vram_size_mb, 0),
> +DEFINE_PROP_UI
Hi,
These patches add support for the Primcell PL330 DMA controller and add it to
the Xilinx Zynq machine model. Patch 1 is the device model. Patch 2 is the
machine model update.
The Device model was originally contributed by Kirill Batuzov / Samsung, as
indicated by the (C) notice in hw/pl330
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx_zynq.c | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 7290c64..033ba09 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -61,6 +61,9 @@ static void zynq
Device model for Primecell PL330 dma controller.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: Kirill Batuzov
---
changed from v1:
GPLv2 license
some code formatting fixes
MAINTAINERS |1 +
Makefile.target |1 +
hw/pl330.c | 1403 +++
On 03/29/12 22:56, Alon Levy wrote:
> Issues a qxl_guest_bug from qxl_phys2virt. Everywhere else will fail.
Nice start (there are more guest-triggerable asserts to be fixed this way).
> qxl_phys2virt requires an additional argument because all it's possible
> return values are legit (well, I coul
Hi,
> +# @SpiceQueryMouseMode
> +#
> +# An enumation of Spice mouse states.
> +#
> +# @client: Mouse cursor position is determined by the client.
> +#
> +# @server: Mouse cursor position is determined by the server.
> +#
> +# @unknown: No information is available about mouse mode used by
> +#
On Fri, Mar 30, 2012 at 09:47:52AM +0530, PANKAJ RAWAT wrote:
> I am currently using backing file.The question of my concern is regarding
> the I/O operation
> Now when we create a external snapshot in qcow2, a new file is created
> leaving the original file as backing file
> *
> Can any one tell,*
On Tue, Mar 27, 2012 at 07:43:17PM +0800, zwu.ker...@gmail.com wrote:
> From: Zhi Yong Wu
>
> Signed-off-by: Stefan Hajnoczi
> Signed-off-by: Zhi Yong Wu
> ---
> block.c | 10 ++
> 1 files changed, 10 insertions(+), 0 deletions(-)
I tested this successfully with if=virtio and if=ide
On Tue, Mar 27, 2012 at 09:49:18PM +0200, Lluís Vilanova wrote:
> diff --git a/scripts/tracetool.py b/scripts/tracetool.py
> new file mode 100755
> index 000..70bf79a
> --- /dev/null
> +++ b/scripts/tracetool.py
> @@ -0,0 +1,110 @@
> +#!/usr/bin/env python
> +# -*- coding: utf-8 -*-
> +
> +"""
Il 30/03/2012 09:19, Stefan Hajnoczi ha scritto:
>> > +void block_job_cancel_sync(BlockJob *job)
>> > +{
>> > +BlockDriverState *bs = job->bs;
>> > +
>> > +assert(bs->job == job);
>> > +block_job_cancel(job);
>> > +while (bs->job != NULL && bs->job->busy) {
> It's not clear to me wh
On Thu, Mar 29, 2012 at 01:56:40PM -0300, Luiz Capitulino wrote:
> V2:
>
> o change qdev_unplug() to return void (this allows some simplifications)
> o rename pci_device_hot_remove() 'errp' var to 'local_err'
> o minor changelog fixes
>
> hmp-commands.hx |3 +--
> hmp.c|
On Thu, Mar 29, 2012 at 06:08:40PM +0200, Paolo Bonzini wrote:
> Streaming can issue I/O while qcow2_close is running. This causes the
> L2 caches to become very confused or, alternatively, could cause a
> segfault when the streaming coroutine is reentered after closing its
> block device. The fi
On 03/30/2012 01:14 AM, Andreas Färber wrote:
Hello Xuetao,
This updated series converts the UniCore32 CPU to QOM. In addition to
addressing review comments from v1, a new approach for CPU-dependent
values has been adopted: We should keep setting of features imperative
and can avoid adding new c
On 03/30/2012 01:14 AM, Andreas Färber wrote:
This is to limit relicensing obstacles to the pending IBM investigation.
Signed-off-by: Andreas Färber
---
target-unicore32/helper.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/target-unicore32/helper.c b/target-unic
On 03/30/2012 01:14 AM, Andreas Färber wrote:
Embed CPUUniCore32State as first member of UniCore32CPU.
Contributed under GPLv2+.
Signed-off-by: Andreas Färber
Acked-by: Guan Xuetao
---
Makefile.target|1 +
target-unicore32/cpu-qom.h | 59 +
t
On 03/30/2012 01:14 AM, Andreas Färber wrote:
Instead of setting values in a CPUID switch, do so in initfn functions.
Signed-off-by: Andreas Färber
Acked-by: Guan Xuetao
---
target-unicore32/cpu.c| 14 ++
target-unicore32/helper.c | 23 ---
2 files
From: Zhi Yong Wu
Signed-off-by: Stefan Hajnoczi
Signed-off-by: Zhi Yong Wu
---
block.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/block.c b/block.c
index 1fbf4dd..6de6f89 100644
--- a/block.c
+++ b/block.c
@@ -1477,6 +1477,17 @@ static int b
On Fri, Mar 30, 2012 at 3:13 PM, Stefan Hajnoczi
wrote:
> On Tue, Mar 27, 2012 at 07:43:17PM +0800, zwu.ker...@gmail.com wrote:
>> From: Zhi Yong Wu
>>
>> Signed-off-by: Stefan Hajnoczi
>> Signed-off-by: Zhi Yong Wu
>> ---
>> block.c | 10 ++
>> 1 files changed, 10 insertions(+), 0 d
On 03/30/12 09:53, Hans de Goede wrote:
> The sofv value only ever gets a value assigned and is never used (read)
> anywhere, so we can just drop it.
Both patches added to usb patch queue.
thanks,
Gerd
Hi,
Am 30.03.2012 09:11, schrieb Wanpeng Li:
> Are there any materials introduce how to use the scripts under scripts/
> ?
Is this a general question about improving our scripts' documentation,
or are you asking about one or more specific scripts? I'm aware of
instructions for checkpatch.pl, get_
Am 27.03.2012 04:43, schrieb David Gibson:
> A while back, we introduced the dma_addr_t type, which is supposed to
> be used for bus visible memory addresses. At present, this is an
> alias for target_phys_addr_t, but this will change when we eventually
> add support for guest visible IOMMUs.
>
>
Am 30.03.2012 11:32, schrieb Andreas Färber:
> Am 27.03.2012 04:43, schrieb David Gibson:
>> A while back, we introduced the dma_addr_t type, which is supposed to
>> be used for bus visible memory addresses. At present, this is an
>> alias for target_phys_addr_t, but this will change when we event
On Fri, Mar 30, 2012 at 11:28:53AM +0200, Andreas Färber wrote:
>Am 30.03.2012 09:11, schrieb Wanpeng Li:
>> Are there any materials introduce how to use the scripts under scripts/
>> ?
>
>Is this a general question about improving our scripts' documentation,
>or are you asking about one or more s
Il 30/03/2012 10:31, Paolo Bonzini ha scritto:
> However, even this is not enough. It fixes a race with closing, but not
> with deleting bs. So the bug does not show anymore when you quit QEMU
> (because the coroutine is not restarted), but it is still there if you
> hot-unplug a device while str
Signed-off-by: Andreas Färber
---
Peter, can you still squash this into your pull? Forgot to re-add in v6.
target-arm/cpu-qom.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index cf107c9..42d2a6b 100644
--- a/target-arm/cp
On 30 March 2012 11:07, Andreas Färber wrote:
> Signed-off-by: Andreas Färber
> ---
> Peter, can you still squash this into your pull? Forgot to re-add in v6.
Sure, done.
-- PMM
On Fri, Mar 30, 2012 at 9:31 AM, Paolo Bonzini wrote:
> Il 30/03/2012 09:19, Stefan Hajnoczi ha scritto:
>>> > +void block_job_cancel_sync(BlockJob *job)
>>> > +{
>>> > + BlockDriverState *bs = job->bs;
>>> > +
>>> > + assert(bs->job == job);
>>> > + block_job_cancel(job);
>>> > + whil
This is to limit relicensing obstacles to the pending IBM investigation.
Signed-off-by: Andreas Färber
Acked-by: Guan Xuetao
---
target-unicore32/helper.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c
index 6af49
Signed-off-by: Andreas Färber
Acked-by: Guan Xuetao
---
MAINTAINERS |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index f83d07c2..922945c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -112,6 +112,11 @@ M: Blue Swirl
S: Maintained
F: tar
From: Andreas Färber
Introduce only one non-abstract type TYPE_ARM_CPU and do not touch
cp15 registers to not interfere with Peter's ongoing remodelling.
Embed CPUARMState as first (additional) field of ARMCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas Färber
On Fri, Mar 30, 2012 at 9:50 AM, wrote:
> + * When all sync I/O drivers are converted to async I/O, it will be
> restored
> + * to the original state.
The problem here is that guess_disk_lchs() uses bdrv_read(), not
whether device emulation uses sync or async I/O. Converting devices
to
Il 30/03/2012 12:25, Stefan Hajnoczi ha scritto:
> On Fri, Mar 30, 2012 at 9:31 AM, Paolo Bonzini wrote:
>> Il 30/03/2012 09:19, Stefan Hajnoczi ha scritto:
> +void block_job_cancel_sync(BlockJob *job)
> +{
> +BlockDriverState *bs = job->bs;
> +
> +assert(bs->job == job
On 03/29/2012 11:17 PM, Jia Liu wrote:
> +save_cpu_state(ctx, 1);
> +gen_op_addr_add(ctx, addr, cpu_gpr[rs], cpu_gpr[rt]);
> +op_ld_lh(cpu_gpr[rd], addr, ctx);
You should't need to save pc state in these; this should be
comparable to
>
On Fri, Mar 30, 2012 at 7:52 AM, Wanpeng Li wrote:
> Consider of the options parsing process in main function of vl.c is too long.
> It should be module into single function to clear Ideas, strengthen the
> source code
> management, and increase code readability.
I suggest sending a patch to sho
From: Paolo Bonzini
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Maydell
---
hw/pl031.c | 39 ---
1 files changed, 24 insertions(+), 15 deletions(-)
diff --git a/hw/pl031.c b/hw/pl031.c
index 69abc4f..713f85d 100644
--- a/hw/pl031.c
+++ b/hw/pl031.c
From: Paolo Bonzini
This lets the user specify the desired semantics. By default, the RTC
will follow adjustments from the host's NTP client, and will remain in
sync when the virtual machine is stopped. The previous behavior, which
provides determinism with both icount and qtest, remains availa
From: Paolo Bonzini
The output of the pulse generator needs to be deterministic when
running in -icount mode, and to remain constant whenever the VM is
stopped. So the right clock to use is vm_clock.
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Maydell
---
hw/omap1.c |6 +++---
1 fi
Hi; this is a pullreq for my target-arm queue; please pull.
The following changes since commit f638f0d3ae214d995cdd94578195700cda24597b:
qemu tcg: Remove one entry of INDEX_op_ld_i64 from ppc_op_defs (2012-03-29
11:10:08 +0400)
are available in the git repository at:
git://git.linaro.org/pe
From: Andrew Towers
This patch replaces the ARM_FEATURE_VFP3 test when reading MVFR registers
with a test for a new feature flag ARM_FEATURE_MVFR, and sets this feature
for all ARMv6K cores (ARM1156 is not a v6K core, yet supports MVFR; qemu
does not support ARM1156 at this time.)
MVFR0 and MVFR
Embed CPUUniCore32State as first member of UniCore32CPU.
Contributed under GPLv2+.
Signed-off-by: Andreas Färber
Acked-by: Guan Xuetao
---
Makefile.target|1 +
target-unicore32/cpu-qom.h | 59 +
target-unicore32/cpu.c | 90 +++
From: Paolo Bonzini
This will let people use backwards-compatible semantics for devices that
will be affected by the following patches.
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Maydell
---
qemu-options.hx |7 ---
vl.c|2 ++
2 files changed, 6 insertions(+), 3
Usual fortnightly pullreq for arm-devs: this just has Paolo's rtc
related changes. Please pull.
thanks
-- PMM
The following changes since commit f638f0d3ae214d995cdd94578195700cda24597b:
qemu tcg: Remove one entry of INDEX_op_ld_i64 from ppc_op_defs (2012-03-29
11:10:08 +0400)
are available
From: Paolo Bonzini
This lets the user specify the desired semantics. By default, the RTC
will follow adjustments from the host's NTP client. "-rtc clock=vm" will
improve determinism with both icount and qtest. Finally, the previous
behavior is available with "-rtc clock=rt".
Signed-off-by: P
From: Alon Levy
Signed-off-by: Alon Levy
Signed-off-by: Stefan Hajnoczi
---
Makefile.target |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Makefile.target b/Makefile.target
index 44b2e83..9f3c100 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -58,7 +58,7 @@ el
From: Lee Essen
If there are "disabled" entries in the trace-events file then
linetod_nop() is called if the backend is dtrace, it's currently
not present. Also equivalent fix for stap.
Signed-off-by: Lee Essen
Signed-off-by: Stefan Hajnoczi
---
scripts/tracetool | 12
1 files
From: Alon Levy
Signed-off-by: Alon Levy
Signed-off-by: Stefan Hajnoczi
---
scripts/tracetool | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/scripts/tracetool b/scripts/tracetool
index a279c2c..5e77aa2 100755
--- a/scripts/tracetool
+++ b/scripts/tracetool
@@
The latest tracing fixes.
Alon Levy (2):
Makefile.target: code stp dependency on trace-events
tracetool: dtrace: handle in and next reserved words
Lee Essen (1):
tracetool: dtrace disabled-events fix
Makefile.target |2 +-
scripts/tracetool | 22 ++
2 files cha
From: Andreas Färber
It's unused, so no need to QOM'ify it later.
Signed-off-by: Andreas Färber
Signed-off-by: Peter Maydell
---
target-arm/cpu.h|1 -
target-arm/helper.c |5 -
2 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
i
On 03/29/2012 11:17 PM, Jia Liu wrote:
> +int32_t temp;
> +uint32_t rd;
> +int i, last;
> +
> +temp = rt & MIPSDSP_LO;
> +rd = 0;
> +for (i = 0; i < 16; i++) {
> +last = temp % 2;
> +temp = temp >> 1;
temp should not be signed, as that % doesn't do what you
Adopt the license text suggested by Guan Xue-tao (with a minor
simplification) for all target-unicore/ files except helper.c.
To helper.c Anthony Liguori contributed a qemu_malloc() -> g_malloc()
conversion, still pending IBM relicensing approval, so that remains
GPLv2 for now.
By relicensing all
Instead of setting values in a CPUID switch, do so in initfn functions.
Signed-off-by: Andreas Färber
Acked-by: Guan Xuetao
---
target-unicore32/cpu.c| 14 ++
target-unicore32/helper.c | 23 ---
2 files changed, 14 insertions(+), 23 deletions(-)
diff --g
This patch includes a few small changes to the job API. Do not be
fooled by the diffstat, since that is mostly due to the new documentation
in patch 4.
Patch 3 has a small change to the BlockJobType interface, because I
found hard to document the old one.
Paolo Bonzini (4):
block: cancel jobs
We do not want jobs to keep a device busy for a possibly very long
time, and management could become confused because they thought a
device was not even there anymore. So, cancel long-running jobs
as soon as their device is going to disappear.
Signed-off-by: Paolo Bonzini
---
blockdev.c |3
I am not sure that these are really proper GtkDoc, but they follow
the existing documentation in block_int.h.
Signed-off-by: Paolo Bonzini
---
block_int.h | 115 +--
1 files changed, 112 insertions(+), 3 deletions(-)
diff --git a/block_in
Hello Anthony or Blue,
Please pull the unicore32 QOM CPU conversion.
Due to my alphabetical ordering in Makefile.target, it is independent
of Peter's upcoming ARM pull.
Cc: Anthony Liguori
Cc: Blue Swirl
Cc: Guan Xuetao
Cc: Peter Maydell
The following changes since commit f638f0d3ae214d995
Streaming can issue I/O while qcow2_close is running. This causes the
L2 caches to become very confused or, alternatively, could cause a
segfault when the streaming coroutine is reentered after closing its
block device. The fix is to cancel streaming jobs when closing their
underlying device.
Th
Not sure what the purpose of the assert() was, in any case it is bogous.
We can arrive there if transfer descriptors passed to us from the guest
failed to pass sanity checks, i.e. it is guest-triggerable. We deal
with that case by resetting the host controller. Everything is ok, no
need to throw
There is no need to do this in every implementation of set_speed
(even though there is only one right now).
Signed-off-by: Paolo Bonzini
---
block.c|8 +++-
block/stream.c |1 -
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/block.c b/block.c
index f244f99..3b
On 03/29/2012 11:17 PM, Jia Liu wrote:
> This is MIPS ASE DSP instructions support for QEMU. These instructions
> are grouped according to "Chapter 4. MIPS DSP ASE Instruction Summary"
> in MIPS ASE DSP manual [1].
>
> [1] MIPS32® Architecture for Programmers VolumeIV-e: The MIPS® DSP
> Applic
On Fri, Mar 30, 2012 at 7:42 PM, Richard Henderson wrote:
> On 03/29/2012 11:17 PM, Jia Liu wrote:
>> This is MIPS ASE DSP instructions support for QEMU. These instructions
>> are grouped according to "Chapter 4. MIPS DSP ASE Instruction Summary"
>> in MIPS ASE DSP manual [1].
>>
>> [1] MIPS32® Ar
On Fri, Mar 30, 2012 at 7:05 PM, Richard Henderson wrote:
> On 03/29/2012 11:17 PM, Jia Liu wrote:
>> + int32_t temp;
>> + uint32_t rd;
>> + int i, last;
>> +
>> + temp = rt & MIPSDSP_LO;
>> + rd = 0;
>> + for (i = 0; i < 16; i++) {
>> + last = temp % 2;
>> + temp =
On Thu, Mar 29, 2012 at 01:52:31PM -0600, Alex Williamson wrote:
> On Thu, 2012-03-29 at 21:38 +0200, Michael S. Tsirkin wrote:
> > On Thu, Mar 29, 2012 at 10:53:38AM -0600, Alex Williamson wrote:
> > > On Thu, 2012-03-29 at 14:51 +0200, Michael S. Tsirkin wrote:
> > > > piix acpi interface suffers
Consider of the options parse process in main function of vl.c is too
long.It should be module into single function to clear ideas, strengthen
the source code management, and increase code readability.So I module the
process of options parse as function options_parse, and expose some variables
in
None of the machines in QEMU offer a JTAG debug interface, so this info
was unused. Further, the PXA250 ID contradicts the February 2002
Developer's Manual, which has it as 0xn9264013 with n the MIDR Revision.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |2 --
1 files changed, 0 ins
Move feature register value setup to per-CPU init functions.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h | 14
target-arm/cpu.c | 91 ++
target-arm/helper.c | 73
3 files change
Move the OMAP-specific cp15_i_{max,min} reset to cpu_state_reset;
since these registers are only accessible on CPUs with the
OMAPCP feature set there's no need to guard this reset with
either a CPUID or feature bit check.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |3 +--
1 files c
Move CTR (cache type register) value to an ARMCPU field
set up by per-cpu init fns.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c | 22 ++
target-arm/helper.c | 13 +
3 files changed, 24 insertions(+), 12 deletions(-)
d
Now that cpu_reset_model_id() has gone we can move the
reset code over to the class reset function and have cpu_state_reset
simply do a reset on the CPU QOM object.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c| 94 +++--
target-arm/helper.c
On 03/30/2012 07:42 AM, Richard Henderson wrote:
> All of your helpers, whereever they receive or return a register value, need
> to use
> type target_ulong and the DEF_HELPER lines need to use "tl". All of the
> mips32
> helpers you've written so far that return values need to make sure to
> s
Move the reset FPSID to the ARMCPU struct, and set it in the
per-implementation instance init function. At reset we then
just copy the reset value into the CPUARMState field.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c |9 +
target-arm/helper.
On Fri, Mar 30, 2012 at 08:36:43PM +0800, Wanpeng Li wrote:
> Consider of the options parse process in main function of vl.c is too
> long.It should be module into single function to clear ideas, strengthen
> the source code management, and increase code readability.So I module the
> process of op
On Fri, 30 Mar 2012 09:49:20 +0200
Paolo Bonzini wrote:
> Regarding device_add ? and device_add foo,? I would implement it as
> separate QMP commands hooking into QOM, such as qom_list_types (taking
> the superclass as an optional argument) and qom_properties. But the
> latter first needs static
On Thu, 29 Mar 2012 11:55:31 -0600
Eric Blake wrote:
> On 03/29/2012 10:56 AM, Luiz Capitulino wrote:
> > Signed-off-by: Anthony Liguori
> > Signed-off-by: Luiz Capitulino
> > ---
> > hmp-commands.hx |3 +--
> > hmp.c |9 +
> > hmp.h |1 +
> > hw/q
On 03/30/2012 07:36 AM, Wanpeng Li wrote:
Consider of the options parse process in main function of vl.c is too
long.It should be module into single function to clear ideas, strengthen
the source code management, and increase code readability.So I module the
process of options parse as function o
On 03/26/2012 11:56 AM, Alon Levy wrote:
Hi Anthony,
Some small fixes for libcacard to handle starting when no readers
are available, and reader removal and reinsertion while running.
Sent last weekend, no comments so far so I'm sending a pull request.
Thanks,
Alon
The following changes
On 03/27/2012 11:14 AM, Stefano Stabellini wrote:
Hi Anthony,
I have a couple of old Xen one-line fixes laying around:
Stefano Stabellini (2):
xen_console: ignore console disconnect events from console/0
xen_disk: detach the blkdev before bdrv_delete
hw/xen_console.c |3 +++
On 03/27/2012 07:20 AM, Luiz Capitulino wrote:
All of them are QAPI fixes.
The changes (since 8a22565b7c2d1920b02b94e7a8021c65895a3a22) are available
in the following repository:
git://repo.or.cz/qemu/qmp-unstable.git queue/qmp
Pulled. Thanks.
Regards,
Anthony Liguori
Laszlo Ersek
On 03/27/2012 10:48 AM, Stefano Stabellini wrote:
Anthony,
please pull this small patch series that allows xen_disk to be used
correctly with NATIVE_AIO and O_DIRECT.
This series should be backported to the stable branch too.
Pulled. Thanks.
Regards,
Anthony Liguori
Stefano Stabellini (2
cpu_reset_model_id() is now empty and we can remove it.
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 59 +--
1 files changed, 1 insertions(+), 58 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 5c4cfee..f48108
Register subclasses for each ARM CPU implementation (with the
exception of "pxa270", which is an alias for "pxa270-a0").
Let arm_cpu_list() enumerate CPU subclasses in alphabetical order,
except for special value "any".
Replace cpu_arm_find_by_name()'s string -> CPUID lookup by storing the
CPUID
Move the iWMMXT wCID reset to cpu_state_reset(). Since
we use the same value for all CPUs with this feature
(with the major/minor revision fields set to the QEMU
specific 'Q' value) there's no need to create an ARMCPU
field just for this.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |
On Fri, Mar 30, 2012 at 01:53:14PM +0100, Daniel P. Berrange wrote:
>On Fri, Mar 30, 2012 at 08:36:43PM +0800, Wanpeng Li wrote:
>> Consider of the options parse process in main function of vl.c is too
>> long.It should be module into single function to clear ideas, strengthen
>> the source code ma
On Fri, Mar 30, 2012 at 12:17 PM, Paolo Bonzini wrote:
> Streaming can issue I/O while qcow2_close is running. This causes the
> L2 caches to become very confused or, alternatively, could cause a
> segfault when the streaming coroutine is reentered after closing its
> block device. The fix is to
Move the A9 config_base_address cp15 register reset value to
ARMCPU. This should become a QOM property so that the Highbank
board can set it without having to pull in cpu-qom.h, but at
least this avoids the implicit dependency on reset ordering
that the previous workaround had.
Cc: Mark Langsdorf
This patch series builds on Andreas' basic QOMification of the ARM
CPU by creating a QOM subclass for each ARM CPU implementation
(926,1176,A8,etc). We can then move the setup of feature bits, register
reset values, constant ID register values, etc, from the big switch
statement in cpu_reset_model_
On Mon, Mar 26, 2012 at 03:07:18PM +0200, Cedric VINCENT wrote:
> This reverts commit fd4bab10 "target-sh4: optimize exceptions": the
> function cpu_restore_state() isn't expected to be called in user-mode,
> as a consequence it isn't protected from race conditions. For
> information, syscalls are
Move the MVFR* VFP feature register values to ARMCPU,
so they are set up by the implementation-specific instance
init functions rather than in cpu_reset_model_id().
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |2 ++
target-arm/cpu.c | 14 ++
target-arm/helper.c |
On Fri, Mar 30, 2012 at 12:17 PM, Paolo Bonzini wrote:
> This patch includes a few small changes to the job API. Do not be
> fooled by the diffstat, since that is mostly due to the new documentation
> in patch 4.
>
> Patch 3 has a small change to the BlockJobType interface, because I
> found hard
Move cache ID register reset out of cpu_reset_model_id() by
creating a field for the reset value in ARMCPU and setting it
up in the cpu specific init functions.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |2 ++
target-arm/cpu.c | 11 +++
target-arm/helper.c | 13 +
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