On Wed, May 16, 2012 at 7:58 AM, nicolas.sauzede
wrote:
>> First, please don't top-post and please don't use HTML emails.
>
> Sorry about that.
>
>> Yes, there is work towards getting rid of implicit AREG0 env. This will
>> be leading towards removing the register-pinned AREG0.
>
> Will this AREG0
On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
> add the openrisc syscall, signal and termbits for linux-user.
>
> Signed-off-by: Jia Liu
> ---
> linux-user/openrisc/syscall.h | 24 ++
> linux-user/openrisc/syscall_nr.h | 506
> +++
> linux-user/open
On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
> add the openrisc exception support.
>
> Signed-off-by: Jia Liu
> ---
> Makefile.target | 2 +-
> target-openrisc/excp.c | 27 +++
> target-openrisc/excp.h | 28 +++
Il 19/05/2012 00:26, Benjamin Herrenschmidt ha scritto:
>> In theory you would need a memory barrier before the first ld/st and one
>> after the last... considering virtio uses map/unmap, what about leaving
>> map/unmap and ld*_phys/st*_phys as the high performance unsafe API?
>> Then you can add b
On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
> add the openrisc interrupt support.
>
> Signed-off-by: Jia Liu
> ---
> Makefile.target | 2 +-
> target-openrisc/helper.c | 42 +++
> target-openrisc/helper.h | 3 +++
> target-openri
On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
> add the openrisc MMU support.
>
> Signed-off-by: Jia Liu
> ---
> Makefile.target | 2 +
> hw/openrisc_cpudev.h | 30 ++
> hw/openrisc_pic.c | 31 ++
> target-openrisc/mem.c | 220
> +
On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
> add a simulation board for openrisc.
>
> Signed-off-by: Jia Liu
> ---
> Makefile.target | 1 +
> hw/openrisc_sim.c | 140
> +
> 2 files changed, 141 insertions(+)
> create mode 100644 hw
On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
> add the openrisc float instruction helpers.
>
> Signed-off-by: Jia Liu
> ---
> Makefile.target | 2 +-
> target-openrisc/fpu_helper.c | 93
> ++
> target-openrisc/helper.h | 6 +++
On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
> add the openrisc programmable interrupt controller support.
>
> Signed-off-by: Jia Liu
> ---
> cpu-exec.c | 17 +
> hw/openrisc_pic.c | 48
> 2 files changed, 65 insertio
On 16 May 2012 23:08, Jim Meyering wrote:
> From: Jim Meyering
>
> Use g_malloc/g_free in place of malloc/free.
>
> Signed-off-by: Jim Meyering
Acked-by: Matthew Fernandez
> ---
> softmmu-semi.h | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/softmmu-semi.h b/s
On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
> add the openrisc target stub and basic implementation.
>
> Signed-off-by: Jia Liu
> ---
> Makefile.target | 3 +
> arch_init.c | 2 +
> arch_init.h | 1 +
> configure
Hi Blue,
Thank you very much for helpful comment.
On Sat, May 19, 2012 at 3:17 PM, Blue Swirl wrote:
> On Thu, May 17, 2012 at 8:35 AM, Jia Liu wrote:
>> add the openrisc syscall, signal and termbits for linux-user.
>>
>> Signed-off-by: Jia Liu
>> ---
>> linux-user/openrisc/syscall.h |
On Fri, May 18, 2012 at 07:38:39PM +0800, Zhi-zhou Zhang wrote:
> Hi Aurelien,
>
> I found that when qemu-system-mips64el executed 'movz' with -M mips, it
> would raise a reserved instruction exception.
> The mips spec describes movz as below:
>
> Mnemonic Instructio
On Thu, May 17, 2012 at 11:07 PM, Paul Wilhelm wrote:
> Sirs,
>
> I've been trying to debug a problem with Solaris 8 running on sparc-softmmu.
> The syslog daemon in very unreliable (about 7 of 8 starts of the syslog
> daemon end in a daemon hang - the daemon can be "killed" and restarted
> manual
On 19 May 2012 08:13, Blue Swirl wrote:
> nicolas.sauzede wrote:
>> Well, for example, we have the issue where we need to know if
>> the cpu that performs a hardware io is in priviledged/secure mode,
>> because some HW devices implemented in TLM requires such special
>> flags on certain register a
On 19 May 2012 11:02, Blue Swirl wrote:
>> +static inline uint32_t field(uint32_t val, int start, int length)
>> +{
>> + val >>= start;
>> + val &= ~(~0 << length);
>> + return val;
>> +}
>
> Nice function, maybe I could use it in Sparc as well if generalized (later).
We should totally h
On Sat, May 19, 2012 at 10:57 AM, Peter Maydell
wrote:
> On 19 May 2012 11:02, Blue Swirl wrote:
>>> +static inline uint32_t field(uint32_t val, int start, int length)
>>> +{
>>> + val >>= start;
>>> + val &= ~(~0 << length);
>>> + return val;
>>> +}
>>
>> Nice function, maybe I could us
Add a simple register fuzzing test to floppy controller tests.
Signed-off-by: Blue Swirl
---
There's a lot of output like:
GTESTER check-qtest-i386
FLOPPY ERROR: fdctrl_read_data: controller not ready for reading
FLOPPY ERROR: fdctrl_read_data: controller not ready for reading
FLOPPY ERROR: fdctr
On 16 May 2012 14:08, Jim Meyering wrote:
> From: Jim Meyering
>
> Use g_malloc/g_free in place of malloc/free.
>
> Signed-off-by: Jim Meyering
> ---
> softmmu-semi.h | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/softmmu-semi.h b/softmmu-semi.h
> index 648cb95..
On Tue, May 15, 2012 at 1:04 PM, wrote:
> From: Jim Meyering
>
> Without this, envlist_to_environ may silently fail to copy all
> strings into the destination buffer, and both callers would leak
> any env strings allocated after a failing strdup, because the
> freeing code stops at the first NUL
On Sat, May 12, 2012 at 6:52 PM, Artyom Tarasenko wrote:
> This was an annoying bug, thanks for fixing it!
>
> Tested-by: Artyom Tarasenko
Applied.
>
> On Sat, May 12, 2012 at 7:30 PM, Blue Swirl wrote:
>> Initrd load address is too low, it conflicts with kernel load
>> address:
>> rom: reques
On Sat, May 12, 2012 at 9:04 PM, Stefan Weil wrote:
> Am 12.05.2012 21:47, schrieb Blue Swirl:
>
>> There are no outside references to virtio_portio.
>> Add missing 'static' specifier.
>>
>> Signed-off-by: Blue Swirl
>> ---
>> hw/virtio-pci.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-
Thanks, applied.
On Sun, May 13, 2012 at 6:39 PM, Andreas Färber wrote:
> Am 26.11.2011 14:37, schrieb Richard Sandiford:
>> There's some dodgy application of De Morgan's law in the emulation
>> of the MIPS BC1ANY[24]F instructions: they end up branching only
>> if all CCs are false, rather than
On Tue, May 15, 2012 at 8:33 PM, Peter Maydell wrote:
> On 15 May 2012 21:20, Anthony Liguori wrote:
>> On 05/15/2012 11:42 AM, Peter Maydell wrote:
>>> In this case it is a regression...
>
>> At what point did it regress? I don't recall win64 ever working uner TCG...
>
> Sorry, I had in mind th
Thanks, applied.
On Tue, May 15, 2012 at 4:19 PM, Stefan Weil wrote:
> Commit 93e9eb6808c886f5f1c903b7ced1eed65de2ba39 added fdc-test,
> but accidentally removed rtc-test because check-qtest-i386-y was
> not enhanced but set twice.
>
> This patch adds rtc-test again (and sorts both tests alphabet
From: Amos Kong
Hotplug CallTrace:
int acpiphp_enable_slot(struct acpiphp_slot *slot)
\_enable_device(slot);
\_pci_bus_add_devices(bus);
# un-added new devs(all funcs in slot) will be added
list_for_each_entry(dev, &bus->devices, bus_list) {
if (
On Wed, May 16, 2012 at 11:26 PM, Bjorn Helgaas wrote:
> On Fri, May 11, 2012 at 8:00 AM, Jiang Liu wrote:
>> On 05/11/2012 08:24 AM, Amos Kong wrote:
>>> On 05/11/2012 07:54 AM, Amos Kong wrote:
On 05/11/2012 02:55 AM, Michael S. Tsirkin wrote:
> On Fri, May 11, 2012 at 01:09:13AM +0800
From: Amos Kong
Hotplug CallTrace:
int acpiphp_enable_slot(struct acpiphp_slot *slot)
\_enable_device(slot);
\_pci_bus_add_devices(bus);
# un-added new devs(all funcs in slot) will be added
list_for_each_entry(dev, &bus->devices, bus_list) {
if (
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