From: Wenchao Xia
In this example, at first it will create some qcow2 images, then get
information including backing file relationship. Then it will do sync IO on
the image.
Signed-off-by: Wenchao Xia
---
tests/libqblock/libqblock-qcow2.c | 392 -
1 files
From: Wenchao Xia
This patch added build system for testing libqblock, make check-libqblock
will build and test it, make clean or make check-clean will delete generated
binaries.
Signed-off-by: Wenchao Xia
---
.gitignore|2 ++
Makefile |
From: Wenchao Xia
This patch contains the major APIs in the library. For ABI some reserved
members were used.
Important APIs:
1 QBlockContext. This structure was used to retrieve errors, every thread
must create one first.
2 QBlockState. It stands for an block image object.
3 QBlockStatic
From: Wenchao Xia
This patch contains type and macro defines used in APIs, one file for public
usage by user, one for libqblock internal usage.
Signed-off-by: Wenchao Xia
---
libqblock/libqblock-internal.h | 75
libqblock/libqblock-types.h| 252 +++
From: Wenchao Xia
Libqblock was placed in new directory ./libqblock, libtool will build
dynamic library there, source files of block layer remains in ./block.
So block related source code will generate 3 sets of binary, first is old
ones used in qemu, second and third are non PIC and PIC ones i
From: Wenchao Xia
This patch introduce libqblock API, make libqblock.la and make check-libqblock
could build this library.
Functionalities:
1 create a new image.
2 sync access of an image.
3 basic image information retrieving such as backing file.
4 detect if a sector is allocated in an ima
On 06.10.2012, at 20:35, Aurelien Jarno wrote:
> On Thu, Oct 04, 2012 at 06:55:35PM +0200, Alexander Graf wrote:
>> When booting our e500 machine, we automatically generate a big TLB entry
>> in TLB1 that covers all of the code we need to run in there until the guest
>> can handle its TLB on it
On Sun, 2012-10-07 at 00:54 +1000, David Gibson wrote:
> I also don't see how it helps in this situation. The hotplug will
> still be initiated by qemu, so we'd have to work out how qemu
> communicates the info to RTAS, and how RTAS communicates it to the
> kernel, doubling the work.
This is not
On Fri, Oct 05, 2012 at 04:00:20PM +0200, Stefan Hajnoczi wrote:
> The following changes since commit a14c74928ba1fdaada515717f4d3c3fa3275d6f7:
>
> Merge remote-tracking branch 'sstabellini/xen-2012-10-03' into staging
> (2012-10-04 19:56:26 -0500)
>
> are available in the git repository at:
>
On Sat, Oct 06, 2012 at 12:46:15PM +0200, Stefan Weil wrote:
> Commit 610b823ef66b993660f1ab1447a769f190e4f3b3 uses QEMU_GNUC_PREREQ
> on i386 hosts.
>
> That macro is defined in qemu-common.h which is not always included
> before qemu-barrier.h, so compilation on i386 hosts was broken.
>
> Signe
On Fri, Oct 05, 2012 at 03:35:18PM +0100, Peter Maydell wrote:
> Usual target-arm pullreq; mostly Aurelien's performance
> improvement patches. The 'drop macro' patch has only been on
> the list a few days but it's completely trivial so I threw it
> in too. Please pull.
>
> thanks
> -- PMM
>
> Th
On Thu, Oct 04, 2012 at 03:56:22PM +0200, Alexander Graf wrote:
> Hi Blue / Aurelien,
>
> This is my current patch queue for ppc. Please pull.
>
> Alex
>
> The following changes since commit e744c06fca438dc08271e626034e632a270c91c8:
> Peter Maydell (1):
> fpu/softfloat.c: Return correc
On Thu, Oct 04, 2012 at 06:55:35PM +0200, Alexander Graf wrote:
> When booting our e500 machine, we automatically generate a big TLB entry
> in TLB1 that covers all of the code we need to run in there until the guest
> can handle its TLB on its own.
>
> However, e500v2 can only handle MAS1.0 sizes
Postpone stopping the dirty log to the point where the command fifo is
configured to allow drivers which don't use the fifo to work too.
(Without this the picture rendered into the vram never got to the
screen and the DIRECT_VRAM option meant to support this case was
removed a year ago.)
Signed-o
On Mon, Sep 24, 2012 at 02:21:38PM -0700, Richard Henderson wrote:
> The second patch comes from the target-s390 patch set I've been
> working on. The first patch has been split out from that. The
> third patch provides tcg_high_cond globally, as the 32-bit sparc
> port suffers from the same bug
On Fri, Oct 05, 2012 at 04:36:46AM +0200, Alexander Graf wrote:
> In the sregs API, upper and lower 32bit segments of the BAT registers
> are swapped when doing a set. Since we need to support old kernels out
> there, don't bother to fix it in the kernel, but instead work around
> the problem in QE
According to the documentation drivers using this device should read
FB_SIZE before enabling the device to know what memory to map. This
would not work if we return 0 before enabled. The docs also mention
reading SVGA_REG_DEPTH but not writing it. (Only SVGA_REG_BITS_PER_PIXEL
can be written but w
Removed info from vmsvga_state that is available from elsewhere and
thus was duplicated here unnecessarily.
Signed-off-by: BALATON Zoltan
---
console.h | 20 +++
hw/vmware_vga.c | 156 +++
2 files changed, 84 insertions(+), 92 del
Fix coding style as suggested by checkpatch.pl
Signed-off-by: BALATON Zoltan
---
hw/vmware_vga.c | 283 ++-
1 file changed, 156 insertions(+), 127 deletions(-)
v3: More complete code style cleanup now in a separate patch
diff --git a/hw/vm
Hi everyone,
I'm stuck with a problem I'm having with qemu that google unfortunately does
not provide any satisfactory answers to.I've been trying for weeks to read
video discs under qemu (kvm) and was eventually following this guide to get
some sort of low-level access to my dvd/bd
drive:http:
This improves readability.
Signed-off-by: MORITA Kazutaka
---
block/sheepdog.c | 70 +++---
1 files changed, 35 insertions(+), 35 deletions(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index 4742f8a..3c88c59 100644
--- a/block/sheepdog.c
On Thu, Sep 27, 2012 at 09:24:44PM +0800, Jia Liu wrote:
> Add MIPS ASE DSP GPR-Based Shift instructions.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/dsp_helper.c | 256 +++
> target-mips/helper.h | 38 ++
> target-mips/translate.c | 332
> +++
On Thu, Sep 27, 2012 at 09:24:41PM +0800, Jia Liu wrote:
> Add MIPS ASE DSP Branch instructions.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/translate.c | 36
> 1 file changed, 36 insertions(+)
>
> diff --git a/target-mips/translate.c b/target-mips/tran
On Sat, Oct 06, 2012 at 06:49:13AM +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2012-10-05 at 09:42 -0500, Anthony Liguori wrote:
> > > - We have a problem with PCI. Currently, the content of the PCI
> > > bus(ses) is discovered by SLOF running inside the guest. Not by qemu.
> > > It's SLOF that
On Thu, Sep 27, 2012 at 09:24:47PM +0800, Jia Liu wrote:
> Add MIPS ASE DSP Compare-Pick instructions.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/dsp_helper.c | 235 ++
> target-mips/helper.h | 52 +++
> target-mips/translate.c | 356
> ++
On Thu, Sep 27, 2012 at 09:24:42PM +0800, Jia Liu wrote:
> Add MIPS ASE DSP Load instructions.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/translate.c | 84
> +++
> 1 file changed, 84 insertions(+)
>
> diff --git a/target-mips/translate.c b/targ
On Thu, Sep 27, 2012 at 09:24:46PM +0800, Jia Liu wrote:
> Add MIPS ASE DSP Bit/Manipulation instructions.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/dsp_helper.c | 55 ++
> target-mips/helper.h |7 ++
> target-mips/translate.c | 268
> +++
On Thu, Sep 27, 2012 at 09:24:51PM +0800, Jia Liu wrote:
> Delete DSP r1 & DSP r2 from TODO file.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/TODO |2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/target-mips/TODO b/target-mips/TODO
> index 2a3546f..15d67cd 100644
> --- a/target-m
On Thu, Sep 27, 2012 at 09:24:48PM +0800, Jia Liu wrote:
> Add MIPS ASE DSP Accumulator and DSPControl Access instructions.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/dsp_helper.c | 609
> ++
> target-mips/helper.h | 35 +++
> target-mips/t
On Thu, Sep 27, 2012 at 09:24:49PM +0800, Jia Liu wrote:
> Add 74kf and mips64dspr2-generic-cpu model for test.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/translate_init.c | 52
> ++
> 1 file changed, 52 insertions(+)
>
> diff --git a/target-mips/t
On Thu, Sep 27, 2012 at 09:24:38PM +0800, Jia Liu wrote:
> Add internal functions using by MIPS ASE DSP instructions.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/Makefile.objs |2 +-
> target-mips/dsp_helper.c | 1121
> +
> 2 files changed, 11
On Thu, Sep 27, 2012 at 09:24:40PM +0800, Jia Liu wrote:
> Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number.
>
> Signed-off-by: Jia Liu
> ---
> target-mips/translate.c | 122
> ---
> 1 file changed, 95 insertions(+), 27 del
On Thu, Sep 27, 2012 at 09:24:39PM +0800, Jia Liu wrote:
> Add MIPS ASE DSP resources access check.
>
> Signed-off-by: Jia Liu
> ---
> linux-user/main.c |6 ++
> target-mips/cpu.h | 27 +--
> target-mips/helper.c|3 +++
> target-mips/translat
As in the gen_repz_scas/gen_repz_cmps case, delay setting
CC_OP_DYNAMIC in gen_jcc until after code generation. All of
gen_jcc1/is_fast_jcc/gen_setcc_slow_T0 now work on s->cc_op, which makes
things a bit easier to follow and to patch.
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c |
Make gen_compute_eflags_z and gen_compute_eflags_s able to compute the
inverted condition, and use this in gen_setcc_slow_T0. We cannot do it
yet in gen_compute_eflags_c, but prepare the code for it anyway. It is
not worthwhile for PF, as usual.
shr+and+xor could be replaced by and+setcond. I'm
ZF, SF and PF can always be computed from CC_DST except in the
CC_OP_EFLAGS case (and CC_OP_DYNAMIC, which just resolves to CC_OP_EFLAGS
in gen_compute_eflags). Use setcond to compute ZF and SF.
We could also use a table lookup to compute PF.
Signed-off-by: Paolo Bonzini
---
target-i386/transl
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c | 74 -
1 file modificato, 37 inserzioni(+), 37 rimozioni(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 0a7e4e3..e2ef410 100644
--- a/target-i386/translate.c
+++ b/t
Set it to the appropriate CC_OP_SUBx constant in gen_scas/gen_cmps.
In the repz case it can be overridden to CC_OP_DYNAMIC after generating
the code.
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c | 9 +
1 file modificato, 5 inserzioni(+), 4 rimozioni(-)
diff --git a/target-i3
So I was curious about TCG and bored at the same time. :)
This series achieves 2-6% improvements in all the three benchmarks that I
tried ("dc -e1k1000vp", 1500 digits of pi with bc, SHA-1 of 100 MB
of random data), so it must not be that bad.
It improves all three aspects of handling x86 con
Reconstruct the arguments for complex conditions involving CC_OP_SUBx (BE,
L, LE). In the others do it via setcond and gen_setcc_slow (which is
not that slow in many cases).
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c | 93 +++--
1 file m
Do the switch at translation time, converting the helper templates to
TCG opcodes. In some cases CF can be computed with a single setcond,
though others it may require a little more work.
In the CC_OP_DYNAMIC case, compute the whole EFLAGS, same as for ZF/SF/PF.
Signed-off-by: Paolo Bonzini
---
Do not hard code the destination register.
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c | 39 ---
1 file modificato, 20 inserzioni(+), 19 rimozioni(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 4561c9d..fb44839 100644
---
Introduce new functions to extract PF, SF, OF, ZF in addition to CF.
These provide single entry points for optimizing accesses to a single
flag.
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c | 48
1 file modificato, 36 inserzioni(+), 12
In some cases this is just simple code movement, ensuring the invariant
that cpu_cc_op matches s->cc_op when calling the helpers. The next patches
need this because gen_compute_eflags and gen_compute_eflags_c will take
care of setting cpu_cc_op.
Also, for shifts, always compute EFLAGS first since
Introduce a function that abstracts extracting an 8, 16, 32 or 64-bit value
with or without sign, generalizing gen_extu and gen_exts.
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c | 146
1 file modificato, 37 inserzioni(+), 109 rimozion
This is looking at EFLAGS, but it can do so more efficiently with
setcond.
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c | 7 +++
1 file modificato, 3 inserzioni(+), 4 rimozioni(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index fb44839..342b9ec 100644
--- a/
After calling gen_compute_eflags, leave the computed value in cc_reg_src
and set cc_op to CC_OP_EFLAGS. The next few patches will remove anyway
most calls to gen_compute_eflags.
As a result of this change it is more natural to remove the register
argument from gen_compute_eflags and change all th
Before computing flags we need to store the cc_op to memory. Move this
to gen_compute_eflags_c and gen_compute_eflags rather than doing it all
over the place.
Alo, after computing the flags in cpu_cc_src we are in EFLAGS mode.
Set s->cc_op and discard cpu_cc_dst in gen_compute_eflags, rather than
On Wed, Oct 03, 2012 at 02:37:16PM -0700, reed kotler wrote:
> I work for Mips in the compiler team.
>
> A year and half ago, I did a complete implementation for Mips DSP in Qemu.
> My port has passed all the MIPS AVPs (Architectural Verification
> Programs) for DSP, which is something not availa
On Fri, Oct 05, 2012 at 04:24:08PM +, Blue Swirl wrote:
> Endianness looks buggy, there's no way to turn off big endian mode
I double checked the documentation and I think you're right, I can
update the patch. Thanks for pointing it out.
> DEVICE_NATIVE_ENDIAN should probably be DEVICE_LITTL
Commit 610b823ef66b993660f1ab1447a769f190e4f3b3 uses QEMU_GNUC_PREREQ
on i386 hosts.
That macro is defined in qemu-common.h which is not always included
before qemu-barrier.h, so compilation on i386 hosts was broken.
Signed-off-by: Stefan Weil
---
This patch fixes broken compilation for i386 ho
I'm wondering it the bug is not from XP because some times, the windows
installer refuse to format an ntfs partition that exceeds 4 GB ...
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1062589
Title:
On Fri, Oct 05, 2012 at 05:00:04PM -0700, Richard Henderson wrote:
> This applies with or without the sparc-compare patch set I
> recently sent, and it works with the same set of tests.
>
> I've not had time to do true benchmarking on this, but it
> does reduce the size of the generated code:
Exp
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