On 2012-10-06 04:13, Peter Maydell wrote:
> On 5 October 2012 19:01, Jan Kiszka wrote:
>> I'm not a fan of this either, but the alternatives are way more
>> complicated. We either need to rewrite the chardev subsystem,
>> specifically how mux'ed devices are registered and how the active one is
>>
Hi All,
Im currently investigating the possibility of building QEMU with
multiple CPU architectures active concurrently. That is, I have a
binary with both an target-arm and target-microblaze and wish to run
them as a heterogeneous multiprocessor platform.
Given the recent QOM development in maki
On Sun, Oct 07, 2012 at 01:57:14AM +0900, MORITA Kazutaka wrote:
> This improves readability.
>
> Signed-off-by: MORITA Kazutaka
> ---
> block/sheepdog.c | 70
> +++---
> 1 files changed, 35 insertions(+), 35 deletions(-)
Applied, thanks!
http
On Fri, Oct 05, 2012 at 05:33:22PM +0100, Peter Maydell wrote:
> Tidy up some remnants of code to support non-64-bit physaddrs
> which were accidentally omitted from commit 4be403c8.
>
> Signed-off-by: Peter Maydell
> ---
> configure |2 --
> 1 file changed, 2 deletions(-)
Applied, thanks!
On Sat, Oct 06, 2012 at 12:15:16PM +0200, Aurelien Jarno wrote:
> On Fri, Oct 05, 2012 at 05:00:04PM -0700, Richard Henderson wrote:
> > This applies with or without the sparc-compare patch set I
> > recently sent, and it works with the same set of tests.
> >
> > I've not had time to do true bench
On Sun, Oct 07, 2012 at 01:57:14AM +0900, MORITA Kazutaka wrote:
> This improves readability.
>
> Signed-off-by: MORITA Kazutaka
> ---
> block/sheepdog.c | 70
> +++---
> 1 files changed, 35 insertions(+), 35 deletions(-)
Reviewed-by: Stefan Ha
On Sat, Oct 06, 2012 at 01:51:24AM +0200, q...@buildbot.b1-systems.de wrote:
> The Buildbot has detected a new failure on builder default_mingw32 while
> building qemu.
> Full details are available at:
> http://buildbot.b1-systems.de/qemu/builders/default_mingw32/builds/396
>
> Buildbot URL: htt
On Fri, Oct 05, 2012 at 10:30:15PM -, pil926 wrote:
> Host :
> - 2.6.30.10 i686 pentium3 i386 GNU/Linux
...
> Everything is running pretty good until data size on disk C exceeds 4
> GB. I Tried many options before figuring out that the problem occurs
> when data size exceeds 4 GB. I tried with
From: Peter A. G. Crosthwaite
Added maintainership for SSI, M25P80 and the Xilinx SPI controllers.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Peter Maydell
---
MAINTAINERS |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 78
From: Peter A. G. Crosthwaite
Added the two SPI controllers to the zynq machine model. Attached two SPI flash
devices to each controller.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Peter Maydell
---
changed from v7:
Increased number of spi flashes pre controller to 4
changed from v6:
rem
From: Peter A. G. Crosthwaite
Added SPI controller to the reference design, with two n25q128 spi-flashes
connected.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Peter Maydell
---
Changed since v7:
Increased number of spi flashes to 4
Fixed spi controller qdev name and property names (see p
From: Peter A. G. Crosthwaite
Added default CS behaviour for SSI slaves. SSI devices can set a property
to enable CS behaviour which will create a GPIO on the device which is the
CS. Tristating of the bus on SSI transfers is implemented.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Peter Ma
From: Peter A. G. Crosthwaite
Device model for xilinx XPS SPI controller (v2.0)
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v8:
dropped VMS post-load irq set
changed from v7:
Fixed device name: s/xilinx,spi/xlnx.xps-spi
Fixed num-ss-bits property name: s/num-cs/num-ss-bits
changed f
From: Peter A. G. Crosthwaite
Slave creation function that can be used to create an SSI slave without
qdev_init() being called. This give machine models a chance to set properties.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Peter Maydell
---
hw/ssi.c |9 +++--
hw/ssi.h |1 +
From: Peter A. G. Crosthwaite
Added a FIFO API that can be used to create and operate byte FIFOs.
Signed-off-by: Peter A. G. Crosthwaite
---
Changed since v8:
Added documentation.
Fixed copy paste error on VMSD name string
hw/Makefile.objs |1 +
hw/fifo.c| 78 +++
From: Peter A. G. Crosthwaite
Added device model for m25p80 style SPI flash family.
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v8:
s/taked/taken
moved flags fields #defines out of struct
implemented VMSD
s/waddr/cur_addr (the address is used for both reads and writes).
changed from
Added helper function to automatically connect SPI slaves based on the QOM child
nodes of a device. A SSI master device can call this routine to automatically
hook-up all child nodes to its SPI bus.
Signed-off-by: Peter Crosthwaite
Acked-by: Peter Maydell
---
hw/ssi.c | 33 +
From: Peter A. G. Crosthwaite
Added device model for the Xilinx Zynq SPI controller (SPIPS).
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Peter Maydell
---
Changed from v7:
Fixed &->&& logic on if condition is cs_select logic
Fixed MODE_SEL bit field definition
Changed from v6:
Addressed B
From: Peter A. G. Crosthwaite
Removed the explicit SSI mux and wired the CS line directly up to the SSI
devices.
Signed-off-by: Peter A. G. Crosthwaite
---
changed since v8:
simplied GPIO splitting logic just using irq_split()
hw/ssd0323.c |1 +
hw/ssi-sd.c|1 +
hw/stellaris.c |
From: Peter A. G. Crosthwaite
Allow multiple qdev_init_gpio_in() calls for the one device. The first call will
define GPIOs 0-N-1, the next GPIOs N- ... . Allows different GPIOs to be handled
with different handlers. Needed when two levels of the QOM class heirachy both
define GPIO functionality,
From: Peter A. G. Crosthwaite
Removed assertion that only one device is attached to the SSI bus.
When multiple devices are attached, all slaves have their transfer function
called for transfers. Each device is responsible for knowing whether or not its
CS is active, and if not returning 0. The r
This series reworks the SSI bus framework for SPI and add some new SPI
controllers and devices:
Patches 1-4 reworks SSI to add chip-select support to SPI devices and allow for
multiple SPI devices attached to the
same bus.
Patch 5 fixes the SPI setup in the stellaris machine model.
Patch 6 is
I am running Qemu (plain, no kvm, etc) on an AMD 10h machine that provides
popcnt instruction.
Qemu advertises availability of pocnt to a guest as well.
What I see in the guest that popcnt 0x20(%r12),%r8 instruction actually placed
its result into %rax. With %rdi and %rax operands the instruction
(Topic updated, cc's trimmed).
Anthony Liguori writes:
> Rusty Russell writes:
>> 4) The only significant change to the spec is that we use PCI
>>capabilities, so we can have infinite feature bits.
>>(see
>> http://lists.linuxfoundation.org/pipermail/virtualization/2011-December/019198.
On Wed, Sep 26, 2012 at 5:03 PM, Alexander Graf wrote:
>
>
> On 26.09.2012, at 10:50, Li Zhang wrote:
>
>> Thanks Gerd.
>>
>> Hi Alex,
>> Can this patch be pushed to upstream?
>
> Gerd, do you want to take this through the usb queue? If I get s formal ack
> from you I can also take it into ppc-n
On Sun, Oct 7, 2012 at 5:32 AM, Wenchao Xia wrote:
From: Wenchao Xia
Libqblock was placed in new directory ./libqblock, libtool will build
dynamic library there, source files of block layer remains in ./block.
So block related source code will generate 3 sets of binary, first is old
ones
On Mon, Oct 8, 2012 at 8:36 AM, Peter Maydell wrote:
> On 7 October 2012 23:27, Cole Robinson wrote:
>> From: Paul Whalen
>>
>> Fedora ARM is generating kernels that exceed the hardcoded size limits:
>>
>> https://bugzilla.redhat.com/show_bug.cgi?id=862766
>>
>> Bump the load address, as was pre
This patch breaks the boot of a linux sparc64 kernel very early in the
boot process. The boot hangs after:
| OpenBIOS for Sparc64
| Configuration device id QEMU version 1 machine id 0
| kernel addr 404000 size 5be6b8
| kernel cmdline root=/dev/vda4 console=ttyS0
| CPUs: 1 x SUNW,UltraSPARC-IIi
| U
On 7 October 2012 23:27, Cole Robinson wrote:
> From: Paul Whalen
>
> Fedora ARM is generating kernels that exceed the hardcoded size limits:
>
> https://bugzilla.redhat.com/show_bug.cgi?id=862766
>
> Bump the load address, as was previously done in 756ba3b
>
> Signed-off-by: Cole Robinson
> ---
From: Paul Whalen
Fedora ARM is generating kernels that exceed the hardcoded size limits:
https://bugzilla.redhat.com/show_bug.cgi?id=862766
Bump the load address, as was previously done in 756ba3b
Signed-off-by: Cole Robinson
---
hw/arm_boot.c | 2 +-
1 file changed, 1 insertion(+), 1 delet
On 2012-10-07 20:40, Blue Swirl wrote:
> On Sun, Oct 7, 2012 at 5:24 PM, Jan Kiszka wrote:
>> On 2012-10-07 17:23, Blue Swirl wrote:
>>> Hi,
>>>
>>> Win2k does not work in HEAD, it resets the machine. I bisected this to
>>> 0b57e287138728f72d88b06e69b970c5d745c44a, but that does not look so
>>> bu
On Sun, Oct 7, 2012 at 5:32 AM, Wenchao Xia wrote:
> From: Wenchao Xia
>
> Libqblock was placed in new directory ./libqblock, libtool will build
> dynamic library there, source files of block layer remains in ./block.
> So block related source code will generate 3 sets of binary, first is old
>
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> Reconstruct the arguments for complex conditions involving CC_OP_SUBx (BE,
> L, LE). In the others do it via setcond and gen_setcc_slow (which is
> not that slow in many cases).
I think it would be useful to reconstruct also for add, inc an
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> This is looking at EFLAGS, but it can do so more efficiently with
> setcond.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Blue Swirl
> ---
> target-i386/translate.c | 7 +++
> 1 file modificato, 3 inserzioni(+), 4 rimozioni(-)
>
> d
On Sun, Oct 7, 2012 at 7:20 PM, Richard Henderson wrote:
> On 10/07/2012 09:34 AM, Blue Swirl wrote:
>>> > +#ifdef USE_MMAP
>>> > +code_gen_buffer = mmap((void *)start, code_gen_buffer_size,
>>> > + PROT_WRITE | PROT_READ | PROT_EXEC,
>>> > +
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> Do not hard code the destination register.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Blue Swirl
> ---
> target-i386/translate.c | 39 ---
> 1 file modificato, 20 inserzioni(+), 19 rimozioni(-)
>
>
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> Do the switch at translation time, converting the helper templates to
> TCG opcodes. In some cases CF can be computed with a single setcond,
> though others it may require a little more work.
>
> In the CC_OP_DYNAMIC case, compute the whole
On 10/07/2012 09:34 AM, Blue Swirl wrote:
>> > +#ifdef USE_MMAP
>> > +code_gen_buffer = mmap((void *)start, code_gen_buffer_size,
>> > + PROT_WRITE | PROT_READ | PROT_EXEC,
>> > + flags, -1, 0);
>> > +if (code_gen_buffer == MAP_FAILED) {
>
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> Make gen_compute_eflags_z and gen_compute_eflags_s able to compute the
> inverted condition, and use this in gen_setcc_slow_T0. We cannot do it
> yet in gen_compute_eflags_c, but prepare the code for it anyway. It is
> not worthwhile for PF
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> ZF, SF and PF can always be computed from CC_DST except in the
> CC_OP_EFLAGS case (and CC_OP_DYNAMIC, which just resolves to CC_OP_EFLAGS
> in gen_compute_eflags). Use setcond to compute ZF and SF.
>
> We could also use a table lookup to co
On 10/07/2012 11:48 AM, Blue Swirl wrote:
> This is not yet optimal, we could do the same trick as is done for x86
> for cmp/jcc case (target-i386/translate.c:889), but it's still an
> improvement so I applied it with others.
It's trickier with sparc, because of the (exceedingly rare) conditional
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> After calling gen_compute_eflags, leave the computed value in cc_reg_src
> and set cc_op to CC_OP_EFLAGS. The next few patches will remove anyway
> most calls to gen_compute_eflags.
>
> As a result of this change it is more natural to remove
Public bug reported:
View:-
https://launchpad.net/~bderzhavets/+archive/lib-usbredir89
Fragment from debian/control
Source: qemu-kvm
Section: misc
Priority: optional
Maintainer: Ubuntu Developers
XSBC-Original-Maintainer: Michael Tokarev
Uploaders: Guido Günther , Jan Lübbe
Build-Depends: deb
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> Introduce new functions to extract PF, SF, OF, ZF in addition to CF.
> These provide single entry points for optimizing accesses to a single
> flag.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Blue Swirl
> ---
> target-i386/translate.c
Switch to my new work email address from which I am contributing.
Signed-off-by: Stefan Hajnoczi
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 78d4ff2..8c546ac 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -633,7 +633,7 @@
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> Introduce a function that abstracts extracting an 8, 16, 32 or 64-bit value
> with or without sign, generalizing gen_extu and gen_exts.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Blue Swirl
> ---
> target-i386/translate.c | 146
> +++
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini
Reviewed-by: Blue Swirl
> ---
> target-i386/translate.c | 74
> -
> 1 file modificato, 37 inserzioni(+), 37 rimozioni(-)
>
> diff --git a/target-i386/translate
On Fri, Oct 5, 2012 at 11:55 PM, Richard Henderson wrote:
> Aka "normal" comparisons. We now have the infrastructure to
> pass back non-boolean results from gen_compare. This will
> automatically get used by both branches and conditional moves.
This is not yet optimal, we could do the same tric
On Fri, Oct 5, 2012 at 11:54 PM, Richard Henderson wrote:
> Most of the patches are cleanup. Some of the middle patches that
> make use of setcond and movcond where apropriate do improve code
> generation. But more important that that, we no longer have tcg
> temporaries that are live across bas
Thanks, applied.
On Thu, Oct 4, 2012 at 6:29 PM, Stefan Weil wrote:
> The pointer entry 'temps' always refers to the array entry 'static_temps'.
> Removing the pointer and renaming 'static_temps' to 'temps' reduces the
> size of TCGContext (4 or 8 byte) and allows better code generation.
>
> Sign
On Sun, Oct 7, 2012 at 5:24 PM, Jan Kiszka wrote:
> On 2012-10-07 17:23, Blue Swirl wrote:
>> Hi,
>>
>> Win2k does not work in HEAD, it resets the machine. I bisected this to
>> 0b57e287138728f72d88b06e69b970c5d745c44a, but that does not look so
>> buggy.
>>
>> Digging deeper, the problem is intro
On Sun, Oct 07, 2012 at 04:10:41PM +, Blue Swirl wrote:
> On Sat, Oct 6, 2012 at 10:46 AM, Stefan Weil wrote:
> > Commit 610b823ef66b993660f1ab1447a769f190e4f3b3 uses QEMU_GNUC_PREREQ
> > on i386 hosts.
> >
> > That macro is defined in qemu-common.h which is not always included
> > before qemu
On 2012-10-07 17:23, Blue Swirl wrote:
> Hi,
>
> Win2k does not work in HEAD, it resets the machine. I bisected this to
> 0b57e287138728f72d88b06e69b970c5d745c44a, but that does not look so
> buggy.
>
> Digging deeper, the problem is introduced by kvmvapic:
> Breakpoint 1, cpu_physical_memory_wri
On Thu, Oct 4, 2012 at 9:31 PM, Richard Henderson wrote:
> The hard-coded addresses inside code_gen_alloc only make sense if
> we're building an executable that will actually run at the address
> we've put into the linker scripts.
>
> When we're building with -fpie, the executable will run at some
On Sat, Oct 6, 2012 at 10:46 AM, Stefan Weil wrote:
> Commit 610b823ef66b993660f1ab1447a769f190e4f3b3 uses QEMU_GNUC_PREREQ
> on i386 hosts.
>
> That macro is defined in qemu-common.h which is not always included
> before qemu-barrier.h, so compilation on i386 hosts was broken.
This broke sparc-s
Hi,
Win2k does not work in HEAD, it resets the machine. I bisected this to
0b57e287138728f72d88b06e69b970c5d745c44a, but that does not look so
buggy.
Digging deeper, the problem is introduced by kvmvapic:
Breakpoint 1, cpu_physical_memory_write_rom (addr=0xca300,
buf=0x7fffec66b500 "", len=0x
As suggested by Paolo Bonzini, to avoid possible integer overflow issues.
Signed-off-by: Alon Levy
---
hw/qxl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/qxl.c b/hw/qxl.c
index 4effb66..97ae22a 100644
--- a/hw/qxl.c
+++ b/hw/qxl.c
@@ -1811,7 +1811,7 @@ static voi
exec-obsolete.h used to hold pre-memory-API functions that were used from
device code prior to the transition to the memory API. Now that the
transition is complete, the name no longer describes the file. The
functions still need to be merged better into the memory core, but there's
no danger of
Many listeners don't need to respond to all MemoryListener callbacks;
provide suitable defaults instead.
Signed-off-by: Avi Kivity
---
memory.c | 15 +++
memory.h | 21 +
2 files changed, 36 insertions(+)
diff --git a/memory.c b/memory.c
index b58b97c..efefcb8 10
AddressSpace contains a member, current_map, of type FlatView. Since we
want to limit the leakage of internal types to public headers, switch to
a pointer to a FlatView. There is no performance impact as this isn't used
during lookups, only address space reconfigurations.
Reviewed-by: Anthony Li
Instead of calling a global function on coalesced mmio changes, which
routes the call to kvm if enabled, add coalesced mmio hooks to
MemoryListener and make kvm use that instead.
The motivation is support for multiple address spaces (which means we
we need to filter the call on the right address s
Using an unfiltered memory listener will cause regions to be reported
fails multiple times if we have more than two address spaces. Use a separate
listener for memory and I/O, and utilize MemoryListener's address space
filtering to fix this.
Signed-off-by: Avi Kivity
---
hw/xen_pt.c | 38 ++
The construct
if (address_space == get_system_memory()) {
// memory thing
} else {
// io thing
}
fails if we have more than two address spaces. Use a separate listener
for memory and I/O, and utilize MemoryListener's address space filtering to
fix this.
Signed-off-by: Avi
Instead of checking manually, let the listener filter for us. This prepares
us for DMA address spaces.
Signed-off-by: Avi Kivity
---
hw/vhost.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/vhost.c b/hw/vhost.c
index d0ce5aa..100f765 100644
--- a/hw/vhost.c
+++ b/h
Using the AddressSpace type reduces confusion, as you can't accidentally
supply the MemoryRegion you're interested in.
Reviewed-by: Anthony Liguori
Signed-off-by: Avi Kivity
---
exec-memory.h | 3 +++
exec.c| 10 +-
hw/vfio_pci.c | 3 +--
hw/vhost.c| 2 +-
hw/xen_pt.c |
use cpu_physical_memory_is_io() instead.
Signed-off-by: Avi Kivity
---
target-s390x/misc_helper.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
index e9b3cae..fdccd58 100644
--- a/target-s390x/misc_helper.c
+++ b/tar
The DMA API will use an AddressSpace to differentiate among different
initiators.
Reviewed-by: Anthony Liguori
Signed-off-by: Avi Kivity
---
memory.c | 11 +--
memory.h | 21 +
2 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/memory.c b/memory.c
index
Removes quite a bit of useless code.
Signed-off-by: Avi Kivity
---
xen-all.c | 43 +--
1 file changed, 1 insertion(+), 42 deletions(-)
diff --git a/xen-all.c b/xen-all.c
index f76b051..823e043 100644
--- a/xen-all.c
+++ b/xen-all.c
@@ -452,14 +452,6 @@ st
Currently we ignore PCI_COMMAND_MASTER completely: DMA succeeds even when
the bit is clear.
Honor PCI_COMMAND_MASTER by inserting a memory region into the device's
bus master address space, and tying its enable status to PCI_COMMAND_MASTER.
Tested using
setpci -s 03 COMMAND=3
while a ping was
Most of the work on the memory API focused on memory access targets - the
memory regions
and how they are composed into an address space. This patchset tackles the
initator
side of the question - how to originate accesses.
The AddressSpace object, is exported to users and becomes the representa
Removes quite a bit of useless code.
Acked-by: Alex Williamson
Signed-off-by: Avi Kivity
---
hw/vfio_pci.c | 30 +-
1 file changed, 1 insertion(+), 29 deletions(-)
diff --git a/hw/vfio_pci.c b/hw/vfio_pci.c
index a1eeced..8e49535 100644
--- a/hw/vfio_pci.c
+++ b/hw/
On 10/05/2012 06:45 PM, Peter Maydell wrote:
> On 4 October 2012 11:36, Avi Kivity wrote:
>> diff --git a/targphys.h b/targphys.h
>> index bd4938f..08cade9 100644
>> --- a/targphys.h
>> +++ b/targphys.h
>> @@ -3,25 +3,10 @@
>> #ifndef TARGPHYS_H
>> #define TARGPHYS_H
>>
>> -#ifdef TARGET_PHYS_AD
Accesses from different devices can resolve differently
(depending on bridge settings, iommus, and PCI_COMMAND_MASTER), so
set up an address space for each device.
Currently iommus are expressed outside the memory API, so this doesn't
work if an iommu is present.
Signed-off-by: Avi Kivity
---
h
Instead of accessing the cpu address space, use an address space
configured by the caller.
Eventually all dma functionality will be folded into AddressSpace,
but we have to start from something.
Reviewed-by: Anthony Liguori
Signed-off-by: Avi Kivity
---
dma-helpers.c| 25 --
Since address spaces can be created dynamically by device hotplug, they
can also be destroyed dynamically.
Signed-off-by: Avi Kivity
---
exec.c| 10 ++
memory-internal.h | 1 +
memory.c | 18 --
memory.h | 12
4 files changed, 3
We plan to make the core listener listen to all address spaces; this
will cause many more flushes than necessary. Prepare for that by
moving the flush into a tcg-specific listener.
Later we can avoid registering the listener if tcg is disabled.
Signed-off-by: Avi Kivity
---
exec.c | 9 +++-
On 10/07/2012 01:57 PM, Alexander Graf wrote:
>
>
> On 07.10.2012, at 11:48, Avi Kivity wrote:
>
>> On 10/05/2012 01:59 PM, Alexander Graf wrote:
>> Do you mean that we add the "MemoryRegion bar0" in PCIDevice struct. Do
>> the
> same thing that I was doing in e500_pcihost_initfn()
Removes quite a bit of useless code.
Signed-off-by: Avi Kivity
---
hw/xen_pt.c | 47 ++-
1 file changed, 2 insertions(+), 45 deletions(-)
diff --git a/hw/xen_pt.c b/hw/xen_pt.c
index 438ad54..4dcf46a 100644
--- a/hw/xen_pt.c
+++ b/hw/xen_pt.c
@@ -598,
With this change, memory.c no longer knows anything about special address
spaces, so it is prepared for AddressSpace based DMA.
Reviewed-by: Anthony Liguori
Signed-off-by: Avi Kivity
---
exec-memory.h | 6 --
exec.c| 9 +++--
memory.c | 16
3 files change
Removes quite a bit of useless code.
Signed-off-by: Avi Kivity
---
exec.c | 98 ++
1 file changed, 2 insertions(+), 96 deletions(-)
diff --git a/exec.c b/exec.c
index 5c703b9..1fd6a10 100644
--- a/exec.c
+++ b/exec.c
@@ -3202,32 +3
Currently we use a global radix tree to dispatch memory access. This only
works with a single address space; to support multiple address spaces we
make the radix tree a member of AddressSpace (via an intermediate structure
AddressSpaceDispatch to avoid exposing too many internals).
A side effect
Removes quite a bit of useless code.
Signed-off-by: Avi Kivity
---
kvm-all.c | 32 ++--
1 file changed, 2 insertions(+), 30 deletions(-)
diff --git a/kvm-all.c b/kvm-all.c
index c69e012..5e9215d 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -703,14 +703,6 @@ static void
Instead of embedding knowledge of the memory and I/O address spaces in the
memory core, maintain a list of all address spaces. This list will later
be extended dynamically for other bus masters.
Reviewed-by: Anthony Liguori
Signed-off-by: Avi Kivity
---
memory.c | 75 ++
On 07.10.2012, at 11:48, Avi Kivity wrote:
> On 10/05/2012 01:59 PM, Alexander Graf wrote:
> Do you mean that we add the "MemoryRegion bar0" in PCIDevice struct. Do
> the
same thing that I was doing in e500_pcihost_initfn() in the k->init()
(will add
this) function of "
On 10/04/2012 09:16 PM, Peter Maydell wrote:
> On 4 October 2012 20:05, Anthony Liguori wrote:
>> Blue Swirl writes:
>>> They can all be 64 bits, I'm just considering types. Getting rid of
>>> target_phys_addr_t, pcibus_t, pio_addr_t and dma_addr_t (are there
>>> more?) may be also worthwhile.
>>
On 10/05/2012 06:06 PM, Anthony Liguori wrote:
> Signed-off-by: Anthony Liguori
>
> -QEMULIBS=libhw libuser libdis libdis-user
> +QEMULIBS=libuser libdis libdis-user
>
Two other possibilities:
- make it 'libhw.a' (and introduce a way of including just relevant
hardware models) - reduces bina
On 10/04/2012 08:15 PM, Stefan Weil wrote:
> Am 04.10.2012 12:36, schrieb Avi Kivity:
>> The hassle and compile time overhead of maintaining both 32-bit and
>> 64-bit
>> capable source isn't worth the tiny performance advantage which is
>> seen on
>> a minority of configurations. Switch to compili
On 10/07/2012 12:13 PM, Avi Kivity wrote:
> On 10/05/2012 06:24 PM, Blue Swirl wrote:
>>
>> I'd suppose addressing devices in the bus could be implemented more
>> efficiently with better use of memory API, now some of it is
>> reimplemented. Maybe Avi can propose something?
>
> Luckily the low-or
On 10/05/2012 06:24 PM, Blue Swirl wrote:
>
> I'd suppose addressing devices in the bus could be implemented more
> efficiently with better use of memory API, now some of it is
> reimplemented. Maybe Avi can propose something?
Luckily the low-order bits are used for offsets, and the high-order bi
On 10/05/2012 01:59 PM, Alexander Graf wrote:
Do you mean that we add the "MemoryRegion bar0" in PCIDevice struct. Do the
>>> same thing that I was doing in e500_pcihost_initfn() in the k->init() (will
>>> add
>>> this) function of "e500-host-bridge"
>>>
>>> No, he means that you create a ne
On Fri, Sep 28, 2012 at 11:51:29AM +0200, Paolo Bonzini wrote:
> Il 06/09/2012 09:21, Gerd Hoffmann ha scritto:
> > +#ifndef CONFIG_QXL_IO_MONITORS_CONFIG_ASYNC
> > +/* spice-protocol is too old, add missing definitions */
> > +#define QXL_IO_MONITORS_CONFIG_ASYNC (QXL_IO_FLUSH_RELEASE + 1)
> > +#e
** Changed in: qemu
Status: New => Confirmed
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https://bugs.launchpad.net/bugs/685096
Title:
USB Passthrough not working for Windows 7 guest
Status in QEMU:
Confirmed
Bug des
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