Prepares for assigning IRQs before QOM realize.
Signed-off-by: Andreas Färber
---
hw/isa-bus.c | 12 +---
1 Datei geändert, 9 Zeilen hinzugefügt(+), 3 Zeilen entfernt(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index fce311b..6dc34f0 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -12
Am 15.02.2013 20:39, schrieb Stefan Berger:
> diff --git a/tpm/tpm_tis.c b/tpm/tpm_tis.c
> new file mode 100644
> index 000..565e28d
> --- /dev/null
> +++ b/tpm/tpm_tis.c
[...]
> +/*
> + * This function is called when the machine starts, resets or due to
> + * S3 resume.
> + */
> +static void t
Am 15.02.2013 20:39, schrieb Stefan Berger:
> diff --git a/tpm/tpm_tis.h b/tpm/tpm_tis.h
> new file mode 100644
> index 000..6cf18bc
> --- /dev/null
> +++ b/tpm/tpm_tis.h
> @@ -0,0 +1,78 @@
> +/*
> + * tpm_tis.h - QEMU's TPM TIS interface emulator
> + *
> + * Copyright (C) 2006, 2010-2013 IBM C
Am 15.02.2013 20:39, schrieb Stefan Berger:
> Build the TPM frontend code that has been added so far.
The previous two patches were not compile-testable?! That's not cool.
>
> Signed-off-by: Stefan Berger
> Reviewed-by: Corey Bryant
> ---
> configure | 11 +++
> tpm/Makefile.o
On Fri, Feb 15, 2013 at 9:35 AM, Kevin Wolf wrote:
> On Thu, Feb 14, 2013 at 09:40:22PM +, Blue Swirl wrote:
>> On Thu, Feb 14, 2013 at 9:40 AM, Kevin Wolf wrote:
>> > Am 13.02.2013 22:17, schrieb Blue Swirl:
>> >> On Wed, Feb 13, 2013 at 1:22 PM, Kevin Wolf wrote:
>> >>> Look only for clust
On Thu, Feb 14, 2013 at 10:09 PM, Anthony Liguori wrote:
> Blue Swirl writes:
>
>> On Thu, Feb 14, 2013 at 2:34 AM, Anthony Liguori
>> wrote:
>>> Joel Schopp writes:
>>>
>> +if(popen_file == NULL) {
>
> Please make a preparatory patch which adds missing spaces between 'if'
Am 15.02.2013 14:14, schrieb Alexander Graf:
> In parallel to the completely disastrous user experience when using trace
> points. Debug printfs are easy and understandable. Tracepoints are not.
>
> However, how about we take this one gradually?
+1, I'm looking for a minimally invasive solution
The software reset of a PReP machine should reset the entire system
and not only the processor. It occurs when changing the 7th bit of
port 0092 from 0 to 1.
Adding a new variable in PReP's sysctrl_t to store the soft reset bit
makes possible to be compliant with PReP specification :
* reset the s
Hi !
I would like to run HP-UX 10.20 on a Visualize C180 workstation emulated by
qemu. I know it is not possible for now, so I would like to add it (and
learn how to do it btw).
What is the current state of the HPPA support in qemu ? (I can't find many
informations on that) and do you have any ti
Am 16.02.2013 13:19, schrieb Julio Guerra:
> The software reset of a PReP machine should reset the entire system
> and not only the processor. It occurs when changing the 7th bit of
> port 0092 from 0 to 1.
>
> Adding a new variable in PReP's sysctrl_t to store the soft reset bit
> makes possible
2013/2/16 Andreas Färber
>
> Am 16.02.2013 13:19, schrieb Julio Guerra:
> How did you test this change?
>
With a program (a kernel debugger) doing a software reset (when
leaving the debug session). Hence, it is not possible to reconnect
without this patch since the platform has not been corretly
Hi,
Am 16.02.2013 13:29, schrieb Philippe Leduc:
> What is the current state of the HPPA support in qemu ? (I can't find
> many informations on that) and do you have any tips to start (I started
> to read the code, but without an entry point, it can be very long)?
In short there is tcg/hppa/ for
The MPC86xx processors are based on a e600 core which is not currently
the case in qemu where they are based on the 7400 processor.
This patch creates the e600 core and instantiates the MPC86xx
processors based on it. Therefore, adding the high BATs and the SPRG
4..7 registers, which are e600-spec
Am 16.02.2013 13:48, schrieb Julio Guerra:
> The MPC86xx processors are based on a e600 core which is not currently
> the case in qemu where they are based on the 7400 processor.
>
> This patch creates the e600 core and instantiates the MPC86xx
> processors based on it. Therefore, adding the high
Thanks, applied.
On Tue, Feb 12, 2013 at 4:13 PM, Peter Maydell wrote:
> Remove the function qemu_log_try_set_file() and its users (which
> are all in TCG code generation functions for various targets).
> This function was added to abstract out code which was originally
> written as "if (!logfile
Corresponds to existing qemu_log_vprintf() but uses a mask.
Signed-off-by: Andreas Färber
---
include/qemu/log.h |8
1 Datei geändert, 8 Zeilen hinzugefügt(+)
diff --git a/include/qemu/log.h b/include/qemu/log.h
index 58f69cb..4bfa60c 100644
--- a/include/qemu/log.h
+++ b/include/q
Thanks, applied.
On Thu, Jan 31, 2013 at 6:47 PM, Evgeny Voevodin
wrote:
>
> This set of patches moves rest global variables to tcg_ctx.
> Also second patch introduces new TBContext for translation blocks
> ans moves translation block globals there. We place tb_ctx inside
> tcg_ctx and get notica
Am 15.02.2013 14:06, schrieb Igor Mammedov:
> From: Andreas Färber
>
> In order to instantiate a CPU subtype we will need to know which type,
> so move the cpu_model splitting into cpu_x86_init().
>
> Parameters need to be set on the X86CPU instance, so move
> cpu_x86_parse_featurestr() into cpu
Thanks, applied.
On Mon, Feb 11, 2013 at 4:41 PM, Peter Maydell wrote:
> This patchset is just cleanups; it has two major aims:
> * remove 'cpu' from public-facing qemu_log function/type/etc
>names, since the logging is now entirely generic and not
>tied to TCG CPU debug logging at all
>
Thanks, applied.
On Thu, Feb 14, 2013 at 1:47 AM, Richard Henderson wrote:
> Version 1 merely tried to adjust bitops_flsl, here I instead eliminate
> it all from bitops.h, and standardizes on the routines from host-utils.h.
>
>
> r~
>
>
> Richard Henderson (10):
> host-utils: Add host long spec
The software reset of a PReP machine should reset the entire system
and not only the processor. It occurs when changing the 7th bit of
port 0092 from 0 to 1.
Adding a new variable in PReP's sysctrl_t to store the soft reset bit
makes possible to be compliant with PReP specification :
* reset the s
Hi AllIs it the correct step to invoke a single step? It will fail when
currec IP hit a breakpoint, but i can't find any different than the gdb stub.
static int sstep_flags = SSTEP_ENABLE | SSTEP_NOIRQ |
SSTEP_NOTIMER;CPUArchState *cpu = first_cpu;cpu_single_step(cpu,
sstep_flags);vm_start()
2013/2/16 Andreas Färber :
>
> This patch is just as broken as the PReP one...
>
> The patch contradicts your description. Did you diff the wrong way?!
>
Indeed... Forget it, I'll resubmit it.
> This patch conflicts with our ongoing CPU definition refactoring:
> http://lists.nongnu.org/archive/ht
Check if xsltproc and Sparc32, Sparc64 and PPC compilers
are available. If found, rebuild OpenBIOS ROMs from submodule.
Signed-off-by: Blue Swirl
---
v2:
fix crossgcc check
print which ROMs will be built
create the build directory in configure
don't overwrite source versions when building ou
Am 15.02.2013 18:47, schrieb Alexander Graf:
>
> On 15.02.2013, at 18:44, Andreas Färber wrote:
>
>> Alex,
>>
>> Am 02.02.2013 12:57, schrieb Andreas Färber:
>>> It was never implemented.
>>>
>>> Signed-off-by: Andreas Färber
>>
>> Too late for 1.4 now obviously. ;)
>>
>> Do you want to queue th
Am 02.02.2013 12:57, schrieb Andreas Färber:
> It was never implemented.
>
> Signed-off-by: Andreas Färber
Applied to qom-cpu:
https://github.com/afaerber/qemu-cpu/commits/qom-cpu
Andreas
> ---
> target-lm32/cpu.h |1 -
> 1 Datei geändert, 1 Zeile entfernt(-)
>
> diff --git a/target-lm32
Split off TCG initialization from cpu_mb_init() into mb_tcg_init() to
call it from the initfn.
Ensures that a QOM-created MicroBlazeCPU is usable.
Signed-off-by: Andreas Färber
---
target-microblaze/cpu.c |6 ++
target-microblaze/cpu.h |1 +
target-microblaze/translate.c
Introduce a realizefn and set realized = true from cpu_mips_init().
Signed-off-by: Andreas Färber
---
target-mips/cpu-qom.h |2 ++
target-mips/cpu.c | 15 +++
target-mips/translate.c |5 +++--
3 Dateien geändert, 20 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff
Introduce realizefn and set realized = true in cpu_s390x_init().
Defer CPU reset from initfn to realizefn.
Acked-by: Richard Henderson
[AF: Invoke parent's realizefn]
Signed-off-by: Andreas Färber
---
target-s390x/cpu-qom.h |2 ++
target-s390x/cpu.c | 16 ++--
target-s390
Ensures that a QOM-created ARMCPU is usable.
Signed-off-by: Andreas Färber
---
target-arm/cpu.c|6 ++
target-arm/helper.c |6 --
2 Dateien geändert, 6 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 9915172..f54d200 100644
-
Introduce realizefn and set realized = true in cpu_xtensa_init().
Signed-off-by: Andreas Färber
---
target-xtensa/cpu-qom.h |2 ++
target-xtensa/cpu.c | 13 +
target-xtensa/helper.c |4 +++-
3 Dateien geändert, 18 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)
diff --git
Signed-off-by: Andreas Färber
---
target-sparc/cpu.c |8
1 Datei geändert, 4 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 1690cf5..759be53 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -114,10 +114,6 @@ SPARCCPU
Add a tcg_enabled() check to suppress it for qtest.
Signed-off-by: Andreas Färber
---
target-m68k/cpu.c|6 ++
target-m68k/helper.c |7 ---
2 Dateien geändert, 6 Zeilen hinzugefügt(+), 7 Zeilen entfernt(-)
diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
index e3eaffc..4273
Signed-off-by: Antoine Mathys
---
hw/ds1338.c | 156 ---
1 file changed, 95 insertions(+), 61 deletions(-)
diff --git a/hw/ds1338.c b/hw/ds1338.c
index 1da0f96..5a93fb6 100644
--- a/hw/ds1338.c
+++ b/hw/ds1338.c
@@ -48,17 +48,32 @@ static
The helper functions all access ppc-specific fields only so don't bother
to change arguments to PowerPCCPU and use env_ptr instead.
No functional change.
Acked-by: Alexander Graf
Signed-off-by: Andreas Färber
---
hw/spapr_hcall.c | 11 +++
1 Datei geändert, 3 Zeilen hinzugefügt(+), 8
QEMU would occasionally segfault when fuzzing the linux kernel with
Trinity. Add a read op (copied from hw/kvm/apic.c) to vapic_ops to
prevent the crash.
Program received signal SIGSEGV, Segmentation fault.
[Switching to Thread 0x7fffeddcc700 (LWP 15999)]
0x in ?? ()
(gdb) bt
Hello,
This is my current QOM CPU patch queue. Please pull.
It includes:
* QOM realize support for CPUs, cleaning up cpu_init(),
* cpu_init() TCG cleanups for device_add,
* preparations for CPUState refactorings,
* CRIS CPU subclasses,
* CPUState part 8 refactorings,
* bug fixes for e500 CPU iter
Introduce a realizefn and set realized = true in cpu_lm32_init().
Also move cpu_reset() call from initfn to realizefn.
Signed-off-by: Andreas Färber
---
target-lm32/cpu-qom.h |2 ++
target-lm32/cpu.c | 18 --
target-lm32/helper.c |4 ++--
3 Dateien geändert, 20 Ze
Pass CPUState to cpu_exec_{start,end}() functions.
Signed-off-by: Andreas Färber
---
include/exec/cpu-defs.h |1 -
include/qom/cpu.h |2 ++
linux-user/main.c | 37 ++---
3 Dateien geändert, 24 Zeilen hinzugefügt(+), 16 Zeilen entfernt(-)
dif
Adapt the signature of x86_cpu_realize(), hook up to
DeviceClass::realize and set realized = true in cpu_x86_init().
The QOM realizefn cannot depend on errp being non-NULL as in
cpu_x86_init(), so use a local Error to preserve error handling behavior
on APIC initialization errors.
Reviewed-by: Ig
On 02/16/2013 06:04 AM, Andreas Färber wrote:
Am 15.02.2013 20:39, schrieb Stefan Berger:
diff --git a/tpm/tpm_tis.h b/tpm/tpm_tis.h
new file mode 100644
index 000..6cf18bc
--- /dev/null
+++ b/tpm/tpm_tis.h
@@ -0,0 +1,78 @@
+/*
+ * tpm_tis.h - QEMU's TPM TIS interface emulator
+ *
+ * Copyri
On 02/16/2013 05:56 AM, Andreas Färber wrote:
Am 15.02.2013 20:39, schrieb Stefan Berger:
diff --git a/tpm/tpm_tis.c b/tpm/tpm_tis.c
new file mode 100644
index 000..565e28d
--- /dev/null
+++ b/tpm/tpm_tis.c
[...]
+/*
+ * This function is called when the machine starts, resets or due to
+ *
Overwrite the default implementation with a no-op, no longer
attempting to call DeviceClass::init.
Signed-off-by: Andreas Färber
---
qom/cpu.c |5 +
1 Datei geändert, 5 Zeilen hinzugefügt(+)
diff --git a/qom/cpu.c b/qom/cpu.c
index 8fb538b..870e9ba 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
Prepares for changing cpu_interrupt() argument to CPUState.
Signed-off-by: Andreas Färber
Acked-by: Alexander Graf
---
hw/ppc.c | 12 ++--
hw/ppc.h |6 +++---
hw/ppc405_uc.c | 16 ++--
3 Dateien geändert, 19 Zeilen hinzugefügt(+), 15 Zeilen entfernt(-)
d
Update the openrisc_cpu_realize() signature, hook it up to
DeviceClass::realize and set realized = true in cpu_openrisc_init().
qapi/error.h is now included through qdev and no longer needed.
Signed-off-by: Andreas Färber
Cc: Jia Liu
---
target-openrisc/cpu.c | 13 ++---
target-openr
Introduce a realizefn and set realized = true in cpu_sh4_init().
Signed-off-by: Andreas Färber
---
target-sh4/cpu-qom.h |2 ++
target-sh4/cpu.c | 14 ++
target-sh4/translate.c |5 +++--
3 Dateien geändert, 19 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a
Introduce realizefn and set realized = true from cpu_cris_init().
Reviewed-by: Eduardo Habkost
Signed-off-by: Andreas Färber
---
target-cris/cpu-qom.h |2 ++
target-cris/cpu.c | 15 +++
target-cris/translate.c |3 +--
3 Dateien geändert, 18 Zeilen hinzugefügt(+), 2
Thanks, applied.
On Sun, Jan 27, 2013 at 1:32 PM, Andreas Färber wrote:
> Signed-off-by: Andreas Färber
> ---
> target-sparc/ldst_helper.c |2 +-
> 1 Datei geändert, 1 Zeile hinzugefügt(+), 1 Zeile entfernt(-)
>
> diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
> index
Normalize the "inited" logic and add a tcg_enabled() check to suppress
it for qtest.
Ensures that a QOM-created UniCore32CPU is usable.
Acked-by: Guan Xuetao
Signed-off-by: Andreas Färber
---
target-unicore32/cpu.c|6 ++
target-unicore32/helper.c |6 --
2 Dateien geändert,
Ensures that a QOM-created S390CPU is usable.
Acked-by: Richard Henderson
Signed-off-by: Andreas Färber
---
target-s390x/cpu.c|6 ++
target-s390x/helper.c |7 ---
2 Dateien geändert, 6 Zeilen hinzugefügt(+), 7 Zeilen entfernt(-)
diff --git a/target-s390x/cpu.c b/target-s390
It was never implemented.
Signed-off-by: Andreas Färber
---
target-lm32/cpu.h |1 -
1 Datei geändert, 1 Zeile entfernt(-)
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 4e202db..6948d0e 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -189,7 +189,6 @@ struct CPULM32State
Turn cpu_init() into a static inline function for backwards
compatibility.
Signed-off-by: Andreas Färber
---
target-m68k/cpu.h| 12 ++--
target-m68k/helper.c |4 ++--
2 Dateien geändert, 12 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)
diff --git a/target-m68k/cpu.h b/target-m68
Signed-off-by: Andreas Färber
---
target-lm32/cpu.c|6 ++
target-lm32/helper.c |6 --
2 Dateien geändert, 6 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-)
diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c
index 6a84f51..5f16734 100644
--- a/target-lm32/cpu.c
+++ b/target-lm32/c
Public bug reported:
I am running daily automated tests of the qemu git mainline that
involve building qemu on a Linux host (32-bit), booting a NetBSD guest
in qemu-system-i386, and running the NetBSD operating system test
suite on the guest.
Since commit b76f0d8c2e3eac94bc7fd90a510cb7426b2a2699,
In order to instantiate a CPU subtype we will need to know which type,
so move the cpu_model splitting into cpu_x86_init().
Parameters need to be set on the X86CPU instance, so move
cpu_x86_parse_featurestr() into cpu_x86_init() as well.
This leaves cpu_x86_register() operating on the model name
Store it in m5206_mbar_state. Prepares for passing M68kCPU to
m68k_set_irq_level().
Signed-off-by: Andreas Färber
---
hw/an5206.c | 11 +++
hw/mcf.h |2 +-
hw/mcf5206.c |8
3 Dateien geändert, 12 Zeilen hinzugefügt(+), 9 Zeilen entfernt(-)
diff --git a/hw/an5206.
Consolidate CPU functions in cpu.c.
Allows to make cpu_x86_register() static.
No functional changes.
Reviewed-by: Eduardo Habkost
Reviewed-by: Igor Mammedov
Signed-off-by: Andreas Färber
---
target-i386/cpu.c| 26 +-
target-i386/cpu.h|1 -
target-i386/hel
Turn arm_cpu_realize() into a QOM realize function, no longer called
via cpu.h prototype. To maintain the semantics of cpu_init(), set
realized = true explicitly in cpu_arm_init().
Move GDB coprocessor registration, CPU reset and vCPU initialization
into the realizefn.
Signed-off-by: Andreas Färb
Simplifies use of cpu_reset_interrupt() et al.
Signed-off-by: Andreas Färber
---
hw/mcf5206.c |2 +-
hw/mcf_intc.c|2 +-
target-m68k/cpu.h|2 +-
target-m68k/helper.c |4 +++-
4 Dateien geändert, 6 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)
diff --git a/hw/mc
On 02/16/2013 06:19 AM, Andreas Färber wrote:
Am 15.02.2013 20:39, schrieb Stefan Berger:
if test "$sdl_too_old" = "yes"; then
echo "-> Your SDL version is too old - please upgrade to have SDL support"
@@ -4251,6 +4256,12 @@ if test "$gprof" = "yes" ; then
fi
fi
+if test "$tpm" = "ye
Introduce a realizefn and set realized = true in uc32_cpu_init().
Acked-by: Guan Xuetao
[AF: Invoke the parent's realizefn]
Signed-off-by: Andreas Färber
---
target-unicore32/cpu-qom.h |3 +++
target-unicore32/cpu.c | 14 ++
target-unicore32/helper.c |3 ++-
3 Dateien
Update the alpha_cpu_realize() signature and hook up to
DeviceClass::realize. Set realized = true in cpu_alpha_init().
qapi/error.h is included through qdev now and no longer needed.
Acked-by: Richard Henderson
[AF: Invoke parent's realizefn]
Signed-off-by: Andreas Färber
---
target-alpha/cpu-
Since we still need env for ppc-specific fields, obtain it via the new
env_ptr fields to avoid "cpu" name conflicts between CPUState and
PowerPCCPU for now.
This fixes a potential issue with env being NULL at the end of the loop
but cpu still being a valid pointer corresponding to a previous env.
Make mips_tcg_init() non-static and add tcg_enabled() check to suppress
it for qtest.
Signed-off-by: Andreas Färber
---
target-mips/cpu.c |4
target-mips/cpu.h |1 +
target-mips/translate.c |3 +--
3 Dateien geändert, 6 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
di
Adapt ppc_cpu_realize() signature, hook it up to DeviceClass and set
realized = true in cpu_ppc_init().
Reviewed-by: Eduardo Habkost
Signed-off-by: Andreas Färber
---
target-ppc/cpu-qom.h|2 ++
target-ppc/translate_init.c | 12 +---
2 Dateien geändert, 11 Zeilen hinzugefüg
For what it's worth, I got the same problem in 1.4 - not sure what's
going on there:
eclipse ~ # qemu-kvm --version
QEMU emulator version 1.4.0, Copyright (c) 2003-2008 Fabrice Bellard
eclipse ~ # qemu-kvm
qemu-kvm: /var/tmp/portage/app-emulation/qemu-1.4.0/work/qemu-1.4.0/exec.c:982:
qemu_ram_s
Change gdbstub's cpu_index() argument to CPUState now that CPUArchState
is no longer used.
Signed-off-by: Andreas Färber
---
dump.c |8 ++--
gdbstub.c | 14 +-
include/exec/cpu-defs.h |1 -
include/exec/gdbstub.h |5 ++---
include/qom
Introduce realizefn and set realized = true from cpu_mb_init().
Signed-off-by: Andreas Färber
---
target-microblaze/cpu-qom.h |2 ++
target-microblaze/cpu.c | 14 ++
target-microblaze/translate.c |3 +--
3 Dateien geändert, 17 Zeilen hinzugefügt(+), 2 Zeilen entfern
CPUArchState is no longer needed.
Signed-off-by: Andreas Färber
---
exec.c |2 +-
translate-all.c |9 +
translate-all.h |2 +-
3 Dateien geändert, 7 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-)
diff --git a/exec.c b/exec.c
index dbb893a..a41bcb8 100644
--- a/exec.c
+
Since it was located before breakpoints field, it needs to be reset.
Signed-off-by: Andreas Färber
---
cpu-exec.c |8
exec.c |4 +++-
hw/spapr_hcall.c|5 +++--
include/exec/cpu-defs.h |2 --
include/qom/cpu.h |2 ++
kvm-all
It was never implemented.
Signed-off-by: Andreas Färber
---
target-s390x/cpu.h |1 -
1 Datei geändert, 1 Zeile entfernt(-)
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index fa8dfe0..e450db7 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -315,7 +315,6 @@ static inline i
Public bug reported:
Hi team,
I decided to try the latest commit on git (previously used version
1.3.0), and I got failed assertions while attempting to start my guests:
eclipse ~ # qemu-kvm -enable-kvm -hda arch.img -m 4096 -smp sockets=1,cores=4
-vnc :0 -cpu host -vga std -net nic,model=e1000
Introduce realizefn and set realized = true in cpu_m68k_init().
Split off GDB registration to a new m68k_cpu_init_gdb() so that it can
be called from the realizefn.
Signed-off-by: Andreas Färber
---
target-m68k/cpu-qom.h |2 ++
target-m68k/cpu.c | 16
target-m68k/cpu.
Introduce realizefn and set realized = true in cpu_sparc_init().
Signed-off-by: Andreas Färber
---
target-sparc/cpu-qom.h |2 ++
target-sparc/cpu.c | 17 -
2 Dateien geändert, 18 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)
diff --git a/target-sparc/cpu-qom.h b/target-sp
Use class_init functions to initialize the VR in preparation for
overriding v32+ behavior there.
Move cpu_cris_init() to cpu.c and hook up a class_by_name callback.
This change leads to unknown -cpu model names no longer falling back
to a CPU with VR 32 but instead returning NULL.
Acked-by: Edga
The target-specific ENV_GET_CPU() macros have allowed us to navigate
from CPUArchState to CPUState. The reverse direction was not supported.
Avoid introducing CPU_GET_ENV() macros by initializing an untyped
pointer that is initialized in derived instance_init functions.
The field may not be called
Awesome, thanks.
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https://bugs.launchpad.net/bugs/925412
Title:
Cannot build on Mac using Xcode 4 and LLVM
Status in QEMU:
Fix Released
Bug description:
As detailed in the mailin
Explictly NULL it on CPU reset since it was located before breakpoints.
Change vapic_report_tpr_access() argument to CPUState. This also
resolves the use of void* for cpu.h independence.
Change vAPIC patch_instruction() argument to X86CPU.
Signed-off-by: Andreas Färber
---
cpu-exec.c
Potentially env could be NULL whereas cpu would still be valid and
correspond to a previous env.
Wrapping this in qemu_get_cpu(), env is no longer needed, so simplify
code that existed before 55e5c2850293547203874098f7cec148ffd12dfa.
Acked-by: Alexander Graf
Signed-off-by: Andreas Färber
---
h
This patch does 3 things:
1. Renames HELPERS-y Makefile variable to HELPERS
2. Moves its definition from Makefile to configure
3. Moves qemu-ga binary from TOOLS to HELPERS.
The effects are:
1. qemu-ga binary is now installed into libexecdir, not bindir.
This is the main effect/motivation of thi
Not all MinGW build environments include a library which provides ffs(),
and some versions of gcc create a function call instead of inline code.
When gcc is called with -ansi, it will always create a function call.
This usually results in an unresolved symbol "ffs" at link time.
The patch enforce
Add a tcg_enabled() check to suppress it for qtest.
Signed-off-by: Andreas Färber
---
target-sh4/cpu.c |4
target-sh4/cpu.h |1 +
target-sh4/translate.c |3 +--
3 Dateien geändert, 6 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/target-sh4/cpu.c b/target-
Ensures that a QOM-created PowerPCCPU is usable.
Signed-off-by: Andreas Färber
---
target-ppc/translate_init.c |9 -
1 Datei geändert, 4 Zeilen hinzugefügt(+), 5 Zeilen entfernt(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 49eaeac..5a2acaa 100644
-
Hi Stefan,
On Sat, Feb 16, 2013 at 7:30 PM, Stefan Weil wrote:
> Not all MinGW build environments include a library which provides ffs(),
> and some versions of gcc create a function call instead of inline code.
>
> When gcc is called with -ansi, it will always create a function call.
> This usua
Combine this with breakpoint handler registration, guarding both with
tcg_enabled() to suppress also TCG init for qtest. Rename the handler to
xtensa_breakpoint_handler() since it needs to become global.
Signed-off-by: Andreas Färber
---
target-xtensa/cpu.c|7 +++
target-xtensa/cpu.h
Store it in mcf_intc_state.
Prepares for passing it to m68k_set_irq_level().
Signed-off-by: Andreas Färber
---
hw/mcf.h |2 +-
hw/mcf5208.c | 11 +++
hw/mcf_intc.c |8
3 Dateien geändert, 12 Zeilen hinzugefügt(+), 9 Zeilen entfernt(-)
diff --git a/hw/mcf.h b/hw/
Split out TCG initialization from cpu_cris_init(). Avoid CPUCRISState
dependency for v10-specific initialization and for non-v10 by inlining
the decision into the initfn as well.
Signed-off-by: Andreas Färber
---
target-cris/cpu.c | 10 ++
target-cris/cpu.h |3 +
Am 16.02.2013 17:48, schrieb Stefan Berger:
> On 02/16/2013 06:04 AM, Andreas Färber wrote:
>> Am 15.02.2013 20:39, schrieb Stefan Berger:
>>> diff --git a/tpm/tpm_tis.h b/tpm/tpm_tis.h
>>> new file mode 100644
>>> index 000..6cf18bc
>>> --- /dev/null
>>> +++ b/tpm/tpm_tis.h
>>> @@ -0,0 +1,78 @
Version 2 is a simple rebase and conflict fix in the tests/Makefile.
r~
Richard Henderson (3):
host-utils: Use __int128_t for mul[us]64
host-utils: Improve mulu64 and muls64
tests: Add unit tests for mulu64 and muls64
configure | 20 ++
include/qemu/host-utils.h
Replace some x86_64 specific inline assembly with something that
all 64-bit hosts ought to optimize well. At worst this becomes
a call to the gcc __multi3 routine, which is no worse than our
implementation in util/host-utils.c.
With gcc 4.7, we get identical code generation for x86_64. We
now ge
Signed-off-by: Richard Henderson
---
tests/Makefile | 6 -
tests/test-mul64.c | 70 ++
2 files changed, 75 insertions(+), 1 deletion(-)
create mode 100644 tests/test-mul64.c
diff --git a/tests/Makefile b/tests/Makefile
index a2d62b8..
The new formulation makes better use of add-with-carry type insns
that the host may have. Use gcc's sign adjustment trick to avoid
having to perform a 128-bit negation.
Signed-off-by: Richard Henderson
---
util/host-utils.c | 92 +++
1 file ch
Hello Anthony,
These are the follow-ups to permanently fix qtest endianness issues.
v4 is a resend of just the qtest stuff from v3, to buy me time to respin tmp105
debug output separately.
Regards,
Andreas
v3 -> v4:
* Split off tmp105-test and tmp105 changes.
v2 -> v3:
* Split off libi2c-omap
In order to convert qmp() macro to an inline function, expose a
qtest_qmpv() function, reused by qtest_qmp().
We can't apply GCC_FMT_ATTR() since fdc-test is using zero-length format
strings, which would result in warnings treated as errors.
Signed-off-by: Andreas Färber
---
tests/libqtest.c |
Introduce [qtest_]{read,write}[bwlq]() libqtest functions and
corresponding QTest protocol commands to replace local versions in
libi2c-omap.c.
Also convert m48t59-test's cmos_{read,write}_mmio() to {read,write}b().
Signed-off-by: Andreas Färber
---
Makefile.objs |1 -
Makefile.target
libqtest.h provides a number of shortcut macros to avoid tests feeding
it the QTestState they operate on. Most of these can easily be turned
into static inline functions, so let's do that for clarity.
This avoids getting off-by-one error messages when passing wrong args.
Some macros had a val argu
On 2013-02-15 03:12, Orr Dvory wrote:
when debugging with qemu(user mode), qemu waits in infinite loop to read
a signal from gdb (when it waits on breakpoint for example).
I added sleeps to reduce the cpu usage from 100% to about ~0%.
Wouldn't it be better to toggle the O_NONBLOCK state of the
On 02/16/2013 06:19 AM, Andreas Färber wrote:
@@ -1 +1,2 @@
common-obj-y = tpm.o
+common-obj-$(CONFIG_TPM) += tpm_tis.o
Some softmmus might not even support ISA, so this needs to be
conditional on more than just the host's $(CONFIG_TPM), it should be a
combination of the host's CONFIG_TPM=y and
Commit 0b0d3320db74cde233ee7855ad32a9c121d20eb4 (TCG: Final globals
clean-up) moved code_gen_prologue but forgot to update ppc code.
This broke the build on 32-bit ppc. ppc64 is unaffected.
Cc: Evgeny Voevodin
Cc: Blue Swirl
Signed-off-by: Andreas Färber
---
tcg/ppc/tcg-target.h |2 +-
1 D
at 0xfff3cf20 enable SATA, MMC, PCI
c: Rob Herring
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
hw/highbank.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/highbank.c b/hw/highbank.c
index defcc09..64aef30 100644
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -143,6 +143,7 @@ s
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