Re: [Qemu-devel] [PATCH v5 09/33] target-arm: add macros to access banked registers

2014-10-06 Thread Peter Maydell
On 7 October 2014 05:02, Greg Bellows wrote: > Right, we need the macros to do string concatenation so they have to be > macros. That combination occurs 3 times from a quick look. I agree that it > may be cumbersome to try and invent a name. > > Anything to do on this? Make USE_SECURE_REG into

[Qemu-devel] [PATCH] pcie: change confused comment clearer

2014-10-06 Thread arei.gonglei
From: Gonglei This comment applies to all functions below it. It is not appropriate that called capability allocation functions, change it into capability list management functions. Signed-off-by: Gonglei --- hw/pci/pcie.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/

Re: [Qemu-devel] [PATCH] snapshot: Reset err to NULL to avoid double free

2014-10-06 Thread Markus Armbruster
Copying stable and maintainers. Chris Spiegel writes: > If an error occurs in bdrv_snapshot_delete_by_id_or_name(), "err" is > freed. If "err" is not set to NULL before calling > bdrv_snapshot_delete_by_id_or_name() again, it will not be updated on > error, and will be freed again. > > This can

[Qemu-devel] [PATCH v5 2/5] qom: add description field in ObjectProperty struct

2014-10-06 Thread arei.gonglei
From: Gonglei The descriptions can serve as documentation in the code, and they can be used to provide better help. Copy property descriptions when copying alias properties. Cc: Paolo Bonzini Cc: Michael S. Tsirkin Cc: Markus Armbruster Signed-off-by: Gonglei Reviewed-by: Paolo Bonzini Rev

[Qemu-devel] [PATCH v5 5/5] qdev: drop legacy_name from qdev properties

2014-10-06 Thread arei.gonglei
From: Gonglei The legacy_name is useless now, the better help information provided by description field of property. Cc: Paolo Bonzini Cc: Michael S. Tsirkin Cc: Markus Armbruster Signed-off-by: Gonglei Reviewed-by: Paolo Bonzini Reviewed-by: Michael S. Tsirkin --- hw/core/qdev-properties

[Qemu-devel] [PATCH v5 4/5] qmp: print descriptions of object properties

2014-10-06 Thread arei.gonglei
From: Gonglei Add a new "description" field to DevicePropertyInfo. The descriptions can serve as documentation in the code, and they can be used to provide better help. For example: $./qemu-system-x86_64 -device virtio-blk-pci,? Before this patch: virtio-blk-pci.iothread=link virtio-blk-pci.x-

[Qemu-devel] [PATCH v5 1/5] qdev: add description field in PropertyInfo struct

2014-10-06 Thread arei.gonglei
From: Gonglei The descriptions can serve as documentation in the code, and they can be used to provide better help. Cc: Paolo Bonzini Cc: Michael S. Tsirkin Cc: Markus Armbruster Signed-off-by: Gonglei Signed-off-by: Paolo Bonzini Reviewed-by: Paolo Bonzini Reviewed-by: Michael S. Tsirkin

[Qemu-devel] [PATCH v5 0/5] add description field in ObjectProperty and PropertyInfo struct

2014-10-06 Thread arei.gonglei
From: Gonglei v5 -> v4: 1. add some improvements by Michael's suggtion, Thanks. (Michael) 2. add 'Reviewed-by' tag (Paolo, Michael, Eric) v4 -> v3: 1. rebase on qom-next tree (Andreas) 2. fix memory leak in PATCH 2, move object_property_set_description calling in object_property_add_alia

[Qemu-devel] [PATCH v5 3/5] qdev: set the object property's description to the qdev property's.

2014-10-06 Thread arei.gonglei
From: Gonglei Set all static qdev properties' descriptions to object property's description. Cc: Paolo Bonzini Cc: Michael S. Tsirkin Cc: Markus Armbruster Signed-off-by: Gonglei Reviewed-by: Paolo Bonzini Reviewed-by: Michael S. Tsirkin --- hw/core/qdev.c | 5 + 1 file changed, 5 ins

Re: [Qemu-devel] [PATCH v5 12/33] target-arm: insert Aarch32 cpregs twice into hashtable

2014-10-06 Thread Greg Bellows
On 6 October 2014 11:25, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > From: Fabian Aggeler > > > > Prepare for cp register banking by inserting every cp register twice, > > once for secure world and once for non-secure world. > > > > Signed-off-by: Fabian Aggeler

Re: [Qemu-devel] [PATCH v5 32/33] target-arm: add GDB scr register

2014-10-06 Thread Greg Bellows
Dropped in v6 On 6 October 2014 11:27, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > Added the ability to print the scr register like can be done with the > cpsr. > > > > Signed-off-by: Greg Bellows > > Not sure you can just arbitrarily add new core registers > if

Re: [Qemu-devel] [PATCH v5 11/33] target-arm: arrayfying fieldoffset for banking

2014-10-06 Thread Greg Bellows
On 6 October 2014 11:19, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > From: Fabian Aggeler > > > > Prepare ARMCPRegInfo to support specifying two fieldoffsets per > > register definition. This will allow us to keep one register > > definition for banked registers (

Re: [Qemu-devel] [PATCH v4 00/47] Postcopy implementation

2014-10-06 Thread Cristian Klein
On 04 Oct 2014, at 4:21 , Dr. David Alan Gilbert wrote: > > I've updated our github at: > https://github.com/orbitfp7/qemu/tree/wp3-postcopy > > to have this version. > > and it corresponds to the tag: > https://github.com/orbitfp7/qemu/releases/tag/wp3-postcopy-v4 Hi Dave, I just tested thi

Re: [Qemu-devel] [PATCH v5 10/33] target-arm: add non-secure Translation Block flag

2014-10-06 Thread Greg Bellows
On 6 October 2014 13:10, Sergey Fedorov wrote: > On 06.10.2014 09:13, Peter Maydell wrote: > > On 30 September 2014 22:49, Greg Bellows > wrote: > >> From: Sergey Fedorov > >> > >> This patch is based on idea found in patch at > >> git://github.com/jowinter/qemu-trustzone.git > >> f3d955c6c0ed8

Re: [Qemu-devel] [PATCH v5 09/33] target-arm: add macros to access banked registers

2014-10-06 Thread Greg Bellows
Right, we need the macros to do string concatenation so they have to be macros. That combination occurs 3 times from a quick look. I agree that it may be cumbersome to try and invent a name. Anything to do on this? On 6 October 2014 11:09, Peter Maydell wrote: > On 30 September 2014 22:49, Gr

Re: [Qemu-devel] [PATCH v5 08/33] target-arm: add async excp target_el function

2014-10-06 Thread Greg Bellows
On 6 October 2014 11:02, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > From: Fabian Aggeler > > > > Adds a dedicated function for IRQ and FIQ exceptions to determine > > target_el and mode (Aarch32) according to tables in ARM ARMv8 and > > ARM ARM v7. > > > > Signed

Re: [Qemu-devel] [PATCH v5 07/33] target-arm: extend async excp masking

2014-10-06 Thread Greg Bellows
On 6 October 2014 10:53, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > From: Fabian Aggeler > > > > This patch extends arm_excp_unmasked() according to ARM ARMv7 and > > ARM ARMv8 (all EL running in Aarch32) and adds comments. > > "AA" (just do a search and replace

Re: [Qemu-devel] [PATCH v5 06/33] target-arm: A32: Emulate the SMC instruction

2014-10-06 Thread Greg Bellows
On 6 October 2014 10:46, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > From: Fabian Aggeler > > > > Implements SMC instruction in Aarch32 using the A32 syndrome. When > executing > > SMC instruction from monitor CPU mode SCR.NS bit is reset. > > > > Signed-off-by: S

[Qemu-devel] [Bug 638955] Re: emulated netcards don't work with recent sunos kernel

2014-10-06 Thread dblade
apparently it has something to do with x2apic. simply refining my cpu line to be -cpu kvm64,-x2apic leads to a working network. source of inspiration: http://forum.proxmox.com/threads/15850-Solaris-10 -Guest-no-network-traffic-after-upgrade-to-proxmox-3-1 -- You received this bug notification b

Re: [Qemu-devel] [Xen-devel] [PATCH 2/2] xen:i386:pc_piix: create isa bridge specific to IGD passthrough

2014-10-06 Thread Chen, Tiejun
Ping... Thanks Tiejun On 2014/9/30 10:43, Chen, Tiejun wrote: On 2014/9/29 18:01, Michael S. Tsirkin wrote: On Sun, Sep 28, 2014 at 10:59:05AM +0800, Chen, Tiejun wrote: On 2014/9/3 9:40, Kay, Allen M wrote: -Original Message- From: Chen, Tiejun Sent: Monday, September 01, 2014 12

Re: [Qemu-devel] [RFC PATCH] block/migration: Disable cache invalidate for incoming migration

2014-10-06 Thread Alexey Kardashevskiy
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 10/06/2014 09:03 PM, Stefan Hajnoczi wrote: > On Fri, Oct 03, 2014 at 02:12:06PM +1000, Alexey Kardashevskiy wrote: >> BDRV_O_INCOMING is only set when QEMU is about to receive migration >> and we do not want QEMU to check the file at opening time a

Re: [Qemu-devel] [PATCH v5 02/33] target-arm: add arm_is_secure() function

2014-10-06 Thread Peter Maydell
On 6 October 2014 21:47, Greg Bellows wrote: > > > On 6 October 2014 15:07, Peter Maydell wrote: >> You should use is_a64() rather than directly looking at >> env->aarch64, incidentally. > > > Since I am touching arm_current_el(), should I go ahead and fix it to use > is_a64() as well? Optional.

Re: [Qemu-devel] [PATCH v5 05/33] target-arm: make arm_current_pl() return PL3

2014-10-06 Thread Greg Bellows
On 6 October 2014 10:34, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > From: Fabian Aggeler > > > > Make arm_current_pl() return PL3 for secure PL1 and monitor mode. > > Increase MMU modes since mmu_index is directly infered from arm_ > > current_pl(). Changes asser

Re: [Qemu-devel] [PATCH v5 02/33] target-arm: add arm_is_secure() function

2014-10-06 Thread Greg Bellows
On 6 October 2014 15:07, Peter Maydell wrote: > On 6 October 2014 20:45, Greg Bellows wrote: > > On 6 October 2014 09:56, Peter Maydell wrote: > >> I checked your git tree and we don't actually use > >> arm_is_secure_below_el3() anywhere except in > >> arm_is_secure(), do we? That suggests to m

[Qemu-devel] [PATCH] snapshot: Reset err to NULL to avoid double free

2014-10-06 Thread Chris Spiegel
If an error occurs in bdrv_snapshot_delete_by_id_or_name(), "err" is freed. If "err" is not set to NULL before calling bdrv_snapshot_delete_by_id_or_name() again, it will not be updated on error, and will be freed again. This can be triggered by starting a VM with at least two drives and then att

Re: [Qemu-devel] [PATCH 1/2] qemu-char: Fix reconnect socket error reporting

2014-10-06 Thread Paolo Bonzini
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Il 06/10/2014 20:36, Eric Blake ha scritto: >>> -qemu_chr_socket_restart_timer(chr); + >>> check_report_connect_error(chr, "Unable to connect to"); > Works in English, but if there is ever translation of the message > printed in check_report_c

Re: [Qemu-devel] [PATCH v4 38/47] Add assertion to check migration_dirty_pages

2014-10-06 Thread Paolo Bonzini
Il 06/10/2014 20:51, Dr. David Alan Gilbert ha scritto: > * Paolo Bonzini (pbonz...@redhat.com) wrote: >> Il 03/10/2014 19:47, Dr. David Alan Gilbert (git) ha scritto: >>> >>> I've seen it go negative once during dev, it shouldn't >>> happen. >> >> You can move it earlier, perhaps even as patch 1,

Re: [Qemu-devel] [PATCH v5 02/33] target-arm: add arm_is_secure() function

2014-10-06 Thread Peter Maydell
On 6 October 2014 20:45, Greg Bellows wrote: > On 6 October 2014 09:56, Peter Maydell wrote: >> I checked your git tree and we don't actually use >> arm_is_secure_below_el3() anywhere except in >> arm_is_secure(), do we? That suggests to me we should >> just fold the two functions together. > > >

Re: [Qemu-devel] [PATCH] gdb: provide the name of the architecture in the target.xml

2014-10-06 Thread David Hildenbrand
> On 6 October 2014 20:14, David Hildenbrand wrote: > > actually the questions were addressed in the last review. Haven't received > > any > > answer from you to my reply. Maybe some mails got lost in the system. > > > > 32bit arm: > > -"On my way through the possible architecture names > > (bi

Re: [Qemu-devel] [PATCH v5 04/33] target-arm: rename arm_current_pl to arm_current_el

2014-10-06 Thread Greg Bellows
On 6 October 2014 10:10, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > Renamed the arm_current_pl CPU function to more accurately represent > that it > > returns the ARMv8 EL rather than ARMv7 PL. > Comment added in v6. > > > > Signed-off-by: Greg Bellows > > ---

Re: [Qemu-devel] [PATCH 1/2] qemu-char: Fix reconnect socket error reporting

2014-10-06 Thread Corey Minyard
On 10/06/2014 01:36 PM, Eric Blake wrote: > On 10/06/2014 11:59 AM, miny...@acm.org wrote: >> From: Corey Minyard >> >> If reconnect was set, errors wouldn't always be reported. >> Fix that and also only report a connect error once until a >> connection has been made. >> >> The primary purpose of

Re: [Qemu-devel] [PATCH v5 02/33] target-arm: add arm_is_secure() function

2014-10-06 Thread Greg Bellows
On 6 October 2014 09:56, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: > > From: Fabian Aggeler > > > > arm_is_secure() function allows to determine CPU security state > > if the CPU implements Security Extensions/EL3. > > arm_is_secure_below_el3() returns true if CPU i

Re: [Qemu-devel] [PATCH] gdb: provide the name of the architecture in the target.xml

2014-10-06 Thread David Hildenbrand
> On 30 September 2014 16:23, Jens Freimann wrote: > > From: David Hildenbrand > > > > This patch provides the name of the architecture in the target.xml if > > available. > > > > This allows the remote gdb to detect the target architecture on its own - so > > there is no need to specify it manu

Re: [Qemu-devel] [PATCH] gdb: provide the name of the architecture in the target.xml

2014-10-06 Thread Peter Maydell
On 6 October 2014 20:14, David Hildenbrand wrote: > actually the questions were addressed in the last review. Haven't received any > answer from you to my reply. Maybe some mails got lost in the system. > > 32bit arm: > -"On my way through the possible architecture names > (binutils-gdb/gdb/feat

Re: [Qemu-devel] [PATCH v5 01/33] target-arm: increase arrays of registers R13 & R14

2014-10-06 Thread Greg Bellows
Fixed in v6. On 30 September 2014 16:49, Greg Bellows wrote: > From: Fabian Aggeler > > Increasing banked_r13 and banked_r14 to store LR_mon and SP_mon (bank > index 7). > > Signed-off-by: Fabian Aggeler > Reviewed-by: Edgar E. Iglesias > Signed-off-by: Greg Bellows > --- > target-arm/cpu.h

Re: [Qemu-devel] [PATCH] gdb: provide the name of the architecture in the target.xml

2014-10-06 Thread David Hildenbrand
> On 6 October 2014 16:08, Cornelia Huck wrote: > > On Tue, 30 Sep 2014 17:23:47 +0200 > > Jens Freimann wrote: > > > >> From: David Hildenbrand > >> > >> This patch provides the name of the architecture in the target.xml if > >> available. > >> > >> This allows the remote gdb to detect the tar

[Qemu-devel] [PULL v2 4/5] linux-user: don't include timerfd if not needed

2014-10-06 Thread riku . voipio
From: Riku Voipio Without this, builds on older systems fail with: qemu/linux-user/syscall.c:61:25: warning: sys/timerfd.h: No such file or directory v2: fix the usual case where CONFIG_TIMERFD is enabled.. Signed-off-by: Riku Voipio --- linux-user/syscall.c | 4 +++- 1 file changed, 3 inse

[Qemu-devel] [PULL v2 0/5] linux-user patches for 2.2

2014-10-06 Thread riku . voipio
tags/pull-linux-user-20141006-2 for you to fetch changes up to 1a1c4db9b298956e89caf53b09b6a7a960d55d66: translate-all.c: memory walker initial address miscalculation (2014-10-06 21:53:35 +0300) linux-user pull for 2.2 Clearest

[Qemu-devel] [PULL v2 5/5] translate-all.c: memory walker initial address miscalculation

2014-10-06 Thread riku . voipio
From: Mikhail Ilyin The initial base address is miscalculated in walk_memory_regions(). It has to be shifted TARGET_PAGE_BITS more. Holder variables are extended to target_ulong size otherwise they don't fit for MIPS N32 (a 32-bit ABI with a 64-bit address space) and qemu won't compile. The issue

[Qemu-devel] [PULL v2 1/5] linux-user: Enable epoll_pwait syscall for ARM

2014-10-06 Thread riku . voipio
From: Peter Maydell We have support for the epoll_pwait syscall, but it wasn't enabled for ARM guests because we hadn't defined the syscall number; correct this deficiency. Reported-by: Dave Flogeras Signed-off-by: Peter Maydell Signed-off-by: Riku Voipio --- linux-user/arm/syscall_nr.h | 2

[Qemu-devel] [PULL v2 3/5] linux-user: Simplify timerid checks on g_posix_timers range

2014-10-06 Thread riku . voipio
From: Alexander Graf We check whether the passed in timer id is negative on all calls that involve g_posix_timers. However, these checks are bogus. First off we limit the timer_id to 16 bits which is not what Linux does. Then we check whether it's negative which it can't be because we masked it.

[Qemu-devel] [PULL v2 2/5] linux-user: Convert blkpg to use a special subop handler

2014-10-06 Thread riku . voipio
From: Alexander Graf The blkpg ioctl can take different payloads depending on the opcode in its payload structure. Create a new special ioctl handler that can only deal with partition style ones for now. This patch fixes running parted for me. Signed-off-by: Alexander Graf Signed-off-by: Riku

Re: [Qemu-devel] [PATCH v4 20/47] Add migration-capability boolean for postcopy-ram.

2014-10-06 Thread Dr. David Alan Gilbert
* Eric Blake (ebl...@redhat.com) wrote: > On 10/03/2014 11:47 AM, Dr. David Alan Gilbert (git) wrote: > > From: "Dr. David Alan Gilbert" > > > > Signed-off-by: Dr. David Alan Gilbert > > Reviewed-by: Eric Blake > > --- > > include/migration/migration.h | 1 + > > migration.c

Re: [Qemu-devel] [PULL 0/5] linux-user patches for 2.2

2014-10-06 Thread Riku Voipio
On Mon, Oct 06, 2014 at 05:49:14PM +0100, Peter Maydell wrote: > On 6 October 2014 15:59, Peter Maydell wrote: > > Hi. I'm afraid this doesn't compile on my ARM box: > > > > /root/qemu/linux-user/syscall.c: In function ‘do_syscall’: > > /root/qemu/linux-user/syscall.c:9695:9: error: implicit decla

Re: [Qemu-devel] [PATCH v4 32/47] postcopy: ram_enable_notify to switch on userfault

2014-10-06 Thread Dr. David Alan Gilbert
* Paolo Bonzini (pbonz...@redhat.com) wrote: > Il 03/10/2014 19:47, Dr. David Alan Gilbert (git) ha scritto: > > +static int postcopy_ram_sensitise_area(const char *block_name, void > > *host_addr, > > + ram_addr_t offset, ram_addr_t > > length, > > +

Re: [Qemu-devel] [PATCH v4 20/47] Add migration-capability boolean for postcopy-ram.

2014-10-06 Thread Eric Blake
On 10/03/2014 11:47 AM, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" > > Signed-off-by: Dr. David Alan Gilbert > Reviewed-by: Eric Blake > --- > include/migration/migration.h | 1 + > migration.c | 9 + > qapi-schema.json | 6 +

Re: [Qemu-devel] [PATCH v4 38/47] Add assertion to check migration_dirty_pages

2014-10-06 Thread Dr. David Alan Gilbert
* Paolo Bonzini (pbonz...@redhat.com) wrote: > Il 03/10/2014 19:47, Dr. David Alan Gilbert (git) ha scritto: > > > > I've seen it go negative once during dev, it shouldn't > > happen. > > You can move it earlier, perhaps even as patch 1, since it does not have > any dependency on postcopy and can

Re: [Qemu-devel] [PATCH 1/2] qemu-char: Fix reconnect socket error reporting

2014-10-06 Thread Eric Blake
On 10/06/2014 11:59 AM, miny...@acm.org wrote: > From: Corey Minyard > > If reconnect was set, errors wouldn't always be reported. > Fix that and also only report a connect error once until a > connection has been made. > > The primary purpose of this is to tell the user that a > connection fail

Re: [Qemu-devel] [PATCH v5 10/33] target-arm: add non-secure Translation Block flag

2014-10-06 Thread Sergey Fedorov
On 06.10.2014 09:13, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: >> From: Sergey Fedorov >> >> This patch is based on idea found in patch at >> git://github.com/jowinter/qemu-trustzone.git >> f3d955c6c0ed8c46bc0eb10b634201032a651dd2 by >> Johannes Winter . >> >> This fl

Re: [Qemu-devel] [PATCH v5 02/33] target-arm: add arm_is_secure() function

2014-10-06 Thread Peter Maydell
On 6 October 2014 18:57, Sergey Fedorov wrote: > On 06.10.2014 07:56, Peter Maydell wrote: >> Can these functions live in internals.h rather than cpu.h? >> (The difference is that internals.h is restricted to only >> target-arm/ code whereas cpu.h is auto-included for a much >> wider set of files.

[Qemu-devel] [PATCH 2/2] qemu-sockets: Add error to non-blocking connect handler

2014-10-06 Thread minyard
From: Corey Minyard An error value here would be quite handy and more consistent with the rest of the code. Corey Minyard --- include/qemu/sockets.h | 2 +- migration-tcp.c| 4 ++-- migration-unix.c | 4 ++-- qemu-char.c| 12 +++- util/qemu-sockets.c| 1

[Qemu-devel] [PATCH 1/2] qemu-char: Fix reconnect socket error reporting

2014-10-06 Thread minyard
From: Corey Minyard If reconnect was set, errors wouldn't always be reported. Fix that and also only report a connect error once until a connection has been made. The primary purpose of this is to tell the user that a connection failed so they can know they need to figure out what went wrong. S

[Qemu-devel] [PATCH 0/2] qemu-char: Clean up socket reporting

2014-10-06 Thread minyard
The first patch fixes some reporting issues for reconnect sockets that fail to connect. It prevents a constant stream of error messages, and reports the error immediately instead of delaying it. This required a small restructure, but nothing big. The second adds an error to non-blocking connect

Re: [Qemu-devel] [PATCH v5 02/33] target-arm: add arm_is_secure() function

2014-10-06 Thread Sergey Fedorov
On 06.10.2014 07:56, Peter Maydell wrote: > On 30 September 2014 22:49, Greg Bellows wrote: >> From: Fabian Aggeler >> >> arm_is_secure() function allows to determine CPU security state >> if the CPU implements Security Extensions/EL3. >> arm_is_secure_below_el3() returns true if CPU is in secure

Re: [Qemu-devel] [PATCH 08/17] mm: madvise MADV_USERFAULT

2014-10-06 Thread Andrea Arcangeli
Hi, On Sat, Oct 04, 2014 at 08:13:36AM +0900, Mike Hommey wrote: > On Fri, Oct 03, 2014 at 07:07:58PM +0200, Andrea Arcangeli wrote: > > MADV_USERFAULT is a new madvise flag that will set VM_USERFAULT in the > > vma flags. Whenever VM_USERFAULT is set in an anonymous vma, if > > userland touches a

Re: [Qemu-devel] [PATCH] virtio-pci: fix migration for pci bus master

2014-10-06 Thread Michael S. Tsirkin
On Mon, Oct 06, 2014 at 06:46:17PM +0200, Greg Kurz wrote: > On Mon, 6 Oct 2014 19:26:21 +0300 > "Michael S. Tsirkin" wrote: > > On Mon, Oct 06, 2014 at 04:51:35PM +0200, Greg Kurz wrote: > > > On Wed, 17 Sep 2014 20:39:25 +0300 > > > "Michael S. Tsirkin" wrote: > > > > > > > On Wed, Sep 17, 201

Re: [Qemu-devel] [PATCH] gdb: provide the name of the architecture in the target.xml

2014-10-06 Thread Peter Maydell
On 30 September 2014 16:23, Jens Freimann wrote: > From: David Hildenbrand > > This patch provides the name of the architecture in the target.xml if > available. > > This allows the remote gdb to detect the target architecture on its own - so > there is no need to specify it manually (e.g. if gd

Re: [Qemu-devel] [PATCH] gdb: provide the name of the architecture in the target.xml

2014-10-06 Thread Peter Maydell
On 6 October 2014 16:08, Cornelia Huck wrote: > On Tue, 30 Sep 2014 17:23:47 +0200 > Jens Freimann wrote: > >> From: David Hildenbrand >> >> This patch provides the name of the architecture in the target.xml if >> available. >> >> This allows the remote gdb to detect the target architecture on

Re: [Qemu-devel] Question on qemu threads

2014-10-06 Thread Al Patel
Thank You, Brian and Stefan! -a On Thu, Oct 2, 2014 at 11:15 AM, Stefan Hajnoczi wrote: > On Tue, Sep 30, 2014 at 01:44:48PM -0400, Al Patel wrote: > > In the current system, what are the extra threads? > > The set of thread is dynamic because worker threads are started and > terminated depend

Re: [Qemu-devel] [PULL 0/5] linux-user patches for 2.2

2014-10-06 Thread Peter Maydell
On 6 October 2014 15:59, Peter Maydell wrote: > Hi. I'm afraid this doesn't compile on my ARM box: > > /root/qemu/linux-user/syscall.c: In function ‘do_syscall’: > /root/qemu/linux-user/syscall.c:9695:9: error: implicit declaration of > function ‘timerfd_create’ [-Werror=implicit-function-declarat

Re: [Qemu-devel] [PATCH] virtio-pci: fix migration for pci bus master

2014-10-06 Thread Greg Kurz
On Mon, 6 Oct 2014 19:26:21 +0300 "Michael S. Tsirkin" wrote: > On Mon, Oct 06, 2014 at 04:51:35PM +0200, Greg Kurz wrote: > > On Wed, 17 Sep 2014 20:39:25 +0300 > > "Michael S. Tsirkin" wrote: > > > > > On Wed, Sep 17, 2014 at 07:21:09PM +0200, Greg Kurz wrote: > > > > On Sun, 14 Sep 2014 21:30

Re: [Qemu-devel] [PATCH 10/17] mm: rmap preparation for remap_anon_pages

2014-10-06 Thread Andrea Arcangeli
Hello, On Mon, Oct 06, 2014 at 09:55:41AM +0100, Dr. David Alan Gilbert wrote: > * Linus Torvalds (torva...@linux-foundation.org) wrote: > > On Fri, Oct 3, 2014 at 10:08 AM, Andrea Arcangeli > > wrote: > > > > > > Overall this looks a fairly small change to the rmap code, notably > > > less intr

Re: [Qemu-devel] [PATCH v5 00/33] target-arm: add Security Extensions for CPUs

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > Version 5 of the ARM processor security extension (TrustZone) support. > This patchset includes changes to support the processor security extensions > on ARMv7 aarch32 with hooks for later enabling v8 aarch64/32. Thanks. I've reviewed the first do

Re: [Qemu-devel] [PATCH v5 33/33] target-arm: add cpu feature EL3 to CPUs with Security Extensions

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > Set ARM_FEATURE_EL3 feature for CPUs that implement Security Extensions. > > Signed-off-by: Fabian Aggeler > Signed-off-by: Greg Bellows (as we've discussed, but just as a note for the wider audience:) This is the patch

Re: [Qemu-devel] [PATCH v5 32/33] target-arm: add GDB scr register

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > Added the ability to print the scr register like can be done with the cpsr. > > Signed-off-by: Greg Bellows Not sure you can just arbitrarily add new core registers if gdb isn't expecting them, and in any case if we want to do this we should prob

Re: [Qemu-devel] [PATCH v5 12/33] target-arm: insert Aarch32 cpregs twice into hashtable

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > Prepare for cp register banking by inserting every cp register twice, > once for secure world and once for non-secure world. > > Signed-off-by: Fabian Aggeler > Signed-off-by: Greg Bellows > > -- > v4 -> v5 > - A

Re: [Qemu-devel] [PATCH] virtio-pci: fix migration for pci bus master

2014-10-06 Thread Michael S. Tsirkin
On Mon, Oct 06, 2014 at 04:51:35PM +0200, Greg Kurz wrote: > On Wed, 17 Sep 2014 20:39:25 +0300 > "Michael S. Tsirkin" wrote: > > > On Wed, Sep 17, 2014 at 07:21:09PM +0200, Greg Kurz wrote: > > > On Sun, 14 Sep 2014 21:30:36 +0300 > > > "Michael S. Tsirkin" wrote: > > > > > > > Current support

Re: [Qemu-devel] [PATCH v5 11/33] target-arm: arrayfying fieldoffset for banking

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > Prepare ARMCPRegInfo to support specifying two fieldoffsets per > register definition. This will allow us to keep one register > definition for banked registers (different offsets for secure/ > non-secure world). > > Signe

Re: [Qemu-devel] [PATCH v5 10/33] target-arm: add non-secure Translation Block flag

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Sergey Fedorov > > This patch is based on idea found in patch at > git://github.com/jowinter/qemu-trustzone.git > f3d955c6c0ed8c46bc0eb10b634201032a651dd2 by > Johannes Winter . > > This flag prevents QEMU from executing TCG code generated f

Re: [Qemu-devel] [PATCH v5 09/33] target-arm: add macros to access banked registers

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > If EL3 is in Aarch32 state certain cp registers are banked (secure and > non-secure instance). When reading or writing to coprocessor registers > the following macros can be used. > > - A32_BANKED macros are used for choos

Re: [Qemu-devel] [PATCH v5 08/33] target-arm: add async excp target_el function

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > Adds a dedicated function for IRQ and FIQ exceptions to determine > target_el and mode (Aarch32) according to tables in ARM ARMv8 and > ARM ARM v7. > > Signed-off-by: Fabian Aggeler > Signed-off-by: Greg Bellows > >

Re: [Qemu-devel] [PATCH v5 07/33] target-arm: extend async excp masking

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > This patch extends arm_excp_unmasked() according to ARM ARMv7 and > ARM ARMv8 (all EL running in Aarch32) and adds comments. "AA" (just do a search and replace through the whole patchset, please.) > > If EL3 is using Aar

Re: [Qemu-devel] [PATCH v5 06/33] target-arm: A32: Emulate the SMC instruction

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > Implements SMC instruction in Aarch32 using the A32 syndrome. When executing > SMC instruction from monitor CPU mode SCR.NS bit is reset. > > Signed-off-by: Sergey Fedorov > Signed-off-by: Fabian Aggeler > Signed-off-by:

Re: [Qemu-devel] [PATCH v5 05/33] target-arm: make arm_current_pl() return PL3

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > Make arm_current_pl() return PL3 for secure PL1 and monitor mode. > Increase MMU modes since mmu_index is directly infered from arm_ > current_pl(). Changes assertion in arm_el_is_aa64() to allow EL3. > > Signed-off-by: Fa

Re: [Qemu-devel] [PATCH v5 04/33] target-arm: rename arm_current_pl to arm_current_el

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > Renamed the arm_current_pl CPU function to more accurately represent that it > returns the ARMv8 EL rather than ARMv7 PL. > > Signed-off-by: Greg Bellows > --- > target-arm/cpu.h | 18 +- > target-arm/helper-a64.c|

Re: [Qemu-devel] [PATCH] gdb: provide the name of the architecture in the target.xml

2014-10-06 Thread Cornelia Huck
On Tue, 30 Sep 2014 17:23:47 +0200 Jens Freimann wrote: > From: David Hildenbrand > > This patch provides the name of the architecture in the target.xml if > available. > > This allows the remote gdb to detect the target architecture on its own - so > there is no need to specify it manually (

Re: [Qemu-devel] [PATCH v5 03/33] target-arm: reject switching to monitor mode

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Sergey Fedorov > > ...from non-secure state. > > Signed-off-by: Sergey Fedorov > Signed-off-by: Fabian Aggeler > Reviewed-by: Edgar E. Iglesias > Signed-off-by: Greg Bellows Reviewed-by: Peter Maydell though as a style nit I would pre

Re: [Qemu-devel] [PULL 0/5] linux-user patches for 2.2

2014-10-06 Thread Peter Maydell
available in the git repository at: > > git://git.linaro.org/people/riku.voipio/qemu.git > tags/pull-linux-user-20141006 > > for you to fetch changes up to 88555b7dfa79d7d21100d0b90730bf43d25d735b: > > translate-all.c: memory walker initi

[Qemu-devel] [PATCH v2 3/3] pc: clean up pre-2.1 compatibility code

2014-10-06 Thread Paolo Bonzini
Now that the alignment is parameterized, we can share the call to acpi_align_size between all three (1.7-2.0/2.1/2.2+) sizing algorithms. Also, with the new rule that SSDT cannot change except with machine-type compat code, the magic 97 constant for a CPU's AML size is not anymore "legacy", so ren

Re: [Qemu-devel] [PATCH v5 02/33] target-arm: add arm_is_secure() function

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > arm_is_secure() function allows to determine CPU security state > if the CPU implements Security Extensions/EL3. > arm_is_secure_below_el3() returns true if CPU is in secure state > below EL3. > > Signed-off-by: Sergey Fed

[Qemu-devel] [PATCH v2 2/3] pc: go back to smaller ACPI tables

2014-10-06 Thread Paolo Bonzini
The new algorithm introduced by the previous patch lets us make tables smaller and avoid bugs due to large tables. Use it for 2.2+ machine types by tweaking the default fixed_table_align and acpi_table_align values. At the same time, preserve backwards-compatible logic for pc-i440fx-2.1. Without

[Qemu-devel] [PATCH v2 1/3] pc: introduce new ACPI table sizing algorithm

2014-10-06 Thread Paolo Bonzini
Add padding after the DSDT. Tables that vary depending on the command-line arguments will have to be byte-equivalent across QEMU versions >= 2.2, while fixed tables (including the DSDT) can be changed freely. This new algorithm will let us present smaller ACPI blobs to the guest, which avoids bug

[Qemu-devel] [PATCH v2 0/3] Migration-safe ACPI table sizing algorithm

2014-10-06 Thread Paolo Bonzini
In the emergency last-minute patches of QEMU 2.1 we did two things: - fixed migration problems from 1.7 or 2.0 to 2.1 due to changes in ACPI table sizes - ensured that future versions will not break migration compatibility with 2.2 for reasonable configurations (with ACPI tables smaller tha

Re: [Qemu-devel] [PATCH] virtio-pci: fix migration for pci bus master

2014-10-06 Thread Greg Kurz
On Wed, 17 Sep 2014 20:39:25 +0300 "Michael S. Tsirkin" wrote: > On Wed, Sep 17, 2014 at 07:21:09PM +0200, Greg Kurz wrote: > > On Sun, 14 Sep 2014 21:30:36 +0300 > > "Michael S. Tsirkin" wrote: > > > > > Current support for bus master (clearing OK bit) > > > together with the need to support g

[Qemu-devel] [RFC PATCH] target-i386: move generic memory hotplug methods to DSDTs

2014-10-06 Thread Paolo Bonzini
This makes it simpler to keep the SSDT byte-for-byte identical for a given machine type, which is a goal we want to have for 2.2 and newer types. This is not tested well and is still missing update of "make check" data, but I wanted to throw this out for an early look. Signed-off-by: Paolo Bonzin

Re: [Qemu-devel] [PATCH] aio / timers: De-document -clock

2014-10-06 Thread Alex Bligh
OK by me - sorry about that. Alex On 6 Oct 2014, at 15:19, Markus Armbruster wrote: > Commit 6d32717 "aio / timers: Remove alarm timers" has issues: > > 1. It silently ignores -clock for backward compatibility. > Incompatible change: -clock help no longer terminates the program. > Tolerable. >

[Qemu-devel] [PATCH] linuxboot: compute initrd loading address

2014-10-06 Thread Paolo Bonzini
Even though hw/i386/pc.c tries to compute a valid loading address for the initrd, close to the top of RAM, this does not take into account other data that is malloced into that memory by SeaBIOS. Luckily we can easily look at the memory map to find out how much memory is used up there. This patch

Re: [Qemu-devel] [PATCH v5 01/33] target-arm: increase arrays of registers R13 & R14

2014-10-06 Thread Peter Maydell
On 30 September 2014 22:49, Greg Bellows wrote: > From: Fabian Aggeler > > Increasing banked_r13 and banked_r14 to store LR_mon and SP_mon (bank > index 7). > > Signed-off-by: Fabian Aggeler > Reviewed-by: Edgar E. Iglesias > Signed-off-by: Greg Bellows > --- > target-arm/cpu.h | 4 ++-- >

Re: [Qemu-devel] [PATCH] gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag

2014-10-06 Thread Peter Maydell
On 5 October 2014 23:07, Michael Walle wrote: > Am Sonntag, 5. Oktober 2014, 22:48:05 schrieb Peter Maydell: >> On 5 October 2014 22:36, Peter Maydell wrote: >> > On 5 October 2014 22:00, Michael Walle wrote: >> >> I can confirm that your patch makes qemu stop one instruction earlier. >> >> With

Re: [Qemu-devel] [PATCH] block/curl: Improve type safety of s->timeout.

2014-10-06 Thread Laszlo Ersek
On 10/06/14 16:40, Richard W.M. Jones wrote: > On Mon, Oct 06, 2014 at 04:38:59PM +0200, Laszlo Ersek wrote: >> On 10/06/14 16:32, Richard W.M. Jones wrote: >>> qemu_opt_get_number returns a uint64_t, and curl_easy_setopt expects a >>> long (not an int). >>> >>> Store the timeout (which is a positi

Re: [Qemu-devel] [PATCH] block/curl: Improve type safety of s->timeout.

2014-10-06 Thread Richard W.M. Jones
On Mon, Oct 06, 2014 at 04:38:59PM +0200, Laszlo Ersek wrote: > On 10/06/14 16:32, Richard W.M. Jones wrote: > > qemu_opt_get_number returns a uint64_t, and curl_easy_setopt expects a > > long (not an int). > > > > Store the timeout (which is a positive number of seconds) as a > > uint64_t. Check

Re: [Qemu-devel] [PATCH] block/curl: Improve type safety of s->timeout.

2014-10-06 Thread Laszlo Ersek
On 10/06/14 16:32, Richard W.M. Jones wrote: > qemu_opt_get_number returns a uint64_t, and curl_easy_setopt expects a > long (not an int). > > Store the timeout (which is a positive number of seconds) as a > uint64_t. Check that the number given by the user is reasonable. > Cast it to long before

[Qemu-devel] [PULL 1/5] linux-user: Enable epoll_pwait syscall for ARM

2014-10-06 Thread riku . voipio
From: Peter Maydell We have support for the epoll_pwait syscall, but it wasn't enabled for ARM guests because we hadn't defined the syscall number; correct this deficiency. Reported-by: Dave Flogeras Signed-off-by: Peter Maydell Signed-off-by: Riku Voipio --- linux-user/arm/syscall_nr.h | 2

[Qemu-devel] [PULL 2/5] linux-user: Convert blkpg to use a special subop handler

2014-10-06 Thread riku . voipio
From: Alexander Graf The blkpg ioctl can take different payloads depending on the opcode in its payload structure. Create a new special ioctl handler that can only deal with partition style ones for now. This patch fixes running parted for me. Signed-off-by: Alexander Graf Signed-off-by: Riku

[Qemu-devel] [PULL 0/5] linux-user patches for 2.2

2014-10-06 Thread riku . voipio
iku.voipio/qemu.git tags/pull-linux-user-20141006 for you to fetch changes up to 88555b7dfa79d7d21100d0b90730bf43d25d735b: translate-all.c: memory walker initial address miscalculation (2014-10-01 16:16:14 +0300) linux-user pull for 2.2

[Qemu-devel] [PULL 4/5] linux-user: don't include timerfd if not needed

2014-10-06 Thread riku . voipio
From: Riku Voipio Without this, builds on older systems fail with: qemu/linux-user/syscall.c:61:25: warning: sys/timerfd.h: No such file or directory Signed-off-by: Riku Voipio --- linux-user/syscall.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/linux-user/syscall.c b/linux-user/sys

[Qemu-devel] [PULL 5/5] translate-all.c: memory walker initial address miscalculation

2014-10-06 Thread riku . voipio
From: Mikhail Ilyin The initial base address is miscalculated in walk_memory_regions(). It has to be shifted TARGET_PAGE_BITS more. Holder variables are extended to target_ulong size otherwise they don't fit for MIPS N32 (a 32-bit ABI with a 64-bit address space) and qemu won't compile. The issue

[Qemu-devel] [PULL 3/5] linux-user: Simplify timerid checks on g_posix_timers range

2014-10-06 Thread riku . voipio
From: Alexander Graf We check whether the passed in timer id is negative on all calls that involve g_posix_timers. However, these checks are bogus. First off we limit the timer_id to 16 bits which is not what Linux does. Then we check whether it's negative which it can't be because we masked it.

[Qemu-devel] [PATCH] block/curl: Improve type safety of s->timeout.

2014-10-06 Thread Richard W.M. Jones
qemu_opt_get_number returns a uint64_t, and curl_easy_setopt expects a long (not an int). Store the timeout (which is a positive number of seconds) as a uint64_t. Check that the number given by the user is reasonable. Cast it to long before calling curl_easy_setopt. Example error message after t

[Qemu-devel] [PATCH] aio / timers: De-document -clock

2014-10-06 Thread Markus Armbruster
Commit 6d32717 "aio / timers: Remove alarm timers" has issues: 1. It silently ignores -clock for backward compatibility. Incompatible change: -clock help no longer terminates the program. Tolerable. 2. Failed to update option documentation. In particular, -help still advises users to try -clock

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