qerror_report_err() is a transitional interface to help with
converting existing monitor commands to QMP. It should not be used
elsewhere. Replace by error_report_err() in HMP command handler
hmp_trace_event().
Signed-off-by: Markus Armbruster arm...@redhat.com
Reviewed-by: Eric Blake
I've typed error_report(%s, error_get_pretty(ERR)) too many times
already, and I've fixed too many instances of qerror_report_err(ERR)
to error_report(%s, error_get_pretty(ERR)) as well. Capture the
pattern in a convenience function.
Since it's almost invariably followed by error_free(), stuff
On Mon, 9 Feb 2015 17:53:14 -0200
Eduardo Habkost ehabk...@redhat.com wrote:
The CPU indexes for NUMA nodes make sense only up to max_cpus, and CPU
indexes max_cpus are ignored. Reject configuration which uses invalid
CPU indexes.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
---
If do_sd_create() fails, it first reports the error returned, then
reports a another one with strerror(errno). errno is meaningless at
that point.
Report just one error combining the valid information from both
messages.
Reported-by: Eric Blake ebl...@redhat.com
Signed-off-by: Markus Armbruster
Li, Liang Z liang.z...@intel.com wrote:
Reviewing patch 8, I found that we need to fix some things here.
+static int ram_save_compressed_page(QEMUFile *f, RAMBlock *block,
+ram_addr_t offset, bool
+last_stage) {
+int bytes_sent = -1;
+
+/*
Since 374f2981d1 memory: protect current_map by RCU,
address_space_update_topology unrefs the old_flatview twice,
once by call_rcu and once by direct call. This patch removes
the direct call in favor of the call_rcu. Fixes at least one
assertion failure seen in s390, where a ref count for a
On 02/12/2015 05:54 AM, Vladimir Sementsov-Ogievskiy wrote:
On 11.02.2015 00:30, John Snow wrote:
On 01/27/2015 05:56 AM, Vladimir Sementsov-Ogievskiy wrote:
Signed-off-by: Vladimir Sementsov-Ogievskiy vsement...@parallels.com
---
block.c | 5 +
include/block/block.h |
On 12 February 2015 at 14:45, Alexander Graf ag...@suse.de wrote:
On 12.02.2015, at 15:35, Mark Burton mark.bur...@greensocs.com wrote:
We are proposing to implement this by signalling all other CPU’s
to exit (and requesting they flush before re-starting). In other
words, this would happen
Drop this patch and just give an error when trying to set xbzrle and
compression? User have to pick one and only one, no second guess
him/her?
Live migration can benefit from compression co-work with xbzrle. You
know, xbzrle transfer the raw RAM pages to destination in the ram bulk
OK - Alex - your implication is that it has to be atomic, we need the sync…
:-(
I have a horrid feeling that the atomicity of global flush can’t be causing the
(almost, but not quite reproducible) errors we’re seeing - but… anyway ;-)
Cheers
Mark.
On 12 Feb 2015, at 15:45, Alexander
On 12/02/2015 15:22, Igor Mammedov wrote:
how about replacing a bunch if fprintf's with something like this:
cpu = 0;
while((cpu = find_next_bit(present_cpus, MAX_CPUMASK_BITS, cpu + 1))
!=MAX_CPUMASK_BITS)
str = g_strdup_printf(%s %d, str, cpu);
error_report(CPU(s) present in
On 12.02.15 16:08, Mark Burton wrote:
On 12 Feb 2015, at 16:01, Peter Maydell peter.mayd...@linaro.org wrote:
On 12 February 2015 at 14:45, Alexander Graf ag...@suse.de wrote:
On 12.02.2015, at 15:35, Mark Burton mark.bur...@greensocs.com wrote:
We are proposing to implement this by
On Thu, Feb 12, 2015 at 04:01:49PM +0100, Igor Mammedov wrote:
On Mon, 9 Feb 2015 17:53:15 -0200
Eduardo Habkost ehabk...@redhat.com wrote:
Each CPU can appear in only one NUMA node on the NUMA config. Reject
configuration if a CPU appears in multiple nodes.
Signed-off-by: Eduardo
* Mark Burton (mark.bur...@greensocs.com) wrote:
On 12 Feb 2015, at 16:01, Peter Maydell peter.mayd...@linaro.org wrote:
On 12 February 2015 at 14:45, Alexander Graf ag...@suse.de wrote:
On 12.02.2015, at 15:35, Mark Burton mark.bur...@greensocs.com wrote:
We are proposing to
On Wed, Jan 14, 2015 at 01:56:56AM +0100, Alexander Graf wrote:
On hosts with limited virtual address space (32bit pointers), we can very
easily run out of virtual memory with big thread pools.
Instead, we should limit ourselves to small pools to keep memory footprint
low on those systems.
Am 12.02.2015 um 14:24 schrieb Paolo Bonzini:
On 12/02/2015 14:20, Peter Lieven wrote:
I have a Windows system which fails to migrate with this error almost
reliably when migrating
from one host to another (both qemu-2.2.0). The error seems to be gone
in master, but I was
unable to track the
On Thu, Feb 12, 2015 at 02:41:15PM +, Peter Maydell wrote:
On 12 February 2015 at 13:08, Jens Freimann jf...@linux.vnet.ibm.com wrote:
We have defines for VIRTIO_TRANSPORT_F_START/_END in two places.
In include/hw/virtio/virtio.h and in linux-headers/linux/virtio_config.h
Since we
On 12 February 2015 at 14:45, Alexander Graf ag...@suse.de wrote:
almost nobody except x86 does global flushes
All ARM TLB maintenance operations have both this CPU only
and all TLBs in the Inner Shareable domain [that's ARM-speak
for every CPU core in the cluster] variants (the latter
being the
On Mon, 9 Feb 2015 17:53:15 -0200
Eduardo Habkost ehabk...@redhat.com wrote:
Each CPU can appear in only one NUMA node on the NUMA config. Reject
configuration if a CPU appears in multiple nodes.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
---
numa.c | 27
This series fixes and extends the determination of whether or
not an address is executable for LPAE translations. The main
patch is 4/5, and describes the details in its commit message.
Patches 1-3 prepare for the main patch, and patch 5/5 is a
code cleanup made possible by introducing a new
Give callers the ability to get page protection flags for PL0, even
if not currently operating in PL0. This puts the burden of determining
'is_user' on the caller (again - it was this way before regime_is_user
was introduced), but will be useful in a following patch.
Signed-off-by: Andrew Jones
Teach get_rw_prot about the simple AP format AP[2:1]. An additional
switch was added, as opposed to converting ap := AP[2:1] to AP[2:0]
with a simple shift - and then modifying cases 0,2,4,6, because the
resulting code is easier to read with the switch.
Signed-off-by: Andrew Jones
Now that we have get_S1prot, we can apply it to get_phys_addr_v6
for a minor code cleanup.
Signed-off-by: Andrew Jones drjo...@redhat.com
---
target-arm/helper.c | 27 ---
1 file changed, 8 insertions(+), 19 deletions(-)
diff --git a/target-arm/helper.c
On 02/12/2015 06:49 AM, Markus Armbruster wrote:
If do_sd_create() fails, it first reports the error returned, then
reports a another one with strerror(errno). errno is meaningless at
that point.
Report just one error combining the valid information from both
messages.
Reported-by: Eric
On 02/12/2015 06:33 AM, Markus Armbruster wrote:
Coccinelle semantic patch:
@@
expression E;
@@
-error_report(%s, error_get_pretty(E));
-error_free(E);
+error_report_err(E);
@@
expression E, S;
@@
-error_report(%s,
Instead of mixing access permission checking with access permissions
to page protection flags translation, just do the translation, and
leave it to the caller to check the protection flags against the access
type. As this function only considers READ/WRITE, not EXEC, then name
it accordingly.
On 12 Feb 2015, at 16:01, Peter Maydell peter.mayd...@linaro.org wrote:
On 12 February 2015 at 14:45, Alexander Graf ag...@suse.de wrote:
On 12.02.2015, at 15:35, Mark Burton mark.bur...@greensocs.com wrote:
We are proposing to implement this by signalling all other CPU’s
to exit (and
This patch makes the following changes to the determination of
whether an address is executable, when translating addresses
using LPAE.
1. No longer assumes that PL0 can't execute when it can't read.
It can in AArch64, a difference from AArch32.
2. Use va_size == 64 to determine we're in
On 02/12/2015 06:33 AM, Markus Armbruster wrote:
I've typed error_report(%s, error_get_pretty(ERR)) too many times
already, and I've fixed too many instances of qerror_report_err(ERR)
to error_report(%s, error_get_pretty(ERR)) as well. Capture the
pattern in a convenience function.
Since
On Thu, Feb 12, 2015 at 04:18:31PM +0100, Paolo Bonzini wrote:
On 12/02/2015 15:22, Igor Mammedov wrote:
how about replacing a bunch if fprintf's with something like this:
cpu = 0;
while((cpu = find_next_bit(present_cpus, MAX_CPUMASK_BITS, cpu + 1))
!=MAX_CPUMASK_BITS)
str =
Am 10.02.2015 um 11:50 schrieb Marcelo Tosatti:
On Tue, Feb 10, 2015 at 10:26:33AM +0100, Peter Lieven wrote:
Hi,
while migrating vServers from 2.1.0 to 2.2.0 I see the following assertion that
seems to have
been introduced between 2.1.0 and 2.2.0 trigger on the destination. This
happens in
On 12.02.15 15:58, Peter Maydell wrote:
On 12 February 2015 at 14:45, Alexander Graf ag...@suse.de wrote:
almost nobody except x86 does global flushes
All ARM TLB maintenance operations have both this CPU only
and all TLBs in the Inner Shareable domain [that's ARM-speak
for every CPU core
On Thu, Feb 12, 2015 at 11:50:05AM +0530, Pankaj Gupta wrote:
vhostforce was added to enable use of vhost when
guest don't have MSI-X support.
Now, we have scenarios which dont use interrupts
like DPDK and still use vhost. Also, performance of
guests without MSI-X
Cornelia, Alex, Christian,
these patches add support to chane the IPL device from within the guest.
Jens
Fan Zhang (4):
s390x/ipl: always load the bios for ccw machine
s390x/ipl: support diagnose 308 subcodes 5 and 6
s390x/ipl: drop reipl parameters on resets
s390x/ipl: make s390x ipl
From: Fan Zhang zhang...@linux.vnet.ibm.com
Whenever a reboot initiated by the guest is done, the reipl parameters should
remain valid. The disk configured by the guest is to be used for
ipl'ing. External reboot/reset request (e.g. via virsh reset guest) should
completely reset the guest to the
From: Fan Zhang zhang...@linux.vnet.ibm.com
We have to migrate the reipl parameters, so a reboot on the migrated machine
will behave just like on the origin. Otherwise, the reipl parameters configured
by the guest would be lost.
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
Reviewed-by:
On Tue, Feb 10, 2015 at 02:25:02PM +0100, Kevin Wolf wrote:
If an internal snapshot can't be saved because migration is blocked
(most commonly probably because of AHCI), we had a really bad error
message:
$ echo -e savevm foo\nquit | qemu -M q35 /tmp/test.qcow2 -monitor stdio
QEMU 2.2.50
On Thu, Feb 12, 2015 at 04:05:07PM +0100, Andrew Jones wrote:
Now that we have get_S1prot, we can apply it to get_phys_addr_v6
for a minor code cleanup.
Actually, I should point out that this isn't just a cleanup, but
also a fix. See below.
Signed-off-by: Andrew Jones drjo...@redhat.com
Cornelia, Alex, Christian,
this patches are a rework of guest memory access to allow access to
guest logical address space.
Frank Blaschka (1):
s390x/pci: Rework memory access in zpci instruction
Thomas Huth (24):
s390x/mmu: Move mmu_translate() and friends to separate file
s390x/mmu:
From: Frank Blaschka frank.blasc...@de.ibm.com
Change zpci instructions to use the new logical memory access
functions.
Signed-off-by: Frank Blaschka blasc...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
---
hw/s390x/s390-pci-inst.c | 37
From: Thomas Huth th...@linux.vnet.ibm.com
We can get rid of the switch(asc) in mmu_translate_asc() by simply
selecting the right control register ASCE in the mmu_translate()
function already.
This patch is based on an original patch/idea by Ralf Hoppe.
Signed-off-by: Thomas Huth
From: Thomas Huth th...@linux.vnet.ibm.com
The current code used a wrong and very confusing way of dealing with
the table levels by introducing a fake level above current. However,
the real problem was simply that the checks for the region/segment
invalid bit and for the matching region/segment
From: Thomas Huth th...@linux.vnet.ibm.com
If the DAT-protection bit is set in the region table entry and EDAT is
enabled, only read accesses are allowed in the corresponding memory area.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
From: Thomas Huth th...@linux.vnet.ibm.com
If an ASCE has illegal bits set, an ASCE-type exception should be
generated instead of a translation specification exception.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: David
From: Thomas Huth th...@linux.vnet.ibm.com
Change the handler for STSCH to use the new logical memory
access functions.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
---
From: Thomas Huth th...@linux.vnet.ibm.com
The ACSEs have a table length field and the region entries have
table length and offset fields which must be checked during
translation to see whether the given virtual address is really
covered by the translation table.
Signed-off-by: Thomas Huth
From: Thomas Huth th...@linux.vnet.ibm.com
Change the handler for MSCH to use the new logical memory
access functions.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
---
From: Thomas Huth th...@linux.vnet.ibm.com
When a fault occurs during the MMU lookup in s390_cpu_get_phys_page_debug(),
the trigger_page_fault() function writes the translation exception code
into the lowcore - something you would not expect during a memory access
by the debugger. Ease this
From: Thomas Huth th...@linux.vnet.ibm.com
The function is now not used anymore, so it can be removed safely.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Acked-by: Cornelia Huck cornelia.h...@de.ibm.com
Reviewed-by: David Hildenbrand
From: Thomas Huth th...@linux.vnet.ibm.com
The schib parameter of css_do_msch() can be declared as const to
make it clear that it does not get modified by this function.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: David
On 12/02/2015 17:21, Matthew Rosato wrote:
Since 374f2981d1 memory: protect current_map by RCU,
address_space_update_topology unrefs the old_flatview twice,
once by call_rcu and once by direct call. This patch removes
the direct call in favor of the call_rcu. Fixes at least one
assertion
From: Thomas Huth th...@linux.vnet.ibm.com
Each different level of region/segment table has a dedicated
exception type for illegal entries.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: David Hildenbrand
From: Thomas Huth th...@linux.vnet.ibm.com
Change the handler for SSCH to use the new logical memory
access functions.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
---
From: Thomas Huth th...@linux.vnet.ibm.com
According to the POP specification, the parameter blocks of various
functions like the IO instructions are accessed with logical addresses.
Thus we need a function that can read or write a buffer from/to the
guest's logical address space.
This patch now
From: Thomas Huth th...@linux.vnet.ibm.com
The real-space designation bits live in the ASCEs, not in the table entries,
so the check must be done before we start walking the MMU table.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
From: Thomas Huth th...@linux.vnet.ibm.com
Bit 52 in a page table entry has always to be zero, or a translation
specification exception is to be recognized.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: David Hildenbrand
From: Thomas Huth th...@linux.vnet.ibm.com
An Address Space Control Element (ASCE) is only the very first unit of
an s390 address translation (normally residing in one of the control
registers). The entries in the page tables are called differently.
So let's call the relevant variable pt_entry
From: Thomas Huth th...@linux.vnet.ibm.com
Program access exceptions are defined to deliver a translation exception
code in the low-core. Add a function trigger_access_exception() that
generates the proper program interrupt on both KVM and non-KVM systems
and switch the existing code to use it.
From: Thomas Huth th...@linux.vnet.ibm.com
Change the TSCH handler to use the new logical memory access functions.
Since the channel should not be updated in case of a protection or access
exception while writing to the guest memory, the css_do_tsch() has to be
split up into two parts, one for
From: Thomas Huth th...@linux.vnet.ibm.com
The address space bits in the translation exception code were wrong.
In fact, we can simply copy the bits from the PSW, so there's no need
for the trans_bits() function anymore.
Additionally, we now also set the fetch/store bits in the translation
From: Thomas Huth th...@linux.vnet.ibm.com
Change the handler for STCRW to use the new logical memory access
functions. Since STCRW is suppressed on protection/access exceptions,
we also have to make sure to re-queue the CRW in case it could not be
written to the memory.
Signed-off-by: Thomas
On 2/12/2015 at 03:23 AM, Kevin Wolf kw...@redhat.com wrote:
Am 12.02.2015 um 11:09 hat Peter Lieven geschrieben:
Am 12.02.2015 um 11:06 schrieb Kevin Wolf:
Am 12.02.2015 um 11:02 hat Peter Lieven geschrieben:
Am 12.02.2015 um 10:58 schrieb Kevin Wolf:
Am 12.02.2015 um 10:23 hat Peter
From: Thomas Huth th...@linux.vnet.ibm.com
Change the CHSC handler to correctly use logical addresses, too.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: David Hildenbrand d...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck
On Mon, Jan 19, 2015 at 03:34:56PM +0100, Ekaterina Tumanova wrote:
Updates v5 - v6:
Minor Updates according the last review from Stefan Hajnoczi:
1. Do not change the flow of code, factored out of raw_probe_alignment.
2. added #ifdef __linux__ in 2 places of raw-posix.c, mentioned by
On Mon, Jan 19, 2015 at 03:15:48PM -0500, John Snow wrote:
This series aims to do two main things:
(1) Eliminate global state out of the ahci-test file so that
the tests are more functional. This will allow me to write
migration tests more easily. These tests are already written
On Mon, Jan 26, 2015 at 05:26:41PM +0100, Cornelia Huck wrote:
Stefan:
Here's v2 of my endianness patch for dataplane, with the extraneous
vdev argument dropped from get_desc().
I orginally planned to send my virtio-1 patchset as well, but I haven't
found the time for it; therefore, I
On 12 Feb 2015, at 16:38, Alexander Graf ag...@suse.de wrote:
On 12.02.15 15:58, Peter Maydell wrote:
On 12 February 2015 at 14:45, Alexander Graf ag...@suse.de wrote:
almost nobody except x86 does global flushes
All ARM TLB maintenance operations have both this CPU only
and all
On Thu, 12 Feb 2015 13:24:26 -0200
Eduardo Habkost ehabk...@redhat.com wrote:
On Thu, Feb 12, 2015 at 04:01:49PM +0100, Igor Mammedov wrote:
On Mon, 9 Feb 2015 17:53:15 -0200
Eduardo Habkost ehabk...@redhat.com wrote:
Each CPU can appear in only one NUMA node on the NUMA config.
On Thu, 12 Feb 2015 16:18:31 +0100
Paolo Bonzini pbonz...@redhat.com wrote:
On 12/02/2015 15:22, Igor Mammedov wrote:
how about replacing a bunch if fprintf's with something like this:
cpu = 0;
while((cpu = find_next_bit(present_cpus, MAX_CPUMASK_BITS, cpu + 1))
Am 12.02.2015 um 16:38 hat Stefan Hajnoczi geschrieben:
On Wed, Jan 14, 2015 at 01:56:56AM +0100, Alexander Graf wrote:
On hosts with limited virtual address space (32bit pointers), we can very
easily run out of virtual memory with big thread pools.
Instead, we should limit ourselves to
On Feb 11, 2015, at 10:39 PM, Peter Maydell wrote:
On 24 January 2015 at 01:56, Programmingkid programmingk...@gmail.com wrote:
This patch adds these consoles to the View menu:
VGA
QEMU Monitor
Parallel
Serial
Signed-off-by: John Arbuckle programmingk...@gmail.com
+/* Displays the
On Wed, Feb 11, 2015 at 09:38:34AM +0800, Linhaifeng wrote:
On 2015/2/10 20:04, Michael S. Tsirkin wrote:
So that's not good. We need a way to negotiate the capability,
we can't just deadlock with legacy slaves.
Should we wait many seconds if slave not reply we just return error?
I
Am 12.02.2015 um 16:46 schrieb Stefan Hajnoczi:
On Mon, Jan 19, 2015 at 03:34:56PM +0100, Ekaterina Tumanova wrote:
Updates v5 - v6:
Minor Updates according the last review from Stefan Hajnoczi:
1. Do not change the flow of code, factored out of raw_probe_alignment.
2. added #ifdef __linux__
On Fri, Jan 30, 2015 at 10:49:41AM +0800, Fam Zheng wrote:
v7: Remove any {iops,bps}_max in 093 completely. (Max)
v6: Less resource demanding patch 5. (Max)
Add rev-by of Max to other patches.
v5: Rebase and improve the test. Please review again.
Patch dependencies:
This
On Mon, Feb 09, 2015 at 05:20:08PM +0100, Michael S. Tsirkin wrote:
On Mon, Feb 09, 2015 at 12:53:37PM -0200, Eduardo Habkost wrote:
On Mon, Feb 09, 2015 at 10:16:08AM +0100, Paolo Bonzini wrote:
On 08/02/2015 19:51, Eduardo Habkost wrote:
This cleans up some of the NUMA code:
On Thu, Feb 05, 2015 at 12:41:11PM -0500, John Snow wrote:
Add a simple DMA r/w test to ahci-test.
Oh, and for the first 18 patches, refactor everything into helpers so
that each ahci_test isn't a thousand lines long.
This patch depends upon the ahci test preliminary refactoring series
From: Fan Zhang zhang...@linux.vnet.ibm.com
We will need bios support in order to be able to support selecting a
different boot device via diagnose 308 in the ccw machine, so let's
make the bios mandatory for the ccw machine.
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
Reviewed-by: David
From: Fan Zhang zhang...@linux.vnet.ibm.com
To support dynamically updating the IPL device from inside the KVM
guest on the s390 platform, DIAG 308 instruction is intercepted
in QEMU to handle the request.
Subcode 5 allows to specify a new boot device, which is saved for
later in the s390_ipl
On Tue, Feb 10, 2015 at 03:20:46PM +0800, Bin Wu wrote:
From: Bin Wu wu.wu...@huawei.com
When we tested the VM migartion between different hosts with NBD
devices, we found if we sent a cancel command after the drive_mirror
was just started, a coroutine re-enter error would occur. The stack
On Thu, Feb 12, 2015 at 05:01:05PM +0900, Teruaki Ishizaki wrote:
(2015/02/12 16:42), Liu Yuan wrote:
On Thu, Feb 12, 2015 at 04:28:01PM +0900, Hitoshi Mitake wrote:
At Thu, 12 Feb 2015 15:00:49 +0800,
Liu Yuan wrote:
On Thu, Feb 12, 2015 at 03:19:21PM +0900, Hitoshi Mitake wrote:
At Tue,
On Thu, 02/12 15:40, Wen Congyang wrote:
On 02/12/2015 03:21 PM, Fam Zheng wrote:
Hi Congyang,
On Thu, 02/12 11:07, Wen Congyang wrote:
+== Workflow ==
+The following is the image of block replication workflow:
+
++--+
From: Thomas Huth th...@linux.vnet.ibm.com
helper.c is quite overcrowded already, so let's move the MMU
translation to a separate file instead (like it has been done
with the other targets already).
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann
From: Thomas Huth th...@linux.vnet.ibm.com
Move the setting of the condition code from kvm.c into the handler
function in ioinst.c itself, just like it has been done with the other
handlers already (TSCH has just not been changed yet since it is called
from a different dispatcher in kvm.c).
From: Thomas Huth th...@linux.vnet.ibm.com
Change the handler for TPI to use the new logical memory
access functions.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Acked-by: Cornelia Huck cornelia.h...@de.ibm.com
---
On Tue, Feb 10, 2015 at 01:22:56PM -0500, Jeff Cody wrote:
The size compared should be PATH_MAX, rather than sizeof(char *).
Reported-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Jeff Cody jc...@redhat.com
---
block/vmdk.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
Am 12.02.2015 um 17:42 schrieb Christian Borntraeger:
Am 12.02.2015 um 16:46 schrieb Stefan Hajnoczi:
On Mon, Jan 19, 2015 at 03:34:56PM +0100, Ekaterina Tumanova wrote:
Updates v5 - v6:
Minor Updates according the last review from Stefan Hajnoczi:
1. Do not change the flow of code, factored
On 12/02/2015 17:21, Matthew Rosato wrote:
Since 374f2981d1 memory: protect current_map by RCU,
address_space_update_topology unrefs the old_flatview twice,
once by call_rcu and once by direct call. This patch removes
the direct call in favor of the call_rcu. Fixes at least one
assertion
On Thu, Feb 12, 2015 at 04:05:06PM +0100, Andrew Jones wrote:
This patch makes the following changes to the determination of
whether an address is executable, when translating addresses
using LPAE.
1. No longer assumes that PL0 can't execute when it can't read.
It can in AArch64, a
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