Re: [Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

> On 08 Apr 2015, at 09:20, Stefan Weil wrote: > > ../../../configure --cross-prefix=x86_64-w64-mingw32- > --enable-trace-backend=stderr --extra-cflags=-Wno-missing-format-attribute && > make > > ... mingw-w64.Here is my package list (from Debian Jessie): ok I'm just installing a new Win 8

[Qemu-devel] [v7 11/14] migration: Add interface to control compression

The multiple compression threads can be turned on/off through qmp and hmp interface before doing live migration. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Dr.David Alan Gilbert Reviewed-by: Eric Blake --- migration/migration.c | 7 +-- qapi-schema.json | 11

[Qemu-devel] [v7 14/14] migration: Add hmp interface to set and query parameters

Add the hmp interface to tune and query the parameters used in live migration. Signed-off-by: Liang Li Signed-off-by: Yang Zhang --- hmp-commands.hx | 17 +++ hmp.c | 65 + hmp.h | 4 monitor.c |

[Qemu-devel] [v7 09/14] migration: Make compression co-work with xbzrle

Now, multiple thread compression can co-work with xbzrle. when xbzrle is on, multiple thread compression will only work at the first round of RAM data sync. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Dr.David Alan Gilbert --- arch_init.c | 12 +++- 1 file changed, 1

[Qemu-devel] [v7 08/14] migration: Add the core code of multi-thread compression

Implement the core logic of the multiple thread compression. At this point, multiple thread compression can't co-work with xbzrle yet. Signed-off-by: Liang Li Signed-off-by: Yang Zhang --- arch_init.c | 183 ++-- 1 file changed, 177 insert

[Qemu-devel] [v7 10/14] migration: Add the core code for decompression

Implement the core logic of multiple thread decompression, the decompression can work now. Signed-off-by: Liang Li Signed-off-by: Yang Zhang --- arch_init.c | 51 --- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/arch_init.c b/arc

[Qemu-devel] [v7 13/14] migration: Add qmp commands to set and query parameters

Add the qmp commands to tune and query the parameters used in live migration. Signed-off-by: Liang Li Signed-off-by: Yang Zhang --- migration/migration.c | 56 ++ qapi-schema.json | 45 qmp-commands.hx

[Qemu-devel] [v7 05/14] arch_init: Alloc and free data struct for compression

Define the data structure and variables used to do multiple thread compression, and add the code to initialize and free them. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Dr.David Alan Gilbert Reviewed-by: Juan Quintela --- arch_init.c | 37 ++

[Qemu-devel] [v7 06/14] arch_init: Add and free data struct for decompression

Define the data structure and variables used to do multiple thread decompression, and add the code to initialize and free them. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Dr.David Alan Gilbert Reviewed-by: Juan Quintela --- arch_init.c | 14 +- 1 file changed,

[Qemu-devel] [v7 07/14] migration: Split save_zero_page from ram_save_page

Split the function save_zero_page from ram_save_page so that we can reuse it later. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Juan Quintela --- arch_init.c | 61 +++-- 1 file changed, 43 insertions(+), 18 deletions(-)

[Qemu-devel] [v7 03/14] migration: Add the framework of multi-thread decompression

Add the code to create and destroy the multiple threads those will be used to do data decompression. Left some functions empty just to keep clearness, and the code will be added later. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Dr.David Alan Gilbert Reviewed-by: Juan Quintel

[Qemu-devel] [v7 02/14] migration: Add the framework of multi-thread compression

Add the code to create and destroy the multiple threads those will be used to do data compression. Left some functions empty to keep clearness, and the code will be added later. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Dr.David Alan Gilbert Reviewed-by: Juan Quintela ---

[Qemu-devel] [v7 12/14] migration: Use an array instead of 3 parameters

Put the three parameters related to multiple thread (de)compression into an int array, and use an enum type to index the parameter. Signed-off-by: Liang Li Signed-off-by: Yang Zhang --- include/migration/migration.h | 4 +--- migration/migration.c | 31 +++

[Qemu-devel] [v7 01/14] docs: Add a doc about multiple thread compression

Give some details about the multiple thread (de)compression and how to use it in live migration. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Dr.David Alan Gilbert Reviewed-by: Juan Quintela --- docs/multi-thread-compression.txt | 149 ++

[Qemu-devel] [PATCH v7 0/14] migration: Add a new feature to do live migration

This feature can help to reduce the data transferred about 60%, and the migration time can also be reduced about 70%. Summary of changed from v6->v7 -Change the core code of compression and decompression --- arch_init.c | 502 +++

[Qemu-devel] [v7 04/14] qemu-file: Add compression functions to QEMUFile

qemu_put_compression_data() compress the data and put it to QEMUFile. qemu_put_qemu_file() put the data in the buffer of source QEMUFile to destination QEMUFile. Signed-off-by: Liang Li Signed-off-by: Yang Zhang Reviewed-by: Juan Quintela --- include/migration/qemu-file.h | 3 +++ migration/q

Re: [Qemu-devel] [PATCH qemu] qemu-options: Add documentation about PPC64's "-cpu compat" option

> Am 08.04.2015 um 03:45 schrieb Alexey Kardashevskiy : > >> On 04/08/2015 06:43 AM, Alexander Graf wrote: >>> On 04/02/2015 08:26 AM, Alexey Kardashevskiy wrote: >>> Since 8dfa3a5e "target-ppc: Add "compat" CPU option" (which was a part of >>> client-architecture-support patchset) there is a "

Re: [Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

Am 08.04.2015 um 00:45 schrieb Liviu Ionescu: On 08 Apr 2015, at 01:36, Peter Maydell wrote: No, I built an actual 64 bit Windows binary and it worked. ok, then it must be only a matter of configure, which does not detect running on mingw-w64 to set the required options (perhaps like -mthrea

[Qemu-devel] How to catch and check all address access requests in qemu?

Using Qemu to run a guest system, the guest virtual address will be translated to guest physical address by MMU, then be translated to host virtual address by Qemu. In my case, I need to add a checker between virtual PowerPC CPU and memory/MMIO. This checker will catch all address access reque

Re: [Qemu-devel] [PATCH v2 1/2] cpu/apic: drop icc bus/bridge/

On 03/23/2015 04:23 PM, Igor Mammedov wrote: On Mon, 23 Mar 2015 13:54:23 +0800 Chen Fan wrote: ICC bus was invented only to provide hotplug capability to CPU and APIC because at the time being hotplug was available only for BUS attached devices. Now this patch is to drop ICC bus impl, and s

Re: [Qemu-devel] [PATCH qemu v5 06/12] vfio: spapr: Add SPAPR IOMMU v2 support (DMA memory preregistering)

On Wed, Apr 08, 2015 at 02:05:28PM +1000, Alexey Kardashevskiy wrote: > On 04/08/2015 12:15 PM, David Gibson wrote: > >On Tue, Mar 31, 2015 at 04:28:41PM +1100, Alexey Kardashevskiy wrote: > >>This makes use of the new "memory registering" feature. The idea is > >>to provide the guest ability to no

Re: [Qemu-devel] [PATCH qemu v5 10/12] spapr_pci: Rework finish_realize()

On Tue, Mar 31, 2015 at 04:28:45PM +1100, Alexey Kardashevskiy wrote: > This renames and reworks finish_realize() which used to finalize DMA > setup with an assumption that it will not change later. > > The new callback supports multiple windows and supports various > parameters such as page and w

Re: [Qemu-devel] [PATCH qemu v5 11/12] spapr_pci: Disable all DMA windows on reset

On Tue, Mar 31, 2015 at 04:28:46PM +1100, Alexey Kardashevskiy wrote: > This disables all DMA windows on a PHB reset. It does not make any > difference now as there is just one DMA window but it will later with DDW > patches. > > Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson Al

Re: [Qemu-devel] [PATCH qemu v5 06/12] vfio: spapr: Add SPAPR IOMMU v2 support (DMA memory preregistering)

On 04/08/2015 12:15 PM, David Gibson wrote: On Tue, Mar 31, 2015 at 04:28:41PM +1100, Alexey Kardashevskiy wrote: This makes use of the new "memory registering" feature. The idea is to provide the guest ability to notify the host kernel about pages which AFAICT it's not really the guest inform

Re: [Qemu-devel] [PATCH qemu v5 04/12] spapr_pci_vfio: Enable multiple groups per container

On 04/08/2015 12:01 PM, David Gibson wrote: On Tue, Mar 31, 2015 at 04:28:39PM +1100, Alexey Kardashevskiy wrote: This enables multiple IOMMU groups in one VFIO container which means that multiple devices from different groups can share the same IOMMU table (or tables if DDW). This removes a gr

Re: [Qemu-devel] [PATCH qemu] qemu-options: Add documentation about PPC64's "-cpu compat" option

On Thu, Apr 02, 2015 at 05:26:11PM +1100, Alexey Kardashevskiy wrote: > Since 8dfa3a5e "target-ppc: Add "compat" CPU option" (which was a part of > client-architecture-support patchset) there is a "compat" option > of "-cpu". However it was not documented at all and this is what this > patch is try

Re: [Qemu-devel] [PATCH qemu v5 08/12] spapr_pci: Rework reset to reset DMA configuration

On Tue, Mar 31, 2015 at 04:28:43PM +1100, Alexey Kardashevskiy wrote: > On a system reset, DMA configuration has to reset too. At the moment > it clears the table content. This is enough for the single table case > but with DDW, we will also have to disable all DMA windows except > the default one.

Re: [Qemu-devel] [PATCH qemu v5 07/12] spapr_iommu: Rework TCE table initialization

On Tue, Mar 31, 2015 at 04:28:42PM +1100, Alexey Kardashevskiy wrote: > Currently TCE tables are created once at start and their size never > changes. We are going to change that by introducing a Dynamic DMA windows > support where DMA configuration may change during the guest execution. > > This

Re: [Qemu-devel] [PATCH qemu v5 02/12] vmstate: Define VARRAY with VMS_ALLOC

On Tue, Mar 31, 2015 at 04:28:37PM +1100, Alexey Kardashevskiy wrote: > This allows dynamic allocation for migrating arrays. This commit message really needs more information for the benefit of people who haven't been buried in the savevm code recently. What existing VMSTATE macros does it extend

Re: [Qemu-devel] [PATCH qemu v5 04/12] spapr_pci_vfio: Enable multiple groups per container

On Tue, Mar 31, 2015 at 04:28:39PM +1100, Alexey Kardashevskiy wrote: > This enables multiple IOMMU groups in one VFIO container which means > that multiple devices from different groups can share the same IOMMU > table (or tables if DDW). > > This removes a group id from vfio_container_ioctl(). T

Re: [Qemu-devel] [PATCH qemu v5 06/12] vfio: spapr: Add SPAPR IOMMU v2 support (DMA memory preregistering)

On Tue, Mar 31, 2015 at 04:28:41PM +1100, Alexey Kardashevskiy wrote: > This makes use of the new "memory registering" feature. The idea is > to provide the guest ability to notify the host kernel about pages which AFAICT it's not really the guest informing the host, just qemu informing the host.

Re: [Qemu-devel] [PATCH qemu v5 05/12] vfio: spapr: Move SPAPR-related code to a separate file

On Tue, Mar 31, 2015 at 04:28:40PM +1100, Alexey Kardashevskiy wrote: > This moves SPAPR bits to a separate file to avoid pollution of x86 code. > > This is a mechanical patch. > > Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson Splitting out the iommu mode specific code seems s

Re: [Qemu-devel] [Qemu-block] [PATCH v4 10/20] qmp: Add support of "dirty-bitmap" sync mode for drive-backup

On 04/02/2015 08:44 AM, Stefan Hajnoczi wrote: On Fri, Mar 20, 2015 at 03:16:53PM -0400, John Snow wrote: +} else if (job->sync_mode == MIRROR_SYNC_MODE_DIRTY_BITMAP) { +/* Dirty Bitmap sync has a slightly different iteration method */ +HBitmapIter hbi; +int64_t sec

Re: [Qemu-devel] [PATCH qemu] qemu-options: Add documentation about PPC64's "-cpu compat" option

On 04/08/2015 06:43 AM, Alexander Graf wrote: On 04/02/2015 08:26 AM, Alexey Kardashevskiy wrote: Since 8dfa3a5e "target-ppc: Add "compat" CPU option" (which was a part of client-architecture-support patchset) there is a "compat" option of "-cpu". However it was not documented at all and this is

Re: [Qemu-devel] [Snapshot Bug?]Qcow2 meta data corruption

I created/deleted the snapshot by using qmp command "snapshot_blkdev_internal"/"snapshot_delete_blkdev_internal", and for avoiding the case you mentioned above, I have added the flock() permission in the qemu_open(). Here is the test of doing qemu-img snapshot to a running vm: Diskfile:/sf/data

Re: [Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

On 7 April 2015 at 23:45, Liviu Ionescu wrote: >> On 08 Apr 2015, at 01:36, Peter Maydell wrote: >> >> No, I built an actual 64 bit Windows binary and it worked. > > ok, then it must be only a matter of configure, which does not > detect running on mingw-w64 to set the required options > (perhap

Re: [Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

> On 08 Apr 2015, at 01:36, Peter Maydell wrote: > > No, I built an actual 64 bit Windows binary and it worked. ok, then it must be only a matter of configure, which does not detect running on mingw-w64 to set the required options (perhaps like -mthreads -D_POSIX=1), and I need to set them

Re: [Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

On 7 April 2015 at 22:46, Liviu Ionescu wrote: > >> On 08 Apr 2015, at 00:30, Peter Maydell wrote: >> >> On 7 April 2015 at 22:21, Liviu Ionescu wrote: >>> I could not identify if the problem is within qemu or mingw-w64, >>> but I would not rule out a problem in qemu. I would first suspect >>> a

Re: [Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

> On 08 Apr 2015, at 00:46, Liviu Ionescu wrote: > > ... the 64-bit Windows build prepared by Stefan Weil seems to be done with > the old mingw-w32 on Windows, not mingw-w64. correction, I'm no longer convinced this is true, the build might be done with mingw-w64, but with a lot of extra opti

Re: [Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

> On 08 Apr 2015, at 00:30, Peter Maydell wrote: > > On 7 April 2015 at 22:21, Liviu Ionescu wrote: >> I could not identify if the problem is within qemu or mingw-w64, >> but I would not rule out a problem in qemu. I would first suspect >> a customisation made especially for mingw-w32, which is

Re: [Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

On 7 April 2015 at 22:21, Liviu Ionescu wrote: > I could not identify if the problem is within qemu or mingw-w64, > but I would not rule out a problem in qemu. I would first suspect > a customisation made especially for mingw-w32, which is not > appropriate for the 64-bit version of mingw-w64. I

[Qemu-devel] 64-bit build of qemu-system-arm with mingw-w64 not functional

I was too optimistic, my 64-bit Windows build of the ARM emulator is not functional. :-( I also tested other 64-bit builds of qemu-system-arm made with mingw-w64 and they are also not functional, they generally crash with some nasty DLL errors when emulation is about to start (for example 0xc00

[Qemu-devel] [PATCH 6/6] scripts: x86-cpu-model-dump script

This is an example script that can be used to help generate a config file that will reproduce a given CPU model from QEMU. The generated config file can be loaded using "-readconfig" to make QEMU create CPUs that will look exactly like the one used when cpu-model-dump was run. A cpu-model-dump-sel

[Qemu-devel] [PATCH 5/6] target-i386: X86CPU::xlevel2 QOM property

We already have "level" and "xlevel", only "xlevel2" is missing. Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 6ccea14..ae07af4 100644 --- a/target-i386/cpu.c +++ b/target-i38

[Qemu-devel] [PATCH 3/6] target-i386: Register QOM properties for feature flags

This uses the feature name arrays to register "feat-*" QOM properties for feature flags. This simply adds the properties so they can be configured using -global, but doesn't change x86_cpu_parse_featurestr() to use them yet. Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 98 +

[Qemu-devel] [PATCH 2/6] target-i386: Remove underscores from feature names

The underscores will be translated by x86_cpu_parse_featurestr(). Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 31 +++ 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index f83d586..099ed03 100644 --- a/t

[Qemu-devel] [PATCH 0/6] target-i386: Feature properties, sample script for -global/-readconfig

This series adds feature flag properties to X86CPU, and adds a sample script to demonstrate how the new properties can be used to give management software more flexibility to control CPU features using -global and -readconfig. While at it, simplify the code for "level" and "xlevel" properties, and

[Qemu-devel] [PATCH 4/6] target-i386: Make "level" and "xlevel" properties static

Static properties require only 1 line of code, much simpler than the existing code that requires writing new getters/setters. Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 40 ++-- 1 file changed, 2 insertions(+), 38 deletions(-) diff --git a/target-

[Qemu-devel] [PATCH 1/6] target-i386: Move error handling to end of x86_cpu_parse_featurestr()

Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 03b33cf..f83d586 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1961,8 +1961,7 @@ static void x86_cpu_parse_feat

Re: [Qemu-devel] [PATCH qemu] qemu-options: Add documentation about PPC64's "-cpu compat" option

On 04/02/2015 08:26 AM, Alexey Kardashevskiy wrote: Since 8dfa3a5e "target-ppc: Add "compat" CPU option" (which was a part of client-architecture-support patchset) there is a "compat" option of "-cpu". However it was not documented at all and this is what this patch is trying to do. Signed-off-b

[Qemu-devel] [PATCH 05/14] exec.c: Convert subpage memory ops to _with_attrs

Convert the subpage memory ops to _with_attrs; this will allow us to pass the attributes through to the underlying access functions. Signed-off-by: Peter Maydell --- exec.c | 33 + 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/exec.c b/exec.c ind

[Qemu-devel] [PATCH 03/14] Make CPU iotlb a structure rather than a plain hwaddr

Make the CPU iotlb a structure rather than a plain hwaddr; this will allow us to add transaction attributes to it. Signed-off-by: Peter Maydell --- cputlb.c| 4 ++-- include/exec/cpu-defs.h | 13 +++-- softmmu_template.h | 32 +--- 3 file

[Qemu-devel] [PATCH 12/14] target-arm: Add user-mode transaction attribute

Add a transaction attribute indicating that a memory access is being done from user-mode (unprivileged). This corresponds to an equivalent signal in ARM AMBA buses. Signed-off-by: Peter Maydell --- include/exec/memattrs.h | 3 +++ target-arm/helper.c | 4 2 files changed, 7 insertions(+

[Qemu-devel] [PATCH 08/14] Switch non-CPU callers from ld/st*_phys to address_space_ld/st*

Switch all the uses of ld/st*_phys to address_space_ld/st*, except for those cases where the address space is the CPU's (ie cs->as). This was done with the following script which generates a Coccinelle patch. A few over-80-columns lines in the result were rewrapped by hand where Coccinelle failed

[Qemu-devel] [PATCH 01/14] memory: Define API for MemoryRegionOps to take attrs and return status

Define an API so that devices can register MemoryRegionOps whose read and write callback functions are passed an arbitrary pointer to some transaction attributes and can return a success-or-failure status code. This will allow us to model devices which: * behave differently for ARM Secure/NonSecur

[Qemu-devel] [PATCH 07/14] exec.c: Add new address_space_ld*/st* functions

Add new address_space_ld*/st* functions which allow transaction attributes and error reporting for basic load and stores. These are named to be in line with the address_space_read/write/rw buffer operations. The existing ld/st*_phys functions are now wrappers around the new functions. Signed-off-

[Qemu-devel] [PATCH 04/14] Add MemTxAttrs to the IOTLB

Add a MemTxAttrs field to the IOTLB, and allow target-specific code to set it via a new tlb_set_page_with_attrs() function; pass the attributes through to the device when making IO accesses. Signed-off-by: Peter Maydell --- cputlb.c| 18 +++--- include/exec/cpu-defs.h

[Qemu-devel] [PATCH 09/14] exec.c: Capture the memory attributes for a watchpoint hit

Capture the memory attributes for the transaction which triggered a watchpoint; this allows CPU specific code to implement features like ARM's "user-mode only WPs also hit for LDRT/STRT accesses made from privileged code". Signed-off-by: Peter Maydell --- exec.c| 52 +

[Qemu-devel] [PATCH 14/14] target-arm: Check watchpoints against CPU security state

Fix a TODO in bp_wp_matches() now that we have a function for testing whether the CPU is currently in Secure mode or not. Signed-off-by: Peter Maydell --- target-arm/op_helper.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target-arm/op_helper.c b/target-arm/op_helpe

[Qemu-devel] [PATCH 13/14] target-arm: Use attribute info to handle user-only watchpoints

Now that we have memory access attribute information in the watchpoint checking code, we can correctly implement handling of watchpoints which should match only on userspace accesses, where LDRT/STRT/LDT/STT from EL1 are treated as userspace accesses. Signed-off-by: Peter Maydell --- target-arm/

[Qemu-devel] [PATCH 00/14] Add memory attributes and use them in ARM

Following from my previous RFC about transaction memory attributes, here's some code I think is good enough to drop the 'RFC' tag :-) (read: I would like to land this when master reopens for 2.4.) I've included both the changes to the core memory system code and the target-arm changes as a usage e

[Qemu-devel] [PATCH 11/14] target-arm: Use correct memory attributes for page table walks

Factor out the page table walk memory accesses into their own function, so that we can specify the correct S/NS memory attributes for them. This will also provide a place to use the correct endianness and handle the need for a stage-2 translation when virtualization is supported. Signed-off-by: Pe

[Qemu-devel] [PATCH 02/14] memory: Add MemTxAttrs, MemTxResult to io_mem_read and io_mem_write

Add a MemTxAttrs argument to the io_mem_read() and io_mem_write() functions, and make them return MemTxResult rather than bool, thus pushing these new arguments out one level of the callstack (all the callers callers currently pass MEMTXATTRS_UNSPECIFIED and convert the return value back to bool or

[Qemu-devel] [PATCH 10/14] target-arm: Honour NS bits in page tables

Honour the NS bit in ARM page tables: * when adding entries to the TLB, include the Secure/NonSecure transaction attribute * set the NS bit in the PAR when doing ATS operations Note that we don't yet correctly use the NSTable bit to cause the page table walk itself to use the right attributes

[Qemu-devel] [PATCH 06/14] exec.c: Make address_space_rw take transaction attributes

Make address_space_rw take transaction attributes, rather than always using the 'unspecified' attributes. Signed-off-by: Peter Maydell --- dma-helpers.c| 3 ++- exec.c | 51 ++-- hw/mips/mips_jazz.c | 6 -- hw/p

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

On 07/04/2015 20:44, Peter Lieven wrote: > Has the cdrom the power of taking down the bus? IDE can only issue one command per bus, so hda/hdb can take down each other, and hdc/hdd can take down each other. However, hda cannot take down hdc and vice versa---so likely the CDROM cannot take down t

[Qemu-devel] [PATCH 05/15] ipmi: Add a local BMC simulation

From: Corey Minyard This provides a minimal local BMC, basically enough to comply with the spec and provide a complete watchdog timer (including a sensor, SDR, and event). Signed-off-by: Corey Minyard --- default-configs/i386-softmmu.mak |1 + default-configs/x86_64-softmmu.mak |1 +

[Qemu-devel] [Bug 1438144] Re: Page sizes are not interpreted correctly for E500/E500MC

This is not a bug. MMU v2 (implemented in e6500) extended the TSIZE field so that 1K << TSIZE is correct. The extension was on the LSB side so that it works fine as long as the low bit of the new TSIZE (which is reserved on e500v2/mc) is zero. ** Changed in: qemu Status: New => Invalid

[Qemu-devel] [PATCH 06/15] ipmi: Add an external connection simulation interface

From: Corey Minyard This adds an interface for IPMI that connects to a remote BMC over a chardev (generally a TCP socket). The OpenIPMI lanserv simulator describes this interface, see that for interface details. Signed-off-by: Corey Minyard --- default-configs/i386-softmmu.mak | 1 + defa

[Qemu-devel] [PATCH 10/15] smbios: Add a function to directly add an entry

From: Corey Minyard There was no way to directly add a table entry to the SMBIOS table, even though the BIOS supports this. So add a function to do this. This is in preparation for the IPMI handler adding it's SMBIOS table entry. Signed-off-by: Corey Minyard --- hw/i386/smbios.c | 149

Re: [Qemu-devel] [Bug 1438144] [NEW] Page sizes are not interpreted correctly for E500/E500MC

On Mon, 2015-03-30 at 11:21 +, WGH wrote: > Public bug reported: > > http://cache.freescale.com/files/32bit/doc/ref_manual/E500CORERM.pdf - see > 2.12.5.2 MAS Register 1 (MAS1), p. 2-41 > http://cache.freescale.com/files/32bit/doc/ref_manual/E500MCRM.pdf - see > 2.16.6.2 MAS Register 1 (MAS1

[Qemu-devel] [PATCH 09/15] ipmi: Add migration capability to the IPMI device.

From: Corey Minyard Signed-off-by: Corey Minyard io_length = 3; memory_region_init_io(&s->io, NULL, &ipmi_bt_io_ops, bt, "ipmi-bt", 3); +vmstate_register(NULL, 0, &vmstate_ipmi_bt, bt); } static void ipmi_bt_class_init(ObjectClass *klass, void *data) diff --git a/hw/ipmi/ipmi_exter

[Qemu-devel] [PATCH 14/15] acpi: Add hooks for adding things to the SSDT table

From: Corey Minyard This way devices can tie in when then SSDT is built and can add their own entries. This didn't seem to fit anyplace else, primarily because it required the Aml type, so I added a new file for it. Signed-off-by: Corey Minyard --- hw/acpi/Makefile.objs| 1 + hw/acpi

[Qemu-devel] [PATCH 12/15] ipmi: Add SMBIOS table entry

From: Corey Minyard Add an IPMI table entry to the SMBIOS. Signed-off-by: Corey Minyard --- hw/ipmi/isa_ipmi.c | 47 +++ 1 file changed, 47 insertions(+) diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c index e62f744..ff379ce 100644 --- a/hw/ipm

[Qemu-devel] [PATCH 04/15] ipmi: Add a BT low-level interface

From: Corey Minyard This provides the simulation of the BT hardware interface for IPMI. Signed-off-by: Corey Minyard --- default-configs/i386-softmmu.mak | 1 + default-configs/x86_64-softmmu.mak | 1 + hw/ipmi/Makefile.objs | 1 + hw/ipmi/ipmi_bt.c | 374

[Qemu-devel] [PATCH 03/15] ipmi: Add a KCS low-level interface

From: Corey Minyard This provides the simulation of the KCS hardware interface. Signed-off-by: Corey Minyard --- default-configs/i386-softmmu.mak | 1 + default-configs/x86_64-softmmu.mak | 1 + hw/ipmi/Makefile.objs | 2 + hw/ipmi/ipmi_kcs.c | 337

[Qemu-devel] [PATCH 07/15] ipmi: Add tests

From: Corey Minyard Test the KCS interface with a local BMC and a BT interface with an external BMC. Signed-off-by: Corey Minyard --- tests/Makefile| 4 + tests/ipmi-bt-test.c | 440 ++ tests/ipmi-kcs-test.c | 294 +

[Qemu-devel] [PATCH 08/15] ipmi: Add documentation

From: Corey Minyard Add some basic documentation for the IPMI device. Signed-off-by: Corey Minyard --- qemu-options.hx | 38 ++ 1 file changed, 38 insertions(+) diff --git a/qemu-options.hx b/qemu-options.hx index 319d971..598c631 100644 --- a/qemu-options.

[Qemu-devel] [PATCH 13/15] configure: Copy some items from default configs to target configs

From: Corey Minyard This is to get CONFIG_ACPI into the target config so devices that may use ACPI know to do this or not. Signed-off-by: Corey Minyard --- configure | 7 +++ 1 file changed, 7 insertions(+) diff --git a/configure b/configure index 09c9225..e301259 100755 --- a/configure +

[Qemu-devel] [PATCH 00/15] IPMI device for qemu

This set of patches adds an IPMI KCS or BT interface to qemu, along with a local simulated baseboard management controller (BMC) and a way to connect to an external BMC. It is mostly unchanged from previous release, except for bug fixes and the following changes: The ACPI generation code custom t

[Qemu-devel] [PATCH 02/15] ipmi: Add a PC ISA type structure

From: Corey Minyard This provides the base infrastructure to tie IPMI low-level interfaces into a PC ISA bus. Signed-off-by: Corey Minyard --- default-configs/i386-softmmu.mak | 1 + default-configs/x86_64-softmmu.mak | 1 + hw/ipmi/Makefile.objs | 1 + hw/ipmi/isa_ipmi.c

[Qemu-devel] [PATCH 01/15] Add a base IPMI interface

From: Corey Minyard Add the basic IPMI types and infrastructure to QEMU. Low-level interfaces and simulation interfaces will register with this; it's kind of the go-between to tie them together. Signed-off-by: Corey Minyard --- default-configs/i386-softmmu.mak | 1 + default-configs/x86_6

[Qemu-devel] [PATCH 11/15] pc: Postpone SMBIOS table installation to post machine init

From: Corey Minyard This is the same place that the ACPI SSDT table gets added, so that devices can add themselves to the SMBIOS table. Signed-off-by: Corey Minyard --- hw/i386/pc.c | 35 ++- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/hw/i38

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

On 04/07/2015 03:02 PM, Peter Lieven wrote: Am 07.04.2015 um 20:56 schrieb John Snow: On 04/07/2015 02:44 PM, Peter Lieven wrote: Am 07.04.2015 um 17:29 schrieb Dr. David Alan Gilbert: * Peter Lieven (p...@kamp.de) wrote: Hi David, Am 07.04.2015 um 10:43 schrieb Dr. David Alan Gilbert:

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

Am 07.04.2015 um 21:01 schrieb Dr. David Alan Gilbert: > * Peter Lieven (p...@kamp.de) wrote: >> Am 07.04.2015 um 17:29 schrieb Dr. David Alan Gilbert: >>> * Peter Lieven (p...@kamp.de) wrote: Hi David, Am 07.04.2015 um 10:43 schrieb Dr. David Alan Gilbert: Any particular wo

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

Am 07.04.2015 um 20:56 schrieb John Snow: > > > On 04/07/2015 02:44 PM, Peter Lieven wrote: >> Am 07.04.2015 um 17:29 schrieb Dr. David Alan Gilbert: >>> * Peter Lieven (p...@kamp.de) wrote: Hi David, Am 07.04.2015 um 10:43 schrieb Dr. David Alan Gilbert: Any particular work

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

* Peter Lieven (p...@kamp.de) wrote: > Am 07.04.2015 um 17:29 schrieb Dr. David Alan Gilbert: > > * Peter Lieven (p...@kamp.de) wrote: > >> Hi David, > >> > >> Am 07.04.2015 um 10:43 schrieb Dr. David Alan Gilbert: > >> Any particular workload or reproducer? > > Workload is almost zero. I t

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

On 04/07/2015 02:44 PM, Peter Lieven wrote: Am 07.04.2015 um 17:29 schrieb Dr. David Alan Gilbert: * Peter Lieven (p...@kamp.de) wrote: Hi David, Am 07.04.2015 um 10:43 schrieb Dr. David Alan Gilbert: Any particular workload or reproducer? Workload is almost zero. I try to figure out if th

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

Am 07.04.2015 um 17:14 schrieb Paolo Bonzini: > > On 07/04/2015 17:11, Peter Lieven wrote: >>> I'm not sure at what kernel version the switch is, but newer kernels use >>> some >>> code shared with the newer SATA world (libata?) where as older kernels had >>> separate IDE code, so the behaviour o

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

Am 07.04.2015 um 17:29 schrieb Dr. David Alan Gilbert: > * Peter Lieven (p...@kamp.de) wrote: >> Hi David, >> >> Am 07.04.2015 um 10:43 schrieb Dr. David Alan Gilbert: >> Any particular workload or reproducer? > Workload is almost zero. I try to figure out if there is a way to trigger

Re: [Qemu-devel] [PATCH V5 16/18] virtio-pci: increase the maximum number of virtqueues to 513

On 04/07/2015 08:06 PM, Luigi Rizzo wrote: On Tue, Apr 7, 2015 at 6:54 PM, Alexander Graf > wrote: On 04/01/2015 10:15 AM, Jason Wang wrote: This patch increases the maximum number of virtqueues for pci from 64 to 513. This will allow booting

Re: [Qemu-devel] Getting VM state from outside QEMU?

On 04/07/2015 09:31 AM, Erik Rull wrote: Hi all, I need a pretty simple way to get the current state of the VM running in QEMU - I only need the VM state (e.g. running, paused,...). Since my environment does not have any perl, python or other high level scripting capabilities, a simple way e.g

Re: [Qemu-devel] [PATCH V5 16/18] virtio-pci: increase the maximum number of virtqueues to 513

On Tue, Apr 7, 2015 at 6:54 PM, Alexander Graf wrote: > On 04/01/2015 10:15 AM, Jason Wang wrote: > >> This patch increases the maximum number of virtqueues for pci from 64 >> to 513. This will allow booting a virtio-net-pci device with 256 queue >> pairs. >> ... >> >>* configuration space */

Re: [Qemu-devel] [PATCH V5 16/18] virtio-pci: increase the maximum number of virtqueues to 513

On 04/01/2015 10:15 AM, Jason Wang wrote: This patch increases the maximum number of virtqueues for pci from 64 to 513. This will allow booting a virtio-net-pci device with 256 queue pairs. To keep migration compatibility, 64 was kept for legacy machine types. This is because qemu in fact allows

Re: [Qemu-devel] [Qemu-block] [PATCH v4 15/20] block: Resize bitmaps on bdrv_truncate

On 04/07/2015 08:57 AM, Stefan Hajnoczi wrote: On Thu, Apr 02, 2015 at 11:57:59AM -0400, John Snow wrote: On 04/02/2015 09:37 AM, Stefan Hajnoczi wrote: On Fri, Mar 20, 2015 at 03:16:58PM -0400, John Snow wrote: +void hbitmap_truncate(HBitmap *hb, uint64_t size) +{ +bool shrink; +u

Re: [Qemu-devel] qemu-img behavior for locating backing files

On 04/07/2015 04:44 AM, Kevin Wolf wrote: Am 07.04.2015 um 02:31 hat John Snow geschrieben: On 04/02/2015 05:38 AM, Kevin Wolf wrote: Am 01.04.2015 um 18:16 hat John Snow geschrieben: Kevin, what's the correct behavior for qemu-img and relative paths when creating a new qcow2 file? Exampl

Re: [Qemu-devel] [Qemu-block] Migration sometimes fails with IDE and Qemu 2.2.1

* Peter Lieven (p...@kamp.de) wrote: > Hi David, > > Am 07.04.2015 um 10:43 schrieb Dr. David Alan Gilbert: > Any particular workload or reproducer? > >>> Workload is almost zero. I try to figure out if there is a way to trigger > >>> it. > >>> > >>> Maybe playing a role: Machine type is -M

Re: [Qemu-devel] [Snapshot Bug?]Qcow2 meta data corruption

On 04/07/2015 03:33 AM, Kevin Wolf wrote: > More specifically, did you take care to never access your image from > more than one process (except if both are read-only)? It happens > occasionally that people use 'qemu-img snapshot' while the VM is > running. This is wrong and can corrupt the image.

[Qemu-devel] [PATCH] aio: strengthen memory barriers for bottom half scheduling

There are two problems with memory barriers in async.c. The fix is to use atomic_xchg in order to achieve sequential consistency between the scheduling of a bottom half and the corresponding execution. First, if bh->scheduled is already 1 in qemu_bh_schedule, QEMU does not execute a memory barrie

Re: [Qemu-devel] [PATCH] qapi: Accept 'null' in QMP

On 04/07/2015 06:46 AM, Alberto Garcia wrote: > On Thu, Apr 02, 2015 at 01:31:46PM -0600, Eric Blake wrote: > >> So instead, this patch creates a new QObject subtype: QNull. > > The code looks good, but Markus's approach of using a single instance > seems probably a bit better for this case. It'

  1   2   >