Bug #1300209 is a regression in 2.5, introduced during the
change away from bdrv_swap().
When we change the parent backing link (change_parent_backing_link),
we must also accomodate non-NULL tqe_prev pointers that point to a
NULL entry. Please see patch #1 for more details.
Jeff Cody (2):
blo
In change_parent_backing_link(), we only inserted the new
BlockDriverState entry into the device_list if the tqe_prev pointer was
NULL. However, we must also allow insertion when the BDS pointed
to by the tqe_prev pointer is NULL as well.
This fixes a bug with external snapshots, and live active
Signed-off-by: Jeff Cody
---
tests/qemu-iotests/143 | 114 +
tests/qemu-iotests/143.out | 24 ++
tests/qemu-iotests/group | 1 +
3 files changed, 139 insertions(+)
create mode 100755 tests/qemu-iotests/143
create mode 100644 tests/qem
On 2016/1/29 22:24, Igor Mammedov wrote:
> in current impl. condition
>
> build_madt() {
> ...
> if (test_bit(i, cpuinfo->found_cpus))
>
> is always true since loop handles only present CPUs
> in range [0..smp_cpus).
> But to fill usless cpuinfo->found_cpus we do unnecessary
> scan over QOM
> -Original Message-
> From: iGVT-g [mailto:igvt-g-boun...@lists.01.org] On Behalf Of Alex
> Williamson
> Sent: Friday, January 29, 2016 10:00 AM
> To: Gerd Hoffmann
> Cc: igv...@ml01.01.org; xen-de...@lists.xensource.com; Eduardo Habkost;
> Stefano Stabellini; qemu-devel@nongnu.org; Cao
From: Peter Crosthwaite
Add GPIO functionality to the register API. This allows association
and automatic connection of GPIOs to bits in registers. GPIO inputs
will attach to handlers that automatically set read-only bits in
registers. GPIO outputs will be updated to reflect their field value
whe
hi，I have read 2015-qcow2-expanded.pdf and qcow2.txt，
so I understand how to convert the offset in the virtual disk to the
offset into the image file（qcow2).
but I wish to know how to convert the file block(347008) using
ext4 to the offset in the virtual disk. Please help me.
the file block in
From: Peter Crosthwaite
An API similar to the existing qdev_get_gpio_in() except gets outputs.
Useful for:
1: Implementing lightweight devices that don't want to keep pointers
to their own GPIOs. They can get their GPIO pointers at runtime from
QOM using this API.
2: testing or debugging code w
From: Peter Crosthwaite
Little macro that just gives you N ones (justified to LSB).
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
include/qemu/bitops.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index 8164225..27
From: Peter Crosthwaite
Add a routine to set or override the opaque data of an IRQ.
Qdev currently always initialises IRQ opaque as the device itself.
This allows you to override to a custom opaque in the case where
there is extra or different data needed.
Signed-off-by: Peter Crosthwaite
Sign
From: Peter Crosthwaite
Add a helper that will scan a static RegisterAccessInfo Array
and populate a container MemoryRegion with registers as defined.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
V3:
- Fix typo
V2:
- Use memory_region_add_subregion_no_print()
hw/cor
From: Peter Crosthwaite
For passing all GPIOs of all names from a contained device to a
container.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
hw/core/qdev.c | 9 +
include/hw/qdev-core.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/hw/core/
From: Peter Crosthwaite
Minimal device model for devcfg module of Zynq. DMA capabilities and
interrupt generation supported.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
default-configs/arm-softmmu.mak | 1 +
hw/dma/Makefile.objs | 1 +
hw/dma/xlnx-
From: Peter Crosthwaite
QOMify registers as a child of TYPE_DEVICE. This allows registers to
define GPIOs.
Define an init helper that will do QOM initialisation as well as setup
the r/w fast paths.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
Reviewed-by: KONRAD Frederic
From: Peter Crosthwaite
IOU = I/O Unit
SLCR = System Level Control Registers
This IP is a misc collections of control registers that switch various
properties of system IPs. Currently the only thing implemented is the
SD_SLOTTYPE control (implemented as a GPIO output).
Signed-off-by: Peter Cros
From: Peter Crosthwaite
Add memory io handlers that glue the register API to the memory API.
Just translation functions at this stage. Although it does allow for
devices to be created without all-in-one mmio r/w handlers.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
h
From: Peter Crosthwaite
Define some macros that can be used for defining registers and fields.
The REG32 macro will define A_FOO, for the byte address of a register
as well as R_FOO for the uint32_t[] register number (A_FOO / 4).
The FIELD macro will define FOO_BAR_MASK, FOO_BAR_SHIFT and
FOO_B
From: Peter Crosthwaite
Allow defining of optional address decoding information in register
definitions. This is useful for clients that want to associate
registers with specific addresses.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
V3:
- Remove unused flags option
This patch series is based on Peter C's original register API. His
original cover letter is below.
I have added a new function memory_region_add_subregion_no_print() which
stops memory regions from being printed by 'info mtree'. This is used to
avoid evey register being printed when running 'info
From: Peter Crosthwaite
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
hw/arm/xilinx_zynq.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 66e7f27..4ae0b13 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilin
This API provides some encapsulation of registers and factors our some
common functionality to common code. Bits of device state (usually MMIO
registers), often have all sorts of access restrictions and semantics
associated with them. This API allow you to define what those
restrictions are on a bi
Add a function called memory_region_add_subregion_no_print() that
creates memory subregions that won't be printed when running
the 'info mtree' command.
Signed-off-by: Alistair Francis
Reviewed-by: KONRAD Frederic
---
include/exec/memory.h | 17 +
memory.c | 10 +++
Thomas Huth writes:
> Apart from that, as mentioned in the patch description, v1.0 chips
> apparently have never been released into the wild - and I guess the
> unreleased v1.0 chips have all already scrapped nowadays ... so the
> patch should be fine, I think.
Not only not in the wild, but I'm p
On Thu, Jan 28, 2016 at 8:34 AM, Peter Maydell wrote:
> On 28 January 2016 at 16:31, Frederic Konrad
> wrote:
>> On 08/01/2016 11:40, Peter Maydell wrote:
>>> [*] by which I mean, I will review this series if you can find
>>> somebody else who's going to say they'd use it.
>
>> This is useful fo
On Wed, Jan 27, 2016 at 6:51 AM, KONRAD Frederic
wrote:
>
>
> Le 19/01/2016 23:35, Alistair Francis a écrit :
>>
>> From: Peter Crosthwaite
>>
>> Add memory io handlers that glue the register API to the memory API.
>> Just translation functions at this stage. Although it does allow for
>> devices
On Thu, Jan 28, 2016 at 7:44 AM, Frederic Konrad
wrote:
> On 19/01/2016 23:35, Alistair Francis wrote:
>> From: Peter Crosthwaite
>>
>> An API similar to the existing qdev_get_gpio_in() except gets outputs.
>> Useful for:
>>
>> 1: Implementing lightweight devices that don't want to keep pointers
On 01/29/2016 03:35 PM, John Snow wrote:
> Accidentally, I removed a "feature" where empty drives had geometry
> values applied to them, which allows seek on empty drives to work
> "by accident," as QEMU actually tries to disallow that.
>
> Seeks on empty drives should work, though, but the easies
On Wed, Jan 27, 2016 at 7:09 AM, KONRAD Frederic
wrote:
>
>
> Le 19/01/2016 23:35, Alistair Francis a écrit :
>>
>> From: Peter Crosthwaite
>>
>> Allow defining of optional address decoding information in register
>> definitions. This is useful for clients that want to associate
>> registers with
From: Vikram Sethi
The function that creates a device tree node for the Calxeda XGMAC
platform device is fairly generic and can be reused for other
platform devices that require just reg, interrupts and dma-coherent
properties. Rename add_calxeda_midway_xgmac_fdt_node to
add_generic_platform_fdt_
This patch series enables assigning Qualcomm Technolgies, Inc HiDMA
platform device to guest virtual machines using the VFIO-Platform
framework.
Since the existing Calxeda XGMAC function to create device-tree node
is fairly generic, the first patch renames the function to allow
reuse by other pla
From: Vikram Sethi
This patch introduces a Qualcomm Technologies, Inc HiDMA
device and allows the instantiation of the vfio-qcom-hidma
device from the QEMU command line
(-device vfio-qcom-hidma,host="").
A device tree node is created for the guest containing compat,
dma-coherent, reg and interru
The new version is slightly different, to support Rasbperry Pi (in
particular, Pi1's arm11 core which doesn't support v7 instructions
such as MOVW).
Tested-by: Peter Crosthwaite
Reviewed-by: Peter Crosthwaite
Signed-off-by: Andrew Baumann
---
Notes:
v5:
* style/formatting changes only
This module is specific to the bcm2836 (Pi2). It implements the top
level interrupt controller, and mailboxes used for inter-processor
synchronisation.
Reviewed-by: Peter Crosthwaite
Signed-off-by: Andrew Baumann
---
Notes:
v5:
* <= IRQ_CNTVIRQ rather than < IRQ_MAILBOX0 for clarity
Reviewed-by: Peter Crosthwaite
Signed-off-by: Andrew Baumann
---
Notes:
v3:
* minor style tweaks
* use extract32 in place of manual shift/masking
v2:
* split inputs to named gpu_irq and arm_irq gpio inputs
* use 64-bit gpu_irq and 8-bit arm_irq status rather than
This is the SoC for Raspberry Pi 2.
Reviewed-by: Peter Crosthwaite
Signed-off-by: Andrew Baumann
---
Notes:
v5:
* use qdev_connect_gpio_out to connect CPU timers, rather than direct
assignment
* minor formatting tweaks
v4:
* s/ic/control/
* replace use of smp_cpus
This device maintains all the non-CPU peripherals on bcm2835 (Pi1)
which are also present on bcm2836 (Pi2). It also implements the
private address spaces used for DMA and mailboxes.
Reviewed-by: Peter Crosthwaite
Signed-off-by: Andrew Baumann
---
Notes:
v5:
* s/memory_region_init_io/me
This adds the system mailboxes which are used to communicate with a
number of GPU peripherals on Pi/Pi2.
Reviewed-by: Peter Crosthwaite
Signed-off-by: Andrew Baumann
---
Notes:
v5:
* minor style tweaks only
v3:
* #define register offsets
* rename mbox_init -> mbox_re
This patch series adds initial support for Raspberry Pi 2
(bcm2836). It is heavily based on the original (out of tree) work of
Gregory Estrade, Stefan Weil and others to support Raspberry Pi
1. Thanks are also due to Peter Crosthwaite for the code reviews and
feedback.
At the end of this series, i
This sits behind the mailbox interface, and implements
request/response queries for system properties. The
framebuffer-related properties will be added in a later patch.
Reviewed-by: Peter Crosthwaite
Signed-off-by: Andrew Baumann
---
Notes:
v5:
* minor style tweak
v4:
* a
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Friday, 29 January 2016 14:41
>
> On Fri, Jan 29, 2016 at 2:28 PM, Andrew Baumann
> wrote:
> >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> >> Sent: Friday, 29 January 2016 14:23
> >>
> >> On Fri, Jan 29, 2016
On Fri, Jan 29, 2016 at 2:28 PM, Andrew Baumann
wrote:
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Friday, 29 January 2016 14:23
>>
>> On Fri, Jan 29, 2016 at 1:50 PM, Andrew Baumann
>> wrote:
>> > Hi Peter,
>> >
>> > Thanks for all the reviews. I should have a respun
Accidentally, I removed a "feature" where empty drives had geometry
values applied to them, which allows seek on empty drives to work
"by accident," as QEMU actually tries to disallow that.
Seeks on empty drives should work, though, but the easiest thing is to
restore the misfeature where empty dr
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Friday, 29 January 2016 14:23
>
> On Fri, Jan 29, 2016 at 1:50 PM, Andrew Baumann
> wrote:
> > Hi Peter,
> >
> > Thanks for all the reviews. I should have a respun version on the list
> > shortly.
> There's one minor change to
On Fri, Jan 29, 2016 at 1:50 PM, Andrew Baumann
wrote:
> Hi Peter,
>
> Thanks for all the reviews. I should have a respun version on the list
> shortly. There's one minor change to this last patch:
>
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Thursday, 28 January 2016
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Thursday, January 28, 2016 6:55 PM
> To: Kay, Allen M; Gerd Hoffmann; qemu-devel@nongnu.org
> Cc: igv...@ml01.01.org; xen-de...@lists.xensource.com; Eduardo Habkost;
> Stefano Stabellini; Cao jin; vfi
Hi Peter,
Thanks for all the reviews. I should have a respun version on the list shortly.
There's one minor change to this last patch:
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Thursday, 28 January 2016 23:31
> > On Fri, Jan 15, 2016 at 3:58 PM, Andrew Baumann
> > w
If the FIS or DMA engines are already started, do not allow them to be
"restarted." As a side-effect of this change, the migration post-load
routine must be modified to cope. If the engines are listed as "on"
in the migrated registers, they must be cleared to allow the startup
routine to see the tr
Instead of relying on ahci_cond_start_engines to maintain the
engine status indicators itself, have the lower-layer CLB and FIS mapper
helpers do it themselves.
This makes the cond_start routine slightly nicer to read, and makes sure
that the status indicators will always be correct.
Signed-off-b
As reported by Zuozhi fzz , there's a problem
you can expose in AHCI by rewriting the command list buffer and/or FIS
receive buffer addresses, then re-starting the AHCI device before bringing
it to a stop. Depending on the success of the remap operations, you may
be able to transition the device to
Currently, we let ahci_cond_start_engines reject weird configurations
where either the DMA (CLB) or FIS engines are said to be started, but
their matching on/off control bit is toggled off.
There should be no way to achieve this, since any time you toggle the
control bit off, the status bit should
Definitely don't try to unmap a garbage address.
Reported-by: Zuozhi fzz
Signed-off-by: John Snow
---
hw/ide/ahci.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 17f1cbd..cdc9299 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -661,6 +661,10 @
On 01/29/2016 12:49 PM, Max Reitz wrote:
> This reverts the changes that commit
> 2e1280e8ff95b3145bc6262accc9d447718e5318 applied to hw/block/fdc.c;
> also, an additional case of drv->media_inserted use has crept in since,
> which is replaced by a call to blk_is_inserted().
>
> That commit change
On 01/29/2016 12:49 PM, Max Reitz wrote:
> 'change' and related operations did not work when used on guest devices
> featuring removable media but no actual tray, because
> blk_dev_is_tray_open() always returned false for them and the
> blockdev-{insert,remove}-medium commands required it to return
On Thu, Jan 28, 2016 at 08:25:18AM -0700, Eric Blake wrote:
> > Sadly what I need is block-stream to an intermediate layer (as I
> > want to merge in the other direction); I don't think that proposal
> > was ever implemented.
> >
> > http://wiki.qemu.org/Features/Snapshots#Streaming_to_an_Interme
Signed-off-by: Max Reitz
Reviewed-by: Eric Blake
Reviewed-by: Alberto Garcia
---
block/qapi.c | 2 +-
qapi/block-core.json | 4 ++--
tests/qemu-iotests/067.out | 4
3 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/block/qapi.c b/block/qapi.c
index a49c118.
This reverts the changes that commit
2e1280e8ff95b3145bc6262accc9d447718e5318 applied to hw/block/fdc.c;
also, an additional case of drv->media_inserted use has crept in since,
which is replaced by a call to blk_is_inserted().
That commit changed tests/fdc-test.c, too, because after it, one less
T
'change' and related operations did not work when used on guest devices
featuring removable media but no actual tray, because
blk_dev_is_tray_open() always returned false for them and the
blockdev-{insert,remove}-medium commands required it to return true.
Fix this by making blockdev-{insert,remov
Pull out the check whether a block device has a tray from
blk_dev_is_tray_open() into its own function so both attributes (whether
there is a tray vs. whether that tray is open) can be queried
independently.
Cc: qemu-stable
Signed-off-by: Max Reitz
Reviewed-by: Eric Blake
Reviewed-by: Alberto G
This is a rebase of v3
(http://lists.nongnu.org/archive/html/qemu-devel/2016-01/msg04471.html)
on master made necessary because of a merge conflict in patch 3.
git-backport-diff against v3:
Key:
[] : patches are identical
[] : number of functional differences between upstream/downstream
ARM stops before access to a location covered by watchpoint. Also, QEMU
watchpoint fire is not necessarily an architectural watchpoint match.
Unfortunately, that is hardly possible to ignore a fired watchpoint in
debug exception handler. So move watchpoint check from debug exception
handler to the
Dear QEMU Developers,
I'm trying to build and run UCX project
(https://github.com/openucx/ucx) under qemu user mode.
I have no problem to build the project, but whenever I'm trying to
run/use binaries from the project
I get the following error:
./bin/ucx_info
qemu-aarch64-static: qemu-2.5.0/trans
This series is intended to fix ARM watchpoint emulation misbehavior.
QEMU hangs when QEMU watchpoint fires but it does not pass additional
architectural checks in ARM CPU debug exception handler. For details,
please see individual patches. The most relevant parts of the original
discussion about AR
When QEMU watchpoint matches, that is not definitely an architectural
watchpoint match yet. If it is a stop-before-access watchpoint then that
is hardly possible to ignore it after throwing a TCG exception.
A special callback is introduced to check for architectural watchpoint
match before raising
Thanks, sounds and looks good.
Acked-by: Keith Busch
> Background on QEMU boot indices
> ---
>
> Normally, the "bootindex" property is configured for bootable devices
> with:
>
> DEVICE_instance_init()
> device_add_bootindex_property(..., "bootindex", ...)
>
On 29 January 2016 at 18:53, Lluís Vilanova wrote:
> This fixes double-definitions in *-user builds when using the UST
> tracing backend (which indirectly includes the system's "syscall.h").
>
> Signed-off-by: Lluís Vilanova
> ---
> bsd-user/qemu.h |2 +-
> linux-user/a
This fixes double-definitions in *-user builds when using the UST
tracing backend (which indirectly includes the system's "syscall.h").
Signed-off-by: Lluís Vilanova
---
bsd-user/qemu.h |2 +-
linux-user/aarch64/target_syscall.h |5 +
linux-user/alpha/target_s
Hi Jike,
On Fri, 2016-01-29 at 16:49 +0800, Jike Song wrote:
> On 01/29/2016 03:20 PM, Jike Song wrote:
> > This discussion becomes a little difficult for a newbie like me :(
> >
> > On 01/28/2016 11:23 PM, Alex Williamson wrote:
> > > On Thu, 2016-01-28 at 14:00 +0800, Jike Song wrote:
> > > > O
Here is the description of the mcrfs instruction from the PowerPC Architecture
Book, Version 2.02, Book I: PowerPC User Instruction Set Architecture
(http://www.ibm.com/developerworks/systems/library/es-archguide-v2.html), found
on page 120:
The contents of FPSCR field BFA are copied to Condit
The first commit is because some FP_ macros needed to calculate
FP_EX_CLEAR_BITS did not exist, and I reordered all the FP_ macros so that they
are defined in the same order as the FPSCR_ macros. This has not changed since
the previous version.
The second commit stops bits in the FPSCR being clear
Signed-off-by: James Clarke
---
target-ppc/cpu.h | 31 ++-
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 9706000..3a967b7 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -686,24 +686,37 @@ enum {
#de
On 01/29/2016 10:50 AM, Peter Maydell wrote:
> Clean up includes so that osdep.h is included first and headers
> which it implies are not included manually.
>
> This commit was created with scripts/clean-includes.
>
> Signed-off-by: Peter Maydell
> ---
> qobject/json-lexer.c| 2 +-
> qobjec
On 01/29/2016 10:49 AM, Peter Maydell wrote:
> Clean up includes so that osdep.h is included first and headers
> which it implies are not included manually.
>
> This commit was created with scripts/clean-includes.
>
> Signed-off-by: Peter Maydell
> ---
> qapi/opts-visitor.c | 1 +
> qa
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
backends/baum.c | 1 +
backends/hostmem-file.c | 1 +
backends/hostmem-ram.c | 1 +
backends
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
stubs/arch-query-cpu-def.c | 1 +
stubs/bdrv-commit-all.c | 1 +
stubs/clock-warp.c
This patchset runs clean-includes on a bunch more files.
With this (plus one or two patches I sent earlier) every
file in the tree except for those in tests/ has been
updated. (I skipped tests/ for now because at least some
of the files in tests/tcg seem to be totally standalone.
I'll look at those
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
bsd-user/bsdload.c | 8 +---
bsd-user/elfload.c | 8 +---
bsd-user/main.c| 8 +---
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
disas/hppa.c | 1 +
disas/i386.c | 2 +-
disas/ia64.c | 3 +--
disas/m68k.c | 3 +--
disas/s390.c
Hello Qixiong,
+-- On Fri, 29 Jan 2016, Qixiong Su wrote --+
| QEMU crashes when redirect a usb 3.0 device which attached to a xHCI
| controller. The assertion of "dev->state == 3" in "usb_handle_packet" has
| failed.
You need to follow git commit message syntax. ie. One line commit summary
On Fri, 2016-01-29 at 08:09 +0100, Gerd Hoffmann wrote:
> Hi,
>
> > 1) The OpRegion MemoryRegion is mapped into system_memory through
> > programming of the 0xFC config space register.
> > a) vfio-pci could pick an address to do this as it is realized.
> > b) SeaBIOS/OVMF could program this.
>
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
net/checksum.c | 1 +
net/dump.c | 1 +
net/eth.c | 1 +
net/filter-buffer.c
On 29 January 2016 at 17:37, Kevin Wolf wrote:
> The following changes since commit 047e363b05679724d6b784c6ec6310697fe48ba0:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-softfloat-20160122' into staging (2016-01-22
> 15:19:21 +)
>
> are available in the git repository at
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
qga/channel-posix.c | 7 +--
qga/channel-win32.c | 5 +
qga/commands-
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
This catches everything except:
* our external code (roms, dtc, pixman, libdecnumber)
* tests
---
a
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
util/acl.c | 1 +
util/base64.c| 1 +
util/bitmap.c
From: Fam Zheng
"offset" is the offset of cluster and sector_num doesn't necessarily
refer to the start of it, it should add index_in_cluster.
Signed-off-by: Fam Zheng
Message-id: 1453780743-16806-12-git-send-email-f...@redhat.com
Reviewed-by: Max Reitz
Signed-off-by: Max Reitz
---
block/vmd
From: Fam Zheng
Reviewed-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Fam Zheng
Message-id: 1453780743-16806-7-git-send-email-f...@redhat.com
Signed-off-by: Max Reitz
---
block/parallels.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/block/parallels.c b/block/parallels.c
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
qapi/opts-visitor.c | 1 +
qapi/qapi-dealloc-visitor.c | 1 +
qapi/qapi-util.c
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
qom/container.c | 2 +-
qom/object.c| 1 +
qom/object_interfaces.c | 1 +
qom/qom
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
qobject/json-lexer.c| 2 +-
qobject/json-parser.c | 2 +-
qobject/json-streamer.c | 1 +
qobjec
From: Fam Zheng
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Fam Zheng
Message-id: 1453780743-16806-10-git-send-email-f...@redhat.com
Signed-off-by: Max Reitz
---
block/vdi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/block/vdi.c b/block/vdi.c
index 294c438..b403243 100644
--- a/block
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
slirp/arp_table.c | 1 +
slirp/bootp.c | 1 +
slirp/cksum.c | 1 +
slirp/dnssearch.c | 4
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
contrib/ivshmem-client/ivshmem-client.c | 2 +-
contrib/ivshmem-client/main.c | 1 +
contri
From: Fam Zheng
Signed-off-by: Fam Zheng
Message-id: 1453780743-16806-17-git-send-email-f...@redhat.com
Reviewed-by: Max Reitz
Signed-off-by: Max Reitz
---
tests/qemu-iotests/059 | 10 ++
tests/qemu-iotests/059.out | 25 +
2 files changed, 35 insertions(+)
From: Fam Zheng
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Fam Zheng
Message-id: 1453780743-16806-9-git-send-email-f...@redhat.com
Signed-off-by: Max Reitz
---
block/sheepdog.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index 2ea05a6..a0098c1 1
From: Max Reitz
Suggested-by: Paolo Bonzini
Signed-off-by: Max Reitz
Reviewed-by: Kevin Wolf
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/141 | 186 +
tests/qemu-iotests/141.out | 59 ++
tests/qemu-iotests/group | 1 +
3 fi
From: Fam Zheng
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Fam Zheng
Message-id: 1453780743-16806-11-git-send-email-f...@redhat.com
Signed-off-by: Max Reitz
---
block/vpc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/block/vpc.c b/block/vpc.c
index a070307..f504536 100644
--- a/blo
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell
---
ui/console-gl.c | 1 +
ui/console.c | 1 +
ui/curses.c
From: Fam Zheng
The added parameter can be used to return the BDS pointer which the
valid offset is referring to. Its value should be ignored unless
BDRV_BLOCK_OFFSET_VALID in ret is set.
Until block drivers fill in the right value, let's clear it explicitly
right before calling .bdrv_get_block_
From: Max Reitz
We need this list so that bdrv_close_all() can keep track of which BDSs
are still open after having removed the BDSs from all of the BBs and
having released all monitor BDS references.
Signed-off-by: Max Reitz
Reviewed-by: Kevin Wolf
Reviewed-by: Fam Zheng
Signed-off-by: Kevin
From: Fam Zheng
The "flags" bit mask is expanded to two booleans, "data" and "zero";
"bs" is replaced with "filename" string.
Refactor the merge conditions in img_map() into entry_mergeable().
Reviewed-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Fam Zheng
Message-id: 145378074
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