From: Roman Kagan
When populating ACPI objects for floppy drives one needs to provide the
maximum values for cylinder, sector, and head number the drive supports.
This patch adds a function that iterates through the array of predefined
floppy drive formats and returns the
From: Ilya Maximets
Fix QEMU crash when -netdev vhost-user,queues=n is passed with number
of queues greater than MAX_QUEUE_NUM.
Signed-off-by: Ilya Maximets
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
On Thu, Mar 03, 2016 at 05:46:15PM +, Dr. David Alan Gilbert wrote:
> * Liang Li (liang.z...@intel.com) wrote:
> > The current QEMU live migration implementation mark the all the
> > guest's RAM pages as dirtied in the ram bulk stage, all these pages
> > will be processed and that takes quit a
From: "Denis V. Lunev"
The patch for the kernel part is in linux-next already:
commit ac88e7c908b920866e529862f2b2f0129b254ab2
Author: Igor Redko
Date: Thu Feb 18 09:23:01 2016 +1100
virtio_balloon: export 'available' memory to balloon
DSDT was changed by:
commit 95cad0a1974a07f91b6f85324dfe3e18ee27b30a ("i386: populate floppy
drive information in DSDT").
Update expected files accordingly.
Signed-off-by: Michael S. Tsirkin
---
tests/acpi-test-data/pc/DSDT | Bin 5478 -> 5527 bytes
From: Roman Kagan
On x86-based systems Linux determines the presence and the type of
floppy drives via a query of a CMOS field. So does SeaBIOS when
populating the return data for int 0x13 function 0x08.
However Windows doesn't do it. Instead, it requests this information
From: Marcel Apfelbaum
Minimizes the possibility to assign
the same bit to different features.
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Reviewed-by: Laurent Vivier
From: Roman Kagan
Instead of statically declaring the floppy controller in DSDT, with its
_STA method depending on some obscure bit in the parent ISA bridge, add
the object dynamically to DSDT via AML API only when the controller is
present.
The _STA method is no longer
From: Roman Kagan
Make it possible to query the CMOS type of a floppy drive outside of the
source file where it's defined.
It will allow to properly populate the corresponding ACPI objects and
thus enable Windows on BIOS-less systems to access the floppy drives.
From: Xiao Guangrong
Extend aml_operation_region() to use object as offset
Reviewed-by: Igor Mammedov
Signed-off-by: Xiao Guangrong
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S.
From: Igor Mammedov
If host_memory_backend_get_memory() were to return error and
NULL MemoryRegion, pc_dimm_check_memdev_is_busy() would crash
dereferencing NULL pointer in memory_region_is_mapped().
But if error is set and non NULL MemoryRegion is returned
then error_setg()
From: Ladi Prosek
The segfault here is triggered by the driver notifying the stats queue
twice after adding a buffer to it. This effectively resets stats_vq_elem
back to NULL and QEMU crashes on the next stats timer tick in
balloon_stats_poll_cb.
This is a regression
From: Xiao Guangrong
It will be used by nvdimm acpi
Signed-off-by: Xiao Guangrong
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/acpi/aml-build.h | 1 +
From: Igor Redko
We are making experiments with different autoballooning strategies
based on the guest behavior. Thus we need to experiment with different
guest statistics. For now every counter change requires QEMU recompilation
and dances with Libvirt.
This patch
From: Marcel Apfelbaum
Commits 1811e64c and a6df8adf use the same virtio feature bit 4
for different features.
Fix it by using different bits.
Reported-by: Laurent Vivier
Tested-by: Laurent Vivier
Signed-off-by: Marcel Apfelbaum
This is a very limited form of support for runtime patching -
similar in functionality to what we can do with ACPI_EXTRACT
macros in python, but implemented in C.
This is to allow ACPI code direct access to data tables -
which is exactly what DataTableRegion is there for, except
no known windows
The following changes since commit ed6128ebbdd7cd885d39980659dad4b5c8ae8158:
Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request'
into staging (2016-03-01 15:54:03 +)
are available in the git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git
From: Xiao Guangrong
It will be used by nvdimm acpi
Signed-off-by: Xiao Guangrong
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/acpi/aml-build.h | 2 ++
> Implement cpu hotplug routine and add the machine hook.
>
> Signed-off-by: Matthew Rosato
> Reviewed-by: David Hildenbrand
> ---
> hw/s390x/s390-virtio-ccw.c | 13 +
> target-s390x/cpu.c | 7 +++
> 2 files
> In preparation for hotplug, defer some CPU initialization
> until the device is actually being realized, including
> cpu_exec_init.
>
> Signed-off-by: Matthew Rosato
Looks good to me!
Reviewed-by: David Hildenbrand
David
On Thu, Mar 03, 2016 at 05:46:28PM +0100, Paolo Bonzini wrote:
>
>
> On 12/02/2016 15:45, Peter Maydell wrote:
> > Add a new function load_image_mr(), which behaves like
> > load_image_targphys() except that it loads the ROM image to
> > a specified MemoryRegion rather than to a specified
On Wed, Mar 02, 2016 at 04:38:34PM +0800, Jike Song wrote:
> On 02/24/2016 12:24 AM, Kirti Wankhede wrote:
> > + vgpu_dma->size = map->size;
> > +
> > + vgpu_link_dma(vgpu_iommu, vgpu_dma);
>
> Hi Kirti & Neo,
>
> seems that no one actually setup mappings for IOMMU here?
>
Hi Jike,
Yes.
Remove the CPU core device by removing the underlying CPU thread devices.
Hot removal of CPU for sPAPR guests is supported by sending the hot unplug
notification to the guest via EPOW interrupt. Release the vCPU object
after CPU hot unplug so that vCPU fd can be parked and reused.
Signed-off-by:
Add sPAPR specific CPU core device that is based on generic CPU core device.
Creating this core device will result in creation of all the CPU thread
devices that are part of this core.
Signed-off-by: Bharata B Rao
---
hw/ppc/Makefile.objs| 1 +
Initialize boot CPUs as spapr-cpu-core devices and create links from
machine object to these core devices. These links can be considered
as CPU slots in which core devices will get hot-plugged. spapr-cpu-core
device's slot property indicates the slot where it is plugged. Information
about all the
Add an abstract CPU core type that could be used by machines that want
to define and hotplug CPUs in core granularity.
Signed-off-by: Bharata B Rao
---
hw/cpu/Makefile.objs | 1 +
hw/cpu/core.c | 44
This sync API will be used by the CPU hotplug code to wait for the CPU to
completely get removed before flagging the failure to the device_add
command.
Sync version of this call is needed to correctly recover from CPU
realization failures when ->plug() handler fails.
Signed-off-by: Bharata B Rao
XICS is setup for each CPU during initialization. Provide a routine
to undo the same when CPU is unplugged. While here, move ss->cs management
into xics from xics_kvm since there is nothing KVM specific in it.
Also ensure xics reset doesn't set irq for CPUs that are already unplugged.
This allows
cpu_exec_init() does vmstate_register and register_savevm for the CPU device.
These need to be undone from cpu_exec_exit(). These changes are needed to
support CPU hot removal.
Signed-off-by: Bharata B Rao
---
exec.c | 12
1 file changed, 12
Set up device tree entries for the hotplugged CPU core and use the
exising EPOW event infrastructure to send CPU hotplug notification to
the guest.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c | 73 -
From: Gu Zheng
In order to deal well with the kvm vcpus (which can not be removed without any
protection), we do not close KVM vcpu fd, just record and mark it as stopped
into a list, so that we can reuse it for the appending cpu hot-add request if
possible. It is also
Hi,
This is the next version of "Core based CPU hotplug for PowerPC sPAPR" that
was posted at
https://lists.gnu.org/archive/html/qemu-ppc/2016-02/msg00286.html
Here is a quick summary on how this approach is different from the
previous approaches that I have been pursuing with the last one being
CPUState *cpu gets added to the cpus list during cpu_exec_init(). It
should be removed from cpu_exec_exit().
cpu_exec_init() is called from generic CPU::instance_finalize and some
archs like PowerPC call it from CPU unrealizefn. So ensure that we
dequeue the cpu only once.
Now -1 value for
On (Thu) 03 Mar 2016 [14:16:11], Ladi Prosek wrote:
> QSIMPLEQ supports appending to tail in O(1) and is intrusive so
> it doesn't require extra memory allocations for the bookkeeping
> data.
>
> Suggested-by: Paolo Bonzini
> Signed-off-by: Ladi Prosek
On 03/02/2016 02:47 PM, Jason Wang wrote:
On 02/29/2016 08:23 PM, Zhang Chen wrote:
In this unit test,we will test the filter redirector function.
Start qemu with:
"-netdev tap,id=qtest-bn0 "
Please don't use tap since it needs
- CAP_NET_ADMIN
- if-up script
Neither of above
This pair of patches cleans up handling of SDR1 (master page table
pointer register for Power) and related cases with an external
(i.e. managed by qemu or KVM, rather than the guest) hash page table
(HPT).
I wouldn't push 1/2 on its own after the soft freeze, except that it
simplifies 2/2 which
fa48b43 "target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM"
purports to remove a hack in the handling of hash page tables (HPTs)
managed by KVM instead of qemu. However, it actually went in the wrong
direction.
That patch requires anything looking for an external HPT (that is one
When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
pointer updated by a write to the SDR1 register we need to update some
derived variables. Likewise, when the cpu is configured for an external
HPT (one not in the guest memory space) some derived variables need to be
updated.
On Fri, Mar 04, 2016 at 01:40:42PM +1100, David Gibson wrote:
> fa48b43 "target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM"
> purports to remove a hack in the handling of hash page tables (HPTs)
> managed by KVM instead of qemu. However, it makes the wrong call.
>
> That patch
On Tue, Mar 01, 2016 at 08:10:41PM +1100, Alexey Kardashevskiy wrote:
> This adds support for Dynamic DMA Windows (DDW) option defined by
> the SPAPR specification which allows to have additional DMA window(s)
>
> This implements DDW for emulated and VFIO devices. As all TCE root regions
> are
On Thu, Mar 03, 2016 at 05:01:31PM +1100, Alexey Kardashevskiy wrote:
> On 03/03/2016 04:28 PM, David Gibson wrote:
> >On Tue, Mar 01, 2016 at 08:10:32PM +1100, Alexey Kardashevskiy wrote:
> >>This adds a vfio_votify() callback to inform an IOMMU (and then its owner)
> >>that VFIO started using
On Tue, Mar 01, 2016 at 08:10:30PM +1100, Alexey Kardashevskiy wrote:
> We are going to have multiple DMA windows at different offsets on
> a PCI bus. For the sake of migration, we will have as many TCE table
> objects pre-created as many windows supported.
> So we need a way to map windows
On Thu, Mar 03, 2016 at 05:07:33PM +1100, Alexey Kardashevskiy wrote:
> On 03/03/2016 04:36 PM, David Gibson wrote:
> >On Tue, Mar 01, 2016 at 08:10:34PM +1100, Alexey Kardashevskiy wrote:
> >>At the moment VFIOContainer uses one memory listener which listens on
> >>PCI address space for both
> > I have for example a compressed cluster with an L2 entry value of 4A
> > C0 00 00 00 3D 97 50. This would lead me to believe the cluster starts
> > at offset 0x3D9750 and has a length of 0x2B 512-byte sectors (or 0x2B
> > times 0x200 = 0x5600). Added to the offset this would give an end for
On 03/04/2016 02:39 PM, David Gibson wrote:
On Thu, Mar 03, 2016 at 12:42:53PM +1100, Alexey Kardashevskiy wrote:
The pseries machine supports multiple PHBs. Each PHB's MMIO/IO space is
mapped to the CPU address space starting at SPAPR_PCI_WINDOW_BASE plus
some offset which is calculated from
On Thu, Mar 03, 2016 at 08:50:26PM -0600, Michael Roth wrote:
> Quoting David Gibson (2016-03-03 19:18:09)
> > On Thu, Mar 03, 2016 at 03:55:36PM -0600, Michael Roth wrote:
> > > Since 3f1e147, QEMU has adopted a convention of supporting function
> > > hotplug by deferring hotplug events until
On Thu, Mar 03, 2016 at 12:42:53PM +1100, Alexey Kardashevskiy wrote:
> The pseries machine supports multiple PHBs. Each PHB's MMIO/IO space is
> mapped to the CPU address space starting at SPAPR_PCI_WINDOW_BASE plus
> some offset which is calculated from PHB's index and
> SPAPR_PCI_WINDOW_SPACING
On Thu, Mar 03, 2016 at 01:19:47PM +0100, Andrea Bolognani wrote:
> On Thu, 2016-03-03 at 16:21 +0800, Peter Xu wrote:
> > For emulated ARM VM, only gicv2 is supported. We need to add gicv3
> in
> > when emulated gicv3 ready. For KVM accelerated ARM VM, we detect the
> > capability bits using
Quoting David Gibson (2016-03-03 19:18:09)
> On Thu, Mar 03, 2016 at 03:55:36PM -0600, Michael Roth wrote:
> > Since 3f1e147, QEMU has adopted a convention of supporting function
> > hotplug by deferring hotplug events until func 0 is hotplugged.
> > This is likely how management tools like
> On Thu, Mar 03, 2016 at 06:44:28PM +0800, Liang Li wrote:
> > Get the free pages information through virtio and filter out the free
> > pages in the ram bulk stage. This can significantly reduce the total
> > live migration time as well as network traffic.
> >
> > Signed-off-by: Liang Li
On Fri, Mar 04, 2016 at 12:45:29AM +0100, Greg Kurz wrote:
> On Thu, 3 Mar 2016 15:35:07 +1100
> David Gibson wrote:
>
> > On Wed, Mar 02, 2016 at 11:06:19AM +1100, David Gibson wrote:
> > > On Tue, Mar 01, 2016 at 07:03:10PM +0100, Greg Kurz wrote:
> > > > The
fa48b43 "target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM"
purports to remove a hack in the handling of hash page tables (HPTs)
managed by KVM instead of qemu. However, it makes the wrong call.
That patch requires anything looking for an external HPT (that is one not
managed by
> On Thu, 3 Mar 2016 18:44:26 +0800
> Liang Li wrote:
>
> > Extend the virtio balloon device to support a new feature, this new
> > feature can help to get guest's free pages information, which can be
> > used for live migration optimzation.
>
> Do you have a spec for
> On Thu, 3 Mar 2016 18:44:28 +0800
> Liang Li wrote:
>
> > Get the free pages information through virtio and filter out the free
> > pages in the ram bulk stage. This can significantly reduce the total
> > live migration time as well as network traffic.
> >
> >
> Subject: Re: [RFC qemu 2/4] virtio-balloon: Add a new feature to balloon
> device
>
> On Thu, Mar 03, 2016 at 06:44:26PM +0800, Liang Li wrote:
> > Extend the virtio balloon device to support a new feature, this new
> > feature can help to get guest's free pages information, which can be
> >
On Thu, Mar 03, 2016 at 12:55:51PM +0100, Andrew Jones wrote:
> On Thu, Mar 03, 2016 at 04:21:11PM +0800, Peter Xu wrote:
> > +
> > +GICCapabilityList *qmp_query_gic_capability(Error **errp);
>
> I don't know anything about QMP, so just offering a superficial
> review comment. Is the prototype
On Thu, Mar 03, 2016 at 03:55:36PM -0600, Michael Roth wrote:
> Since 3f1e147, QEMU has adopted a convention of supporting function
> hotplug by deferring hotplug events until func 0 is hotplugged.
> This is likely how management tools like libvirt would expose
> such support going forward.
>
>
> Subject: Re: [RFC qemu 0/4] A PV solution for live migration optimization
>
> * Liang Li (liang.z...@intel.com) wrote:
> > The current QEMU live migration implementation mark the all the
> > guest's RAM pages as dirtied in the ram bulk stage, all these pages
> > will be processed and that takes
> On Thu, Mar 03, 2016 at 06:44:24PM +0800, Liang Li wrote:
> > The current QEMU live migration implementation mark the all the
> > guest's RAM pages as dirtied in the ram bulk stage, all these pages
> > will be processed and that takes quit a lot of CPU cycles.
> >
> > From guest's point of view,
On 03/03/2016 06:02 PM, Leonid Bloch wrote:
> Greetings Qemu-Devel,
>
> I am wondering if any of you have further comments on the series in issue.
>
> Links to individual patches are attached, for convenience.
>
> Kind regards,
> Leonid.
Hello Leonid:
I've begun the reviewing. But consider the
On Wed, 2016-03-02 at 21:30 +0100, Thomas Huth wrote:
> So if you've got some spare time, could you maybe extract all those
> patches that define new SPRs with spr_register_kvm[_hv] and send them as
> a separate patch series? That could help to fix future migration issues,
> and also would
On Thu, Mar 03, 2016 at 08:15:13PM +, Peter Maydell wrote:
> Hi Edgar -- I'm just looking back at these signal handling
> race condition fix patches, and with this one I have a confusion
> about the Microblaze Linux syscall code that I hope you can
> clear up for me.
>
> Looking at the kernel
On 03/03/2016 10:22 PM, David Gibson wrote:
On Tue, Mar 01, 2016 at 08:10:40PM +1100, Alexey Kardashevskiy wrote:
The page size is an attribute of an IOMMU, not a container as a container
may contain more just one IOMMU.
This moves iova_pgsizes from VFIOContainer to VFIOGuestIOMMU.
The
On Thu, 3 Mar 2016 15:35:07 +1100
David Gibson wrote:
> On Wed, Mar 02, 2016 at 11:06:19AM +1100, David Gibson wrote:
> > On Tue, Mar 01, 2016 at 07:03:10PM +0100, Greg Kurz wrote:
> > > The gdbstub can't access guest memory with current master. This is what
> > >
On Tue, Mar 01, 2016 at 08:10:40PM +1100, Alexey Kardashevskiy wrote:
> The page size is an attribute of an IOMMU, not a container as a container
> may contain more just one IOMMU.
>
> This moves iova_pgsizes from VFIOContainer to VFIOGuestIOMMU.
> The following patch will use this.
>
> This
On 22 February 2016 at 15:59, Alex Bennée wrote:
> diff --git a/qemu-options.hx b/qemu-options.hx
> index 2f0465e..c7e0486 100644
> --- a/qemu-options.hx
> +++ b/qemu-options.hx
> @@ -3094,6 +3094,24 @@ STEXI
> Output log in @var{logfile} instead of to stderr
> ETEXI
>
>
Since 3f1e147, QEMU has adopted a convention of supporting function
hotplug by deferring hotplug events until func 0 is hotplugged.
This is likely how management tools like libvirt would expose
such support going forward.
Since sPAPR guests rely on per-func events rather than
slot-based, our
Implement cpu hotplug routine and add the machine hook.
Signed-off-by: Matthew Rosato
Reviewed-by: David Hildenbrand
---
hw/s390x/s390-virtio-ccw.c | 13 +
target-s390x/cpu.c | 7 +++
2 files changed, 20
Check for and propogate errors during s390 cpu creation.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-virtio.c | 2 +-
target-s390x/cpu-qom.h | 1 +
target-s390x/cpu.c | 56 +-
target-s390x/cpu.h | 2 ++
Once hotplug is enabled, interrupts may come in for CPUs
with an address > smp_cpus. Allocate for this and allow
search routines to look beyond smp_cpus.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-virtio.c | 13 +++--
1 file changed, 7 insertions(+), 6
Both initial and hotplugged CPUs need to set the same initial
state.
Signed-off-by: Matthew Rosato
Reviewed-by: David Hildenbrand
---
hw/s390x/s390-virtio.c | 4
target-s390x/cpu.c | 2 ++
2 files changed, 2 insertions(+), 4
Changes from v7->v8:
* Patch 3: Rather than using cpu_index to set cpu_num temporarily, squash
in pieces from other patches -- specifically next_cpu_id and move of
cpu_exec_init to realizefn (David)
* Patch 4: New patch, splits out toleration of max_cpus (Igor)
* Patch 5:
* use
In preparation for hotplug, defer some CPU initialization
until the device is actually being realized, including
cpu_exec_init.
Signed-off-by: Matthew Rosato
---
target-s390x/cpu-qom.h | 2 ++
target-s390x/cpu.c | 20 +++-
2 files changed, 17
Link each CPUState as property machine/cpu[n] during initialization.
Add a hotplug handler to s390-virtio-ccw machine and set the
state during plug.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-virtio-ccw.c | 34 ++
Ensure a valid cpu_model is set upfront by setting the
default value directly into the MachineState when none is
specified. This is needed to ensure hotplugged CPUs share
the same cpu_model.
Signed-off-by: Matthew Rosato
Reviewed-by: David Hildenbrand
On Mon, Feb 29, 2016 at 4:26 AM, Alex Bennée wrote:
>
> Alistair Francis writes:
>
>> This patch series is based on Peter C's original register API. His
>> original cover letter is below.
>>
>> I have added a new function
On 03/03/2016 06:04 AM, Alex Bennée wrote:
Richard Henderson writes:
On 02/22/2016 07:59 AM, Alex Bennée wrote:
+qemu_set_dfilter_ranges("0x1000+0x100");
+
+g_assert_false(qemu_log_in_addr_range(0xfff));
+g_assert(qemu_log_in_addr_range(0x1000));
+
Hi Edgar -- I'm just looking back at these signal handling
race condition fix patches, and with this one I have a confusion
about the Microblaze Linux syscall code that I hope you can
clear up for me.
Looking at the kernel entry.S code it looks to me like
the way syscalls work on microblaze is:
* Hailiang Zhang (zhang.zhanghaili...@huawei.com) wrote:
> On 2016/3/1 20:25, Dr. David Alan Gilbert wrote:
> >* Hailiang Zhang (zhang.zhanghaili...@huawei.com) wrote:
> >>On 2016/2/29 17:47, Dr. David Alan Gilbert wrote:
> >>>* Hailiang Zhang (zhang.zhanghaili...@huawei.com) wrote:
> On
Add a generic loader to QEMU which can be used to load images or set
memory values.
Signed-off-by: Alistair Francis
---
V4:
- Allow the loader to work with every architecture
- Move the file to hw/core
- Increase the maximum number of CPUs
- Make the CPU
This work is based on the original work by Li Guang with extra
features added by Peter C and myself.
The idea of this loader is to allow the user to load multiple images
or values into QEMU at startup.
Memory values can be loaded like this: -device
Signed-off-by: Alistair Francis
---
V4:
- Re-write to be more comprehensive
docs/generic-loader.txt | 56 +
1 file changed, 56 insertions(+)
create mode 100644 docs/generic-loader.txt
diff --git
If the caller didn't specify an architecture for the ELF machine
the load_elf() function will auto detect it based on the ELF file.
Signed-off-by: Alistair Francis
---
hw/core/loader.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/hw/core/loader.c
Very recently, trace-cmd got a few new features that allow you
to merge the host and guest kernel traces using the host TSC.
Those features originated in the tracing we're doing to debug spikes
in real-time KVM. However, as real-time KVM uses a very specific
setup and as we have so far debugged
On 03/03/2016 02:08 AM, Paolo Bonzini wrote:
Do you want LOG_UNIMP or LOG_GUEST_ERROR?
I would actually use LOG_IN_ASM. As you noticed, guests sometimes use
illegal opcodes; another example is Xen's hypercall interface.
On 03/03/2016 07:57, Hervé Poussineau wrote:
This patch is not quiet on
According to the ARMv8 Architecture reference manual [F6.1.203], ALL
of the following conditions need to be met for SRS to trap to EL3:
* It is executed at Secure PL1.
* The specified mode is monitor mode.
* EL3 is using AArch64.
Signed-off-by: Ralf-Philipp Weinmann
According to the ARMv8 Architecture reference manual [F6.1.203], ALL
of the following conditions need to be met for SRS to trap to EL3:
* It is executed at Secure PL1.
* The specified mode is monitor mode.
* EL3 is using AArch64.
---
target-arm/translate.c | 5 +++--
1 file changed, 3
The function do_openat() is not consistent about whether it is
returning a host errno or a guest errno in case of failure.
Standardise on returning -1 with errno set (ie caller has
to call get_errno()).
Signed-off-by: Peter Maydell
Reported-by: Timothy Edward Baldwin
From: Timothy E Baldwin
Check array bounds in host_to_target_errno() and target_to_host_errno().
Signed-off-by: Timothy Edward Baldwin
Message-id: 1441497448-32489-2-git-send-email-t.e.baldwi...@members.leeds.ac.uk
[PMM: Add
On Thu, Mar 03, 2016 at 04:03:16PM +0100, Markus Armbruster wrote:
> "Michael S. Tsirkin" writes:
>
> > On Thu, Mar 03, 2016 at 01:19:09PM +0200, Marcel Apfelbaum wrote:
> >> On 03/03/2016 12:45 PM, Michael S. Tsirkin wrote:
> >> >On Thu, Mar 03, 2016 at 12:12:27PM +0200, Marcel
On Thu, Mar 03, 2016 at 06:48:38PM +0300, Roman Kagan wrote:
> On Wed, Mar 02, 2016 at 05:10:58PM +0200, Michael S. Tsirkin wrote:
> > On Wed, Mar 02, 2016 at 06:08:41PM +0300, Denis V. Lunev wrote:
> > > On 02/17/2016 09:25 PM, Roman Kagan wrote:
> > > >Windows on UEFI systems is only capable of
At present, all DMA transfers complete inline (so a looping descriptor
queue will lock up the device). We also do not model pause/abort,
arbitrarion/priority, or debug features.
Signed-off-by: Andrew Baumann
---
Notes:
v2:
* avoid ldl_phys/stl_phys
*
The property channel driver now interfaces with the framebuffer device
to query and set framebuffer parameters. As a result of this, the "get
ARM RAM size" query now correctly returns the video RAM base address
(not total RAM size), and the ram-size property is no longer relevant
here.
At present only the core UART functions (data path for tx/rx) are
implemented, which is enough for UEFI to boot. The following
features/registers are unimplemented:
* Line/modem control
* Scratch register
* Extra control
* Baudrate
* SPI interfaces
Signed-off-by: Andrew Baumann
This patch series adds support for the AUX (second UART), framebuffer
and DMA controller on Raspberry Pi 2, and enables booting Windows on
this device. As with the previous series, it is heavily based on the
original (out of tree) work of Gregory Estrade, Stefan Weil and others
to support
The framebuffer occupies the upper portion of memory (64MiB by
default), but it can only be controlled/configured via a system
mailbox or property channel (to be added by a subsequent patch).
Signed-off-by: Andrew Baumann
---
Notes:
v2:
* avoid ldl_phys
Reviewed-by: Peter Maydell
Signed-off-by: Andrew Baumann
---
hw/arm/bcm2835_peripherals.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 6d66fa0..6ce9cd1 100644
On 3 March 2016 at 17:55, Programmingkid wrote:
>
> On Mar 3, 2016, at 10:49 AM, Gerd Hoffmann wrote:
>> Of course, when emulating a x86 guest with ps/2 keyboard you still run
>> into the problem that there might be no ps/2 scancode for certain keys.
>> But there is
On Mar 3, 2016, at 10:49 AM, Gerd Hoffmann wrote:
> Hi,
>
>>> number is modeled after pc scancodes, so you can't just pick random
>>> numbers.
>>
>> Really? I thought the only requirement was each scancode had to be unique.
>
> No, it's not. ps2 emulation assumes those codes are the real
>> +S390CPU *s390_new_cpu(MachineState *machine, int64_t id, Error **errp)
>> +{
>> +S390CPU *cpu = NULL;
>> +Error *local_err = NULL;
>
> Think the naming schema is "err" now.
>
>> +
>> +if (id >= max_cpus) {
>> +error_setg(errp, "Unable to add CPU: %" PRIi64
>> +
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