On 05/30/2016 04:43 PM, Peter Xu wrote:
On Mon, May 23, 2016 at 05:01:28PM +0300, Marcel Apfelbaum wrote:
This is a proposal on how to create the iommu with
'-device intel-iommu' instead of '-machine,iommu=on'.
The device is part of the machine properties because we wanted
to ensure it is
I'm the responder from the Qemu list. I reviewed that C code a while ago
when I stumbled over it. If someone helps me through the Qemu patch
acceptance process then I'm willing to provide a patch.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is
On Mon, May 23, 2016 at 05:01:28PM +0300, Marcel Apfelbaum wrote:
> This is a proposal on how to create the iommu with
> '-device intel-iommu' instead of '-machine,iommu=on'.
>
> The device is part of the machine properties because we wanted
> to ensure it is created before any other PCI device.
On Mon, May 30, 2016 at 02:43:22PM +0200, Jan Kiszka wrote:
> On 2016-05-30 12:31, Peter Xu wrote:
> > One flag is added to specify whether to enable IR for emulated IOMMU. By
> > default, interrupt remapping is not supportted. To enable it, we should
> > specify something like:
> >
> > $
ping...
for entire v3 version of the patchset.
http://patchwork.ozlabs.org/project/qemu-devel/list/?submitter=68462
- Jitendra
On Wed, May 18, 2016 at 4:50 PM, Jitendra Kolhe wrote:
> While measuring live migration performance for qemu/kvm guest, it was observed
> that
On 30.05.2016 12:12, Pavel Butsykin wrote:
On 27.05.2016 20:33, Stefan Hajnoczi wrote:
On Sat, May 14, 2016 at 03:45:50PM +0300, Denis V. Lunev wrote:
+qemu_co_mutex_lock(>lock);
+cluster_offset = \
+qcow2_alloc_compressed_cluster_offset(bs, sector_num << 9,
out_len);
The
On 2016-05-30 12:31, Peter Xu wrote:
> One flag is added to specify whether to enable IR for emulated IOMMU. By
> default, interrupt remapping is not supportted. To enable it, we should
> specify something like:
>
> $ qemu-system-x86_64 -M q35,iommu=on,intremap=on
Maybe it's time to move on to
On 30 May 2016 at 13:24, Dean <664543...@qq.com> wrote:
> I am writing a UIO linux driver for a virtio_mmio device and find out that
> all those virtio_mmio devices' registers are arrange in one single 4K aligned
> page.
> which makes writing an UIO driver hard since linux doesn't allow UIO
hi,all,
I am writing a UIO linux driver for a virtio_mmio device and find out that all
those virtio_mmio devices' registers are arrange in one single 4K aligned page.
which makes writing an UIO driver hard since linux doesn't allow UIO driver to
map a register space smaller than page size.
On Mon, May 30, 2016 at 8:40 AM, Alexandre DERUMIER wrote:
> Hi,
>
>>>To avoid any locks in qemu backend and not to introduce thread safety
>>>into qemu block-layer I open same backend device several times, one
>>>device per one MQ. e.g. the following is the stack for a
at least bdrv_co_preadv/pwritev expect this.
Signed-off-by: Peter Lieven
---
block.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block.c b/block.c
index 736432f..f54bc25 100644
--- a/block.c
+++ b/block.c
@@ -1018,7 +1018,7 @@ static int
On Sat, May 28, 2016 at 12:27 AM, Stefan Hajnoczi wrote:
> On Fri, May 27, 2016 at 01:55:04PM +0200, Roman Pen wrote:
>> Hello, all.
>>
>> This is RFC because mostly this patch is a quick attempt to get true
>> multithreaded multiqueue support for a block device with native
John Snow writes:
> It already got applied, but I can change it to your preference. (Always
> return an -errno and an Error, delete-and-free when we don't care about
> it...)
I think that would be an improvement. This is advice, not a demand :)
On 30 May 2016 at 02:51, Jason Wang wrote:
> git grep shows lots of places. Is it ok to send a new version of pull
> request with Dmitry's fix first?
Sure; I was talking about the audit as a later cleanup thing
we should do at some point, not something to do immediately.
--
Of course using virtual usb controller is normal,The situation of the
problems is to use the passthrough usb devices
--
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https://bugs.launchpad.net/bugs/1586611
Title:
usb-hub can not be
the libnfs read and write functions already take byte arguments
so thats an easy change.
Signed-off-by: Peter Lieven
---
block/nfs.c | 40 +++-
1 file changed, 19 insertions(+), 21 deletions(-)
diff --git a/block/nfs.c b/block/nfs.c
index
Peter Maydell writes:
> On 25 May 2016 at 11:58, xiaoqiang zhao wrote:
>> * drop qemu_char_get_next_serial and use chardev prop
>> * add pl011_create wrapper function to create pl011 uart device
>> * change affected board code to use the new way
>>
in a read-modify-write cycle a small request might cause
head and tail to fall into the same aligned block. Currently
QEMU reads the same block twice in this case which is
not necessary.
Signed-off-by: Peter Lieven
---
v1->v2: following Paolos suggestions to simplify the if
On Thu, May 26, 2016 at 03:55:18PM +0100, Peter Maydell wrote:
> This series implements emulation of the GICv3 interrupt controller.
> It is based to some extent on previous patches from Shlomo and
> Pavel, but the bulk of it has turned out to be new code. (The
> combination of changing the
In the past, we are doing gsi route commit for each irqchip route
update. This is not efficient if we are updating lots of routes in the
same time. This patch removes the committing phase in
kvm_irqchip_update_msi_route(). Instead, we do explicit commit after all
routes updated.
Signed-off-by:
From: Jan Kiszka
As neither QEMU nor KVM support more than 255 CPUs so far, this is
simple: we only need to switch the destination ID translation in
vtd_remap_irq_get if EIME is set.
Once CFI support is there, it will have to take EIM into account as
well. So far,
From: Radim Krčmář
Linux guests do not gracefully handle cases when the invalidation mask
they wanted is not supported, probably because real hardware always
allowed all.
We can just say that all 16 masks are supported, because both
ioapic_iec_notifier and
One flag is added to specify whether to enable IR for emulated IOMMU. By
default, interrupt remapping is not supportted. To enable it, we should
specify something like:
$ qemu-system-x86_64 -M q35,iommu=on,intremap=on
To be more clear, the following command:
$ qemu-system-x86_64 -M q35,iommu=on
On Mon, May 30, 2016 at 06:31:13PM +0800, Peter Xu wrote:
> This is v8 patchset for Intel IOMMU IR support. If to test it with
> pci-bridges, we still need to apply the following fix to solve a known
> issue which will hang the guest:
>
> - [PATCH v4] pci: fix pci_requester_id()
>
>
Adding two hooks to be notified when adding/removing msi routes. There
are two kinds of MSI routes:
- in kvm_irqchip_add_irq_route(): before assigning IRQFD. Used by
vhost, vfio, etc.
- in kvm_irqchip_send_msi(): when sending direct MSI message, if
direct MSI not allowed, we will first
One more IEC notifier is added to let msi routes know about the IEC
changes. When interrupt invalidation happens, all registered msi routes
will be updated for all PCI devices.
Since both vfio and vhost are possible gsi route consumers, this patch
will go one step further to keep them safe in
This patch introduces x86 IOMMU IEC (Interrupt Entry Cache)
invalidation notifier list. When vIOMMU receives IEC invalidate
request, all the registered units will be notified with specific
invalidation requests.
Intel IOMMU is the first provider that generates such a event.
Signed-off-by: Peter
Let IOAPIC the first consumer of x86 IOMMU IEC invalidation
notifiers. This is only used for split irqchip case, when vIOMMU
receives IR invalidation requests, IOAPIC will be notified to update
kernel irq routes. For simplicity, we just update all IOAPIC routes,
even if the invalidated entries are
This patch enables SID validation. Invalid interrupts will be dropped.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 69 ---
include/hw/i386/intel_iommu.h | 17 +++
2 files changed, 75 insertions(+), 11
Changing the original MSIMessage parameter in kvm_irqchip_add_msi_route
into the vector number. Vector index provides more information than the
MSIMessage, we can retrieve the MSIMessage using the vector easily. This
will avoid fetching MSIMessage every time before adding MSI routes.
Meanwhile,
In split irqchip mode, IOAPIC is working in user space, only update
kernel irq routes when entry changed. When IR is enabled, we directly
update the kernel with translated messages. It works just like a kernel
cache for the remapping entries.
Since KVM irqfd is using kernel gsi routes to deliver
This patch translates all IOAPIC interrupts into MSI ones. One pseudo
ioapic address space is added to transfer the MSI message. By default,
it will be system memory address space. When IR is enabled, it will be
IOMMU address space.
Currently, only emulated IOAPIC is supported.
Idea suggested by
Abstract IOAPIC entry parsing logic into a helper function.
Signed-off-by: Peter Xu
---
hw/intc/ioapic.c | 110 +++
1 file changed, 54 insertions(+), 56 deletions(-)
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index
Remove VT-d calls in common q35 codes. Instead, we provide a general
find_add_as() for x86-iommu type.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 7 +--
hw/pci-host/q35.c | 10 --
include/hw/i386/intel_iommu.h | 5 -
This patch enables interrupt remapping for PCI devices.
To play the trick, one memory region "iommu_ir" is added as child region
of the original iommu memory region, covering range 0xfeeX (which is
the address range for APIC). All the writes to this range will be taken
as MSI, and translation
Instead of searching the device tree every time, one static variable is
declared for the default system x86 IOMMU device. Also, some VT-d
macros are replaced by x86 ones.
Signed-off-by: Peter Xu
---
hw/i386/acpi-build.c | 9 ++---
hw/i386/intel_iommu.c
Defined Interrupt Remap Table Address register to store IR table
pointer. Also, do proper handling on global command register writes to
store table pointer and its size.
One more debug flag "DEBUG_IR" is added for interrupt remapping.
Signed-off-by: Peter Xu
---
To enable interrupt remapping for intel IOMMU device, each IOAPIC device
in the system reported via ACPI MADT must be explicitly enumerated under
one specific remapping hardware unit. This patch adds the root-complex
IOAPIC into the default DMAR device.
Please refer to VT-d spec 8.3.1.1 for more
Introducing parent class for intel-iommu devices named "x86-iommu". This
is preparation work to abstract shared functionalities out from Intel
and AMD IOMMUs. Currently, only the parent class is introduced. It does
nothing yet.
Signed-off-by: Peter Xu
---
Adding translation fault definitions for interrupt remapping. Please
refer to VT-d spec section 7.1.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu_internal.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/hw/i386/intel_iommu_internal.h
Handle writting to IRE bit in global command register.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 00b873c..4d14124 100644
---
Queued invalidation is required for IR. This patch add basic support for
interrupt cache invalidate requests. Since we currently have no IR cache
implemented yet, we can just skip all interrupt cache invalidation
requests for now.
Signed-off-by: Peter Xu
---
Several data structs are defined to better support the rest of the
patches: IRTE to parse remapping table entries, and IOAPIC/MSI related
structure bits to parse interrupt entries to be filled in by guest
kernel.
Signed-off-by: Peter Xu
---
include/hw/i386/intel_iommu.h | 74
This is v8 patchset for Intel IOMMU IR support. If to test it with
pci-bridges, we still need to apply the following fix to solve a known
issue which will hang the guest:
- [PATCH v4] pci: fix pci_requester_id()
https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg02769.html
V8 mostly
Enable IR in IOMMU Extended Capability register.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 7 +++
hw/i386/intel_iommu_internal.h | 2 ++
2 files changed, 9 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 4b0558e..17668d6
Introduce iommu_intr in MachineState to show whether IOMMU IR is
enabled. By default, IR is off.
In ACPI DMA remapping report structure, enable INTR flag when specified.
Signed-off-by: Peter Xu
---
hw/core/machine.c | 2 ++
hw/i386/acpi-build.c | 12
I am trying to boot a 64 bit image using KVM. By default I understand
'qemu64' is the guest processor.
What I am trying is to not to expose certain features like sse, sse2 etc.
Even though the change the same in 'builtin_x86_defs' for qemu64, i still
see these features in the guest cpu ?
Am i
On 05/30/2016 06:00 PM, Alberto Garcia wrote:
On Mon 30 May 2016 08:49:18 AM CEST, Changlong Xie wrote:
- Water leaks from the bucket at a rate of 100 IOPS.
- Water can be added to the bucket at a rate of 2000 IOPS.
- The size of the bucket is 2000 x 60 = 12
- - If
Am 30.05.2016 um 12:06 schrieb Kevin Wolf:
Am 30.05.2016 um 11:53 hat Peter Lieven geschrieben:
Am 30.05.2016 um 11:47 schrieb Kevin Wolf:
Am 30.05.2016 um 11:30 hat Peter Lieven geschrieben:
Am 30.05.2016 um 10:24 schrieb Kevin Wolf:
Am 30.05.2016 um 08:25 hat Peter Lieven geschrieben:
Am
Am 30.05.2016 um 11:53 hat Peter Lieven geschrieben:
> Am 30.05.2016 um 11:47 schrieb Kevin Wolf:
> >Am 30.05.2016 um 11:30 hat Peter Lieven geschrieben:
> >>Am 30.05.2016 um 10:24 schrieb Kevin Wolf:
> >>>Am 30.05.2016 um 08:25 hat Peter Lieven geschrieben:
> Am 27.05.2016 um 10:55 schrieb
On Mon 30 May 2016 08:49:18 AM CEST, Changlong Xie wrote:
>>> - Water leaks from the bucket at a rate of 100 IOPS.
>>> - Water can be added to the bucket at a rate of 2000 IOPS.
>>> - The size of the bucket is 2000 x 60 = 12
>>> - - If 'iops-total-max-length' is unset then the
Am 30.05.2016 um 11:47 schrieb Kevin Wolf:
Am 30.05.2016 um 11:30 hat Peter Lieven geschrieben:
Am 30.05.2016 um 10:24 schrieb Kevin Wolf:
Am 30.05.2016 um 08:25 hat Peter Lieven geschrieben:
Am 27.05.2016 um 10:55 schrieb Kevin Wolf:
Am 27.05.2016 um 02:36 hat Fam Zheng geschrieben:
On
Ping
Any comments?
Thanks in advance.
On Tue, 2016-05-17 at 18:18 +0800, Wei Jiangang wrote:
> The first had been reviewed.
> The second had been posted last month, but no feedback.
> They're similar, so resend them together.
>
> Wei Jiangang (2):
> hw/pci-bridge: Convert pxb
This creates a new BlockBackend for copying data from an images to the
migration stream on the source host. All I/O for block migration goes
through BlockBackend now.
Signed-off-by: Kevin Wolf
---
migration/block.c | 124 ++
Eduardo Habkost writes:
> Just noticed that I hadn't replied to this yet. Sorry for the
> long delay!
>
> On Thu, May 12, 2016 at 09:46:25AM +0200, Markus Armbruster wrote:
>> Eduardo Habkost writes:
> [...]
>> > ##
>> > # @CpuDefinitionInfo:
>> > #
>>
From: Dmitry Fleytman
Code that will be shared moved to a separate files.
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
MAINTAINERS| 5 +
Am 30.05.2016 um 11:30 hat Peter Lieven geschrieben:
> Am 30.05.2016 um 10:24 schrieb Kevin Wolf:
> >Am 30.05.2016 um 08:25 hat Peter Lieven geschrieben:
> >>Am 27.05.2016 um 10:55 schrieb Kevin Wolf:
> >>>Am 27.05.2016 um 02:36 hat Fam Zheng geschrieben:
> On Thu, 05/26 11:20, Paolo Bonzini
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
tests/Makefile | 3 +
tests/e1000e-test.c | 480
From: Dmitry Fleytman
This patch drops "vmx" prefix from packet abstractions names
to emphasize the fact they are generic and not tied to any
specific network device.
These abstractions will be reused by e1000e emulation implementation
introduced by following
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
hw/net/e1000_regs.h | 345 +++-
1 file changed, 342
From: Dmitry Fleytman
This patch extends the TX/RX packet abstractions with features that will
be used by the e1000e device implementation.
Changes are:
1. Support iovec lists for RX buffers
2. Deeper RX packets parsing
3. Loopback option for TX
This converts the loading part of block migration to use BlockBackend
interfaces rather than accessing the BlockDriverState directly.
Note that this takes a lazy shortcut. We should really use a separate
BlockBackend that is configured for the migration rather than for the
guest (e.g.
Am 30.05.2016 um 10:24 schrieb Kevin Wolf:
Am 30.05.2016 um 08:25 hat Peter Lieven geschrieben:
Am 27.05.2016 um 10:55 schrieb Kevin Wolf:
Am 27.05.2016 um 02:36 hat Fam Zheng geschrieben:
On Thu, 05/26 11:20, Paolo Bonzini wrote:
On 26/05/2016 10:30, Fam Zheng wrote:
This doesn't look too
From: Dmitry Fleytman
To make this device and network packets
abstractions ready for IOMMU.
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
hw/net/net_tx_pkt.c | 16
Hello All,
This is v6 of e1000e series.
For convenience, the same patches are available at:
https://github.com/daynix/qemu-e1000e/tree/e1000e-submit-v6
Best regards,
Dmitry.
Changes since v5:
1. Fixed build failure on old clang versions
2. Added patch that fixes unaligned access in
On Mon, May 30, 2016 at 12:16 PM, Peter Xu wrote:
> On Mon, May 30, 2016 at 11:54:52AM +0300, David Kiarie wrote:
>> On Mon, May 30, 2016 at 11:14 AM, Peter Xu wrote:
>> > On Mon, May 30, 2016 at 07:56:16AM +0200, Jan Kiszka wrote:
>> >> On 2016-05-30 07:45,
Signed-off-by: Changlong Xie
---
include/block/blockjob.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/block/blockjob.h b/include/block/blockjob.h
index 86d2807..00ac418 100644
--- a/include/block/blockjob.h
+++ b/include/block/blockjob.h
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
include/net/checksum.h | 45 +
1 file changed, 45
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
hw/pci/pcie.c | 10 ++
include/hw/pci/pcie.h | 1 +
2 files changed, 11 insertions(+)
Users outside of the block layer shouldn't directly use BlockDriverState for
issuing their I/O requests, but go through a BlockBackend to do so. Block
migration ('migrate -b') is (one of?) the last remaining users that need to be
converted.
Kevin Wolf (2):
migration/block: Convert load to
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
hw/net/rtl8139.c | 5 -
include/net/eth.h | 8
2 files changed, 8 insertions(+), 5
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
hw/net/vmxnet3.c | 8
hw/net/vmxnet_debug.h | 3 ---
2 files changed, 4 insertions(+), 7
From: Dmitry Fleytman
Added support for PCIe CAP v1, while reusing some of the existing v2
infrastructure.
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
hw/pci/pcie.c
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
hw/net/vmxnet3.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git
From: Dmitry Fleytman
These macros will be used by future commits introducing
e1000e device emulation and by vmxnet3 tracing code.
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
include/hw/pci/pci_regs.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Dmitry Fleytman
Replace legacy cpu_to_le64w()/le64_to_cpup()
calls with stq_le_p()/ldq_le_p().
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
include/hw/pci/pci.h |
From: Dmitry Fleytman
This function will be used by e1000e device code.
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
---
hw/pci/msix.c | 2 +-
include/hw/pci/msix.h
Signed-off-by: Kevin Wolf
---
block/io.c| 11 ---
include/block/block.h | 3 ---
trace-events | 1 -
3 files changed, 15 deletions(-)
diff --git a/block/io.c b/block/io.c
index 2d832aa..7ac9897 100644
--- a/block/io.c
+++ b/block/io.c
@@ -1865,17
On Mon, May 30, 2016 at 11:54:52AM +0300, David Kiarie wrote:
> On Mon, May 30, 2016 at 11:14 AM, Peter Xu wrote:
> > On Mon, May 30, 2016 at 07:56:16AM +0200, Jan Kiszka wrote:
> >> On 2016-05-30 07:45, Peter Xu wrote:
[...]
> >> >
> >> > I assume you mean when host cpu is big
On 27.05.2016 20:33, Stefan Hajnoczi wrote:
On Sat, May 14, 2016 at 03:45:50PM +0300, Denis V. Lunev wrote:
+qemu_co_mutex_lock(>lock);
+cluster_offset = \
+qcow2_alloc_compressed_cluster_offset(bs, sector_num << 9, out_len);
The backslash isn't necessary for wrapping lines in
hello everyone
I'm trying to run qemu for powerpc architecture but either
*1/* i got a black screen with this sentence " QEMU 2.4.0.1 monitor - type
help for more information"
(QEMU)
if i run this command ./ppc-softmmu/qemu-system-ppc -M ppce500 -kernel
On Mon, May 30, 2016 at 11:14 AM, Peter Xu wrote:
> On Mon, May 30, 2016 at 07:56:16AM +0200, Jan Kiszka wrote:
>> On 2016-05-30 07:45, Peter Xu wrote:
>> > On Sun, May 29, 2016 at 11:21:35AM +0300, David Kiarie wrote:
>> > [...]
>> +
>> +/* Programming format for
On Fri, 27 May 2016 17:32:34 -0300
Eduardo Habkost wrote:
> On Tue, May 24, 2016 at 03:22:27PM +0200, Igor Mammedov wrote:
> > On Tue, 24 May 2016 09:34:05 -0300
> > Eduardo Habkost wrote:
> >
> > > On Tue, May 24, 2016 at 02:17:03PM +0200, Igor
Signed-off-by: Gerd Hoffmann
---
ui/console.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/ui/console.c b/ui/console.c
index 6402010..581480f 100644
--- a/ui/console.c
+++ b/ui/console.c
@@ -1457,16 +1457,21 @@ bool
Commit "ca58b45 ui/virtio-gpu: add and use qemu_create_displaysurface_pixman"
breaks scanouts which use a region of the underlying resource only.
So, we need another way to handle the underlying issue. Lets create a
new pixman image, grab a reference on the pixman providing the
underlying
Am 30.05.2016 um 08:25 hat Peter Lieven geschrieben:
> Am 27.05.2016 um 10:55 schrieb Kevin Wolf:
> >Am 27.05.2016 um 02:36 hat Fam Zheng geschrieben:
> >>On Thu, 05/26 11:20, Paolo Bonzini wrote:
> >>>On 26/05/2016 10:30, Fam Zheng wrote:
> >>This doesn't look too wrong... Should the right
On 05/30/2016 12:59 AM, peer.ad...@c-lab.de wrote:
> From: Peer Adelt
>
> If D[15] is != sign_ext(const4) then PC will be set to (PC +
> zero_ext(disp4 + 16)).
>
> Signed-off-by: Peer Adelt
> ---
> target-tricore/translate.c | 1 +
>
Try detach the usb-hub device by the virsh detach-device usb-hub.xml?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1586611
Title:
usb-hub can not be detached when detach usb device from VM
On Mon, May 30, 2016 at 07:56:16AM +0200, Jan Kiszka wrote:
> On 2016-05-30 07:45, Peter Xu wrote:
> > On Sun, May 29, 2016 at 11:21:35AM +0300, David Kiarie wrote:
> > [...]
> +
> +/* Programming format for MSI/MSI-X addresses */
> +union VTD_IR_MSIAddress {
> +struct {
>
I found that when I attached an usb device to the VM, the VM would add an
usb-hub automatically if there was no usb-hub.
After adding an usb-hub,the VM assigned a port to the actual usb device. When
detaching the usb device,the qemu only detach the port,without detaching the
usb-hub.So when
On Wed, May 25, 2016 at 05:07:48PM +0100, Joel Holdsworth wrote:
> This patch-set includes Peter Angelatos's previous patch-set [1] and
> adds code to pass arguments for setting the environment variables,
> passing the interpeter prefix, and passing the strace option.
Considering the messiness
Sanity checks are applied when the fifo is enabled by the guest
(SVGA_REG_CONFIG_DONE write). Which doesn't help much if the guest
changes the fifo registers afterwards. Move the checks to
vmsvga_fifo_length so they are done each time qemu is about to read
from the fifo.
Fixes: CVE-2016-4454
The fifo is normal ram. So kvm vcpu threads and qemu iothread can
access the fifo in parallel without syncronization. Which in turn
implies we can't use the fifo pointers in-place because the guest
can try changing them underneath us. So add shadows for them, to
make sure the guest can't modify
On 05/30/2016 12:59 AM, peer.ad...@c-lab.de wrote:
> From: Peer Adelt
>
> Puts the content of data register D[a] into E[c][63:32] and the
> content of data register D[b] into E[c][31:0].
>
> Signed-off-by: Peer Adelt
> ---
> target-tricore/translate.c
Hi,
Here comes a series for the vmware svga, fixing security issues in the
fifo handling:
CVE-2016-4453 qemu: Infinite loop in vmsvga_fifo_run() function
CVE-2016-4454 qemu: Out-of-bounds read in vmsvga_fifo_read_raw() function
please review,
Gerd
Gerd Hoffmann (4):
vmsvga: move
vmsvga_fifo_run is called in regular intervals (on each display update)
and will resume where it left off. So we can simply exit the loop,
without having to worry about how processing will continue.
Fixes: CVE-2016-4453
Cc: P J P
Reported-by: 李强
Make sure all fifo ptrs are within range.
Fixes: CVE-2016-4454
Cc: P J P
Reported-by: 李强
Signed-off-by: Gerd Hoffmann
---
hw/display/vmware_vga.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
On 05/30/2016 12:59 AM, peer.ad...@c-lab.de wrote:
> From: Peer Adelt
>
> Converts a 32-bit floating point number to an unsigned int. The
> result is rounded towards zero.
>
> Signed-off-by: Peer Adelt
> ---
> target-tricore/fpu_helper.c | 20
On 05/25/2016 07:11 AM, Eric Blake wrote:
On 05/24/2016 05:59 AM, Alberto Garcia wrote:
Signed-off-by: Alberto Garcia
---
docs/throttle.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Eric Blake
diff --git
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