Re: [Qemu-devel] [RFC 14/14] Add virtio-gpu vhost-user backend

2016-06-05 Thread Gerd Hoffmann
On Sa, 2016-06-04 at 23:33 +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Add to virtio-gpu devices a "vhost-user" property. When set, the > associated vhost-user backend is used to handle the virtio rings. > > For now, a socketpair is created for the backend to share th

Re: [Qemu-devel] [PATCH 08/10] target-avr: adding instruction translation

2016-06-05 Thread Michael Rolnik
On Mon, Jun 6, 2016 at 2:34 AM, Richard Henderson wrote: > On 06/05/2016 02:47 PM, Michael Rolnik wrote: > >> Is there a reason this code isn't going into translate.c? >> You wouldn't need the declarations in translate-inst.h or translate.h. >> >> I see here two levels of logic >> a. inst

[Qemu-devel] [Bug 1581796] Re: console-gl.c:96:surface_gl_create_texture:code should not be reached

2016-06-05 Thread T. Huth
OK, thanks for checking. Pixel format = 0x20020888 is the PIXMAN_x8r8g8b8 format, if I've got the pixman.h header right. So could you please try the following patch to see whether it fixes the issue for you? diff --git a/ui/console-gl.c b/ui/console-gl.c --- a/ui/console-gl.c +++ b/ui/console-gl.c

[Qemu-devel] [Bug 1581796] Re: console-gl.c:96:surface_gl_create_texture:code should not be reached

2016-06-05 Thread T. Huth
Uh, seems like the web interface ate up the spaces in my previous comment. Here's the patch as attachment instead. ** Patch added: "Patch for ui/console-gl.c" https://bugs.launchpad.net/qemu/+bug/1581796/+attachment/4677860/+files/console-gl.patch -- You received this bug notification becaus

Re: [Qemu-devel] [PATCH qemu v17 10/12] vfio/spapr: Create DMA window dynamically (SPAPR IOMMU v2)

2016-06-05 Thread Alexey Kardashevskiy
On 03/06/16 17:37, David Gibson wrote: > On Wed, Jun 01, 2016 at 06:57:41PM +1000, Alexey Kardashevskiy wrote: >> New VFIO_SPAPR_TCE_v2_IOMMU type supports dynamic DMA window management. >> This adds ability to VFIO common code to dynamically allocate/remove >> DMA windows in the host kernel when n

Re: [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Mark Cave-Ayland
On 06/06/16 07:30, Cedric Le Goater wrote: > On 06/06/2016 08:27 AM, Cédric Le Goater wrote: >> On 06/06/2016 12:26 AM, Mark Cave-Ayland wrote: >>> On 05/06/16 18:41, Cédric Le Goater wrote: >>> Hello Mark, On 06/03/2016 03:52 PM, Mark Cave-Ayland wrote: > On 03/06/16 13:11, Céd

Re: [Qemu-devel] [RFC 13/14] vhost-user: add vhost_user_gpu_set_socket()

2016-06-05 Thread Gerd Hoffmann
On Sa, 2016-06-04 at 23:33 +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Add a new vhost-user message to give a unix socket for gpu updates to a > vhost-user backend. --verbose please. cheers, Gerd

Re: [Qemu-devel] [RFC 11/14] console: add dpy_gl_scanout2()

2016-06-05 Thread Gerd Hoffmann
Hi, > @@ -218,6 +218,11 @@ typedef struct DisplayChangeListenerOps { > void (*dpy_gl_scanout)(DisplayChangeListener *dcl, > uint32_t backing_id, bool backing_y_0_top, > uint32_t x, uint32_t y, uint32_t w, uint32_t h); > +void (*dpy

Re: [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Cedric Le Goater
On 06/06/2016 08:27 AM, Cédric Le Goater wrote: > On 06/06/2016 12:26 AM, Mark Cave-Ayland wrote: >> On 05/06/16 18:41, Cédric Le Goater wrote: >> >>> Hello Mark, >>> >>> On 06/03/2016 03:52 PM, Mark Cave-Ayland wrote: On 03/06/16 13:11, Cédric Le Goater wrote: > This is follow up to

Re: [Qemu-devel] [Qemu-ppc] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Mark Cave-Ayland
On 06/06/16 05:20, Benjamin Herrenschmidt wrote: > On Mon, 2016-06-06 at 13:55 +1000, Benjamin Herrenschmidt wrote: >> >> I'm not sure that 32-bit patch is correct. We shouldn't have to flush >> on IR/DR transitions at all, that's the whole point of the split I/D >> code. >> >> I think something e

Re: [Qemu-devel] [RFC PATCH v4 1/3] Mediated device Core driver

2016-06-05 Thread Neo Jia
On Mon, Jun 06, 2016 at 02:01:48PM +0800, Dong Jia wrote: > On Mon, 6 Jun 2016 10:57:49 +0530 > Kirti Wankhede wrote: > > > > > > > On 6/3/2016 2:27 PM, Dong Jia wrote: > > > On Wed, 25 May 2016 01:28:15 +0530 > > > Kirti Wankhede wrote: > > > > > > > > > ...snip... > > > > > >> +struct phy

Re: [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Cédric Le Goater
On 06/06/2016 12:26 AM, Mark Cave-Ayland wrote: > On 05/06/16 18:41, Cédric Le Goater wrote: > >> Hello Mark, >> >> On 06/03/2016 03:52 PM, Mark Cave-Ayland wrote: >>> On 03/06/16 13:11, Cédric Le Goater wrote: >>> This is follow up to complete the serie "ppc: preparing pnv landing (roun

Re: [Qemu-devel] [RFC 05/14] Add vhost-user backend to virtio-input-host

2016-06-05 Thread Gerd Hoffmann
On Sa, 2016-06-04 at 23:33 +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Learn to use a vhost-user as a virtio-input backend. Usage: > > -object vhost-user-backend,id=vuid -device > virtio-input-host-pci,vhost-user=vuid IMO this should be a separate device, named "vir

Re: [Qemu-devel] [PATCH qemu v17 07/12] vfio: spapr: Add DMA memory preregistering (SPAPR IOMMU v2)

2016-06-05 Thread Alexey Kardashevskiy
On 04/06/16 02:13, Alex Williamson wrote: > On Wed, 1 Jun 2016 18:57:38 +1000 > Alexey Kardashevskiy wrote: > >> This makes use of the new "memory registering" feature. The idea is >> to provide the userspace ability to notify the host kernel about pages >> which are going to be used for DMA. Ha

Re: [Qemu-devel] [RFC PATCH v4 1/3] Mediated device Core driver

2016-06-05 Thread Dong Jia
On Mon, 6 Jun 2016 10:57:49 +0530 Kirti Wankhede wrote: > > > On 6/3/2016 2:27 PM, Dong Jia wrote: > > On Wed, 25 May 2016 01:28:15 +0530 > > Kirti Wankhede wrote: > > > > > > ...snip... > > > >> +struct phy_device_ops { > >> + struct module *owner; > >> + const struct attribute_group *

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

2016-06-05 Thread Chris McCarron
I will try an blacklist the sound module in the unRaid kernel. Waiting on instructions on how to do it. Chris -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1580459 Title: Windows (10?) guest free

Re: [Qemu-devel] [PATCH qemu v17 11/12] spapr_pci/spapr_pci_vfio: Support Dynamic DMA Windows (DDW)

2016-06-05 Thread David Gibson
On Wed, Jun 01, 2016 at 06:57:42PM +1000, Alexey Kardashevskiy wrote: > This adds support for Dynamic DMA Windows (DDW) option defined by > the SPAPR specification which allows to have additional DMA window(s) > > The "ddw" property is enabled by default on a PHB but for compatibility > the pserie

Re: [Qemu-devel] [for-2.7 PATCH v3 15/15] spapr: implement query-hotpluggable-cpus callback

2016-06-05 Thread David Gibson
On Thu, May 12, 2016 at 09:18:25AM +0530, Bharata B Rao wrote: > From: Igor Mammedov > > It returns a list of present/possible to hotplug CPU > objects with a list of properties to use with > device_add. > > in spapr case returned list would looks like: > -> { "execute": "query-hotpluggable-cpus

Re: [Qemu-devel] [for-2.7 PATCH v3 14/15] hmp: Add 'info hotpluggable-cpus' HMP command

2016-06-05 Thread David Gibson
On Thu, May 12, 2016 at 09:18:24AM +0530, Bharata B Rao wrote: > This is the HMP equivalent for QMP query-hotpluggable-cpus. > > Signed-off-by: Bharata B Rao Reviewed-by: David Gibson > --- > hmp-commands-info.hx | 14 ++ > hmp.c| 41 +++

Re: [Qemu-devel] [for-2.7 PATCH v3 13/15] QMP: Add query-hotpluggable-cpus

2016-06-05 Thread David Gibson
On Thu, May 12, 2016 at 09:18:23AM +0530, Bharata B Rao wrote: > From: Igor Mammedov > > It will allow mgmt to query present and hotpluggable CPU objects, > it is required from a target platform that wishes to support command > to implement and set MachineClass.query_hotpluggable_cpus callback, >

Re: [Qemu-devel] [RFC PATCH v4 1/3] Mediated device Core driver

2016-06-05 Thread Kirti Wankhede
On 6/3/2016 2:27 PM, Dong Jia wrote: > On Wed, 25 May 2016 01:28:15 +0530 > Kirti Wankhede wrote: > > > ...snip... > >> +struct phy_device_ops { >> +struct module *owner; >> +const struct attribute_group **dev_attr_groups; >> +const struct attribute_group **mdev_attr_groups; >>

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

2016-06-05 Thread jimrif
I'm not really sure what the other similar bug was, but what I was experiencing was a Win10 VM locking up the host machine upon shutdown of the VM after several minutes of gaming (or even several hours of youtube/netflix). It didn't happen all of the time, but most of the time after the VM had be

Re: [Qemu-devel] [PATCH v3 2/3] IOMMU: change iommu_op->translate's is_write to flags, add support to NO_FAIL flag mode

2016-06-05 Thread Peter Xu
On Sat, May 21, 2016 at 07:19:49PM +0300, Aviv B.D wrote: [...] > static void vtd_record_frcd(IntelIOMMUState *s, uint16_t index, > uint16_t source_id, hwaddr addr, > -VTDFaultReason fault, bool is_write) > +VTDFa

Re: [Qemu-devel] [PATCH v3 1/3] IOMMU: add VTD_CAP_CM to vIOMMU capability exposed to guest

2016-06-05 Thread Peter Xu
On Thu, Jun 02, 2016 at 03:14:36PM +0200, Jan Kiszka wrote: > On 2016-06-02 15:00, Alex Williamson wrote: > > On Thu, 2 Jun 2016 16:44:39 +0800 > > Peter Xu wrote: [...] > >> There should be more than one way to make it optional. Which is > >> better? What I can think of: > >> > >> (Assume we have

Re: [Qemu-devel] [Qemu-ppc] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Benjamin Herrenschmidt
On Mon, 2016-06-06 at 13:55 +1000, Benjamin Herrenschmidt wrote: > > I'm not sure that 32-bit patch is correct. We shouldn't have to flush > on IR/DR transitions at all, that's the whole point of the split I/D > code. > > I think something else is wrong. Note: With whatever's in this branch, Ope

Re: [Qemu-devel] [Qemu-ppc] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Benjamin Herrenschmidt
On Sun, 2016-06-05 at 19:41 +0200, Cédric Le Goater wrote: >  > Here is a fix I think. Could you give it a try ?  This is somewhat wrong... > commit cd0c6f473532 ('ppc: Do some batching of TCG tlb flushes') > introduced an optimisation to flush TLBs only when a context > synchronizing event is re

Re: [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Benjamin Herrenschmidt
On Mon, 2016-06-06 at 11:17 +1000, David Gibson wrote: > On Fri, Jun 03, 2016 at 02:11:17PM +0200, Cédric Le Goater wrote: > > > > This is follow up to complete the serie "ppc: preparing pnv landing > > (round 2)" plus a little fix on instruction privileges. > > > > Tested on a POWER8 pserie gues

Re: [Qemu-devel] [RFC PATCH v1 3/3] spapr: spapr: Work around the memory hotplug failure with DDW

2016-06-05 Thread Bharata B Rao
On Fri, Jun 03, 2016 at 05:10:48PM +1000, David Gibson wrote: > On Fri, Jun 03, 2016 at 11:19:44AM +0530, Bharata B Rao wrote: > > Memory hotplug can fail for some combinations of RAM and maxmem when > > DDW is enabled in the presence of devices like nec-usb-xhci. DDW depends > > on maximum address

[Qemu-devel] [Bug 1586611] Re: usb-hub can not be detached when detach usb device from VM

2016-06-05 Thread Michael liu
** Changed in: qemu Assignee: (unassigned) => Michael liu (ztehypervisor) -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1586611 Title: usb-hub can not be detached when detach usb device from

Re: [Qemu-devel] [RFC PATCH v4 1/3] Mediated device Core driver

2016-06-05 Thread Dong Jia
On Fri, 3 Jun 2016 09:40:16 + "Tian, Kevin" wrote: > > From: Dong Jia [mailto:bjsdj...@linux.vnet.ibm.com] > > Sent: Friday, June 03, 2016 4:58 PM > > > > > > ...snip... > > > > > +struct phy_device_ops { > > > + struct module *owner; > > > + const struct attribute_group **dev_attr_group

Re: [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread David Gibson
On Sun, Jun 05, 2016 at 07:41:50PM +0200, Cédric Le Goater wrote: > Hello Mark, > > On 06/03/2016 03:52 PM, Mark Cave-Ayland wrote: > > On 03/06/16 13:11, Cédric Le Goater wrote: > > > >> This is follow up to complete the serie "ppc: preparing pnv landing > >> (round 2)" plus a little fix on inst

Re: [Qemu-devel] Bug in ppc/BookE wait instruction

2016-06-05 Thread David Gibson
On Fri, Jun 03, 2016 at 05:45:49PM +0200, Jakub Horak wrote: > Hello, > I think there's a bug in "wait" instruction code generator for PowerPC > architecture. It doesn't make sense to store a non-initialized register. > > Best regards, > Jakub Horak The fix looks correct, but I need a Signed-off-

Re: [Qemu-devel] [PATCH 0/2] macio/dbdma: use DMA memory access helpers

2016-06-05 Thread David Gibson
On Sun, Jun 05, 2016 at 11:36:41PM +0100, Mark Cave-Ayland wrote: > This is just a small patchset to move the macio/dbdma interfaces over from > using cpu_physical_memory_read/write to dma_memory_read/write. > > Signed-off-by: Mark Cave-Ayland > > Mark Cave-Ayland (2): > macio: use DMA memory

Re: [Qemu-devel] [PATCH 3/3] ppc: fix hrfid, tlbia and slbia privilege

2016-06-05 Thread David Gibson
On Sat, Jun 04, 2016 at 10:24:28AM +0200, Thomas Huth wrote: > On 03.06.2016 14:11, Cédric Le Goater wrote: > > commit 74693da98894 ('ppc: tlbie, tlbia and tlbisync are HV only') > > introduced some extra checks on the instruction privilege. slbia was > > changed wrongly and hrfid, tlbia were forgo

Re: [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread David Gibson
On Fri, Jun 03, 2016 at 02:11:17PM +0200, Cédric Le Goater wrote: > This is follow up to complete the serie "ppc: preparing pnv landing > (round 2)" plus a little fix on instruction privileges. > > Tested on a POWER8 pserie guest and on mac99. > > Benjamin Herrenschmidt (2): > ppc: Fix hreg_sto

Re: [Qemu-devel] [PATCH] target-ppc: fixup bitrot in mmu_helper.c debug statements

2016-06-05 Thread David Gibson
On Fri, Jun 03, 2016 at 02:58:09PM +0100, Mark Cave-Ayland wrote: > This fixes compilation of mmu_helper.c when all of the debug #defines at > the start of the file are enabled. > > Signed-off-by: Mark Cave-Ayland Applied to ppc-for-2.7. > --- > target-ppc/mmu_helper.c | 38

Re: [Qemu-devel] [PATCH] spapr_pci: Drop cannot_instantiate_with_device_add_yet=false

2016-06-05 Thread David Gibson
On Fri, Jun 03, 2016 at 11:28:08PM +1000, Alexey Kardashevskiy wrote: > On 03/06/16 23:04, Markus Armbruster wrote: > > It's become redundant since it was added in commit 09aa9a5 "spapr-pci: > > enable adding PHB via -device". > > > > Cc: Alexey Kardashevskiy > > Signed-off-by: Markus Armbruster

Re: [Qemu-devel] [PATCH] e1000e: Fix build with gcc 4.6.3 and ust tracing

2016-06-05 Thread Jason Wang
On 2016年06月04日 15:02, Dmitry Fleytman wrote: This patch fixes used-uninitialized false positive while compiling with ust tracing backend plus gcc 4.6.3: hw/net/e1000e.c: In function ‘e1000e_io_write’: hw/net/e1000e.c:170:39: error: ‘idx’ may be used uninitialized in this function [-Werror=uni

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

2016-06-05 Thread Jimi
Hm. Sound was the issue in that other bug. Have you already confirmed that you don't have that other, similar bug? If you undo all the other fixes you've done, including enabling SND again, does the VM still crash if you have NO sound device assigned to it at all, whether it be a pass- thru device

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

2016-06-05 Thread jimrif
I have been able to stop this from happening by recompiling my kernel without SND support. If you can live without sound in your host (it is still there in your guest if you pass through the sound device of your card) then try removing SND support from your hosts kernel. You can also try blacklis

Re: [Qemu-devel] [PATCH 08/10] target-avr: adding instruction translation

2016-06-05 Thread Richard Henderson
On 06/05/2016 02:47 PM, Michael Rolnik wrote: Is there a reason this code isn't going into translate.c? You wouldn't need the declarations in translate-inst.h or translate.h. I see here two levels of logic a. instruction translation b. general flow of program translation. FWIW, static

[Qemu-devel] [PATCH 2/2] dbdma: use DMA memory interface for memory accesses

2016-06-05 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland --- hw/misc/macio/mac_dbdma.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc/macio/mac_dbdma.c index 5632743..f116f9c 100644 --- a/hw/misc/macio/mac_dbdma.c +++ b/hw/misc/macio/mac_dbdma.c @@

[Qemu-devel] [PATCH 0/2] macio/dbdma: use DMA memory access helpers

2016-06-05 Thread Mark Cave-Ayland
This is just a small patchset to move the macio/dbdma interfaces over from using cpu_physical_memory_read/write to dma_memory_read/write. Signed-off-by: Mark Cave-Ayland Mark Cave-Ayland (2): macio: use DMA memory interface for non-block ATAPI transfers dbdma: use DMA memory interface for m

[Qemu-devel] [PATCH 1/2] macio: use DMA memory interface for non-block ATAPI transfers

2016-06-05 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland --- hw/ide/macio.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index e4e567e..ad20e1b 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -92,7 +92,8 @@ static void pmac_ide_atapi_transfer_cb(void *opaque

Re: [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Mark Cave-Ayland
On 05/06/16 18:41, Cédric Le Goater wrote: > Hello Mark, > > On 06/03/2016 03:52 PM, Mark Cave-Ayland wrote: >> On 03/06/16 13:11, Cédric Le Goater wrote: >> >>> This is follow up to complete the serie "ppc: preparing pnv landing >>> (round 2)" plus a little fix on instruction privileges. >>> >>>

Re: [Qemu-devel] [PATCH 09/10] target-avr: updating translate.c to use instructions translation

2016-06-05 Thread Michael Rolnik
get_opcode no longer present. I use it for the sake of skip instruction. I do not know a priori the length of the next instruction as it can be either 16 or 32 bits. On Sun, Jun 5, 2016 at 6:33 AM, Richard Henderson wrote: > On 06/02/2016 01:07 PM, Michael Rolnik wrote: > >> +uint32_tget_op

Re: [Qemu-devel] [PATCH 08/10] target-avr: adding instruction translation

2016-06-05 Thread Michael Rolnik
please see my answer inside. On Sun, Jun 5, 2016 at 6:27 AM, Richard Henderson wrote: > On 06/02/2016 01:07 PM, Michael Rolnik wrote: > >> Signed-off-by: Michael Rolnik >> --- >> target-avr/translate-inst.c | 2443 >> +++ >> > > Is there a reason this cod

[Qemu-devel] [Bug 1589257] Re: Boot with OVMF extremely slow to bootloader

2016-06-05 Thread Piknik
I've solved the problem by using the ovmf package in apt instead of the firmware I've had before. Apparently, the older firmware was only compatible with an older kernel, and a newer kernel with the older firmware would cause the issue. ** Changed in: qemu Status: New => Invalid -- You re

[Qemu-devel] [Bug 1588473] Re: Qemu Mate 16.10 and Gtk dont build

2016-06-05 Thread luigiburdo
Hi T, tested but dont build with the patch too... gtk abi 3.0 are away for now -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1588473 Title: Qemu Mate 16.10 and Gtk dont build Status in QEMU: New

Re: [Qemu-devel] [PATCH] Modify net/socket.c to use socket_* functions from include/qemu/sockets.h

2016-06-05 Thread Ashijeet Acharya
On Tuesday 31 May 2016 08:31 PM, Paolo Bonzini wrote: On 31/05/2016 11:27, Ashijeet Acharya wrote: Changed the listen(),connect(),parse_host_port() in net/socket.c with the socket_*()functions in include/qemu/sockets.h. Signed-off-by: Ashijeet Acharya --- net/socket.c | 38 +

Re: [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

2016-06-05 Thread Cédric Le Goater
Hello Mark, On 06/03/2016 03:52 PM, Mark Cave-Ayland wrote: > On 03/06/16 13:11, Cédric Le Goater wrote: > >> This is follow up to complete the serie "ppc: preparing pnv landing >> (round 2)" plus a little fix on instruction privileges. >> >> Tested on a POWER8 pserie guest and on mac99. >> >> Be

Re: [Qemu-devel] [PATCH] hw/timer: Add value matching support to aspeed_timer

2016-06-05 Thread Cédric Le Goater
On 06/05/2016 06:20 PM, Joel Stanley wrote: > On Fri, May 27, 2016 at 12:08 AM, Andrew Jeffery wrote: >> Value matching allows Linux to boot with CONFIG_NO_HZ_IDLE=y on the >> palmetto-bmc machine. Two match registers are provided for each timer. > > Thanks for doing this. We now boot faster in m

Re: [Qemu-devel] [RFC v1 12/12] cpus: default MTTCG to on for 32 bit ARM on x86

2016-06-05 Thread Sergey Fedorov
On 15/04/16 17:23, Alex Bennée wrote: > This makes multi-threading the default for 32 bit ARM on x86. It has > been tested with Debian Jessie as well as my extended KVM unit tests > which stress the SMC and TB invalidation code. Those tests can be found > at: > > https://github.com/stsquad/kvm-un

[Qemu-devel] [RFC] Allow AMD IOMMU to have both SysBusDevice and PCIDevice properties.

2016-06-05 Thread David Kiarie
Signed-off-by: David Kiarie --- hw/acpi/aml-build.c |2 +- hw/i386/amd_iommu.c | 1471 +++ hw/i386/amd_iommu.h | 348 ++ hw/i386/kvm/pci-assign.c|2 +- hw/i386/pc_q35.c|1 + include/hw/acpi/acpi-d

[Qemu-devel] [RFC] AMD IOMMU: emulate multiple devices

2016-06-05 Thread David Kiarie
Hello all, This patch tries to solve a problem whereby real AMD IOMMUs exhibit both PCI and Platform device properties. AMD IOMMU properties that conflict with conventional PCI devices' features include the fact that its not a BusMaster device, reserves MMIO region without a BAR register. Ther

Re: [Qemu-devel] [RFC v1 10/12] arm: use tlb_flush_page_all for tlbimva[a]

2016-06-05 Thread Sergey Fedorov
On 15/04/16 17:23, Alex Bennée wrote: > From: KONRAD Frederic > > Instead of flushing each individual vCPU use the tlb_flush_page_all > functions which is async enabled for MTTCG. > > Signed-off-by: KONRAD Frederic > Signed-off-by: Alex Bennée > --- > include/exec/exec-all.h | 3 +++ > target-

Re: [Qemu-devel] [RFC v1 09/12] translate-all: introduces tb_flush_safe.

2016-06-05 Thread Sergey Fedorov
On 15/04/16 17:23, Alex Bennée wrote: > diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h > index f695577..858055b 100644 > --- a/include/exec/exec-all.h > +++ b/include/exec/exec-all.h > @@ -307,6 +307,7 @@ struct TBContext { > > void tb_free(TranslationBlock *tb); > void tb_flush

Re: [Qemu-devel] [RFC v1 07/12] cpus: introduce async_safe_run_on_cpu.

2016-06-05 Thread Sergey Fedorov
On 15/04/16 17:23, Alex Bennée wrote: > +/* > + * Safe work interface > + * > + * Safe work is defined as work that requires the system to be > + * quiescent before making changes. > + */ > + > +void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, void *data) > +{ > +CPUState *iter;

Re: [Qemu-devel] [RFC v1 08/12] cputlb: introduce tlb_flush_* async work.

2016-06-05 Thread Sergey Fedorov
On 15/04/16 17:23, Alex Bennée wrote: > diff --git a/cputlb.c b/cputlb.c > index 1412049..42a3b07 100644 > --- a/cputlb.c > +++ b/cputlb.c > @@ -56,22 +56,14 @@ > } \ > } while (0) > > +/* We need a solution for stuffing 64 bit pointers in 32 bit ones if > + * we care about this combination

[Qemu-devel] [PULL] target-*: dfilter support for in_asm

2016-06-05 Thread Richard Henderson
The following changes since commit 6b3532b20b787cbd697a68b383232f5c3b39bd1e: Merge remote-tracking branch 'remotes/kraxel/tags/pull-ui-20160603-1' into staging (2016-06-03 12:03:36 +0100) are available in the git repository at: git://github.com/rth7680/qemu.git tags/pull-tgt-201

[Qemu-devel] [PULL] target-*: dfilter support for in_asm

2016-06-05 Thread Richard Henderson
The arm target was handled by 06486077, but other targets were ignored. This handles all the rest which actually support disassembly (that is, skipping moxie and tilegx). Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target-alpha/translate.c | 3 ++- target-cris/translate.

Re: [Qemu-devel] [PATCH] hw/timer: Add value matching support to aspeed_timer

2016-06-05 Thread Joel Stanley
On Fri, May 27, 2016 at 12:08 AM, Andrew Jeffery wrote: > Value matching allows Linux to boot with CONFIG_NO_HZ_IDLE=y on the > palmetto-bmc machine. Two match registers are provided for each timer. Thanks for doing this. We now boot faster in my testing. > > Signed-off-by: Andrew Jeffery Acke

[Qemu-devel] [Bug 1589272] [NEW] qemu-system-x86_64: There is no option group 'vnc'

2016-06-05 Thread sl1pkn07
Public bug reported: build qemu from git (6b3532b20b787cbd697a68b383232f5c3b39bd1e) with this options: ./configure \ --python=/usr/bin/python2 \ --prefix=/usr \ --sysconfdir=/etc \ --localstatedir=/var \ --libexecdir=/usr/lib/qemu \ --target-list=i386-softmmu,x86_64-softm

Re: [Qemu-devel] [PATCH 04/10] target-avr: adding instructions encodings

2016-06-05 Thread Richard Henderson
On 06/04/2016 10:09 PM, Michael Rolnik wrote: 1. The code was generated. Every instruction has its own extractors. there are several reasons 1. I don't have to think and gather the instructions into the group. 2. I don't have to remember what group an instruction is in 3. there is no

Re: [Qemu-devel] [RFC v1 07/12] cpus: introduce async_safe_run_on_cpu.

2016-06-05 Thread Sergey Fedorov
On 15/04/16 17:23, Alex Bennée wrote: > diff --git a/cpu-exec-common.c b/cpu-exec-common.c > index 3d7eaa3..c2f7c29 100644 > --- a/cpu-exec-common.c > +++ b/cpu-exec-common.c > @@ -79,3 +79,4 @@ void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc) > cpu->current_tb = NULL; > siglongjmp

Re: [Qemu-devel] [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE support

2016-06-05 Thread Haozhong Zhang
On 06/04/16 12:34, Boris Petkov wrote: > Haozhong Zhang wrote: > > >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they > >will be injected to only one VCPU rather than broadcast to all > >VCPUs. As KVM reports LMCE support on Intel platforms, this features is > >only available

Re: [Qemu-devel] [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE support

2016-06-05 Thread Haozhong Zhang
On 06/04/16 12:15, Boris Petkov wrote: > Haozhong Zhang wrote: > > >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they > >will be injected to only one VCPU rather than broadcast to all > >VCPUs. As KVM reports LMCE support on Intel platforms, this features is > >only available

Re: [Qemu-devel] [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE support

2016-06-05 Thread Haozhong Zhang
On 06/03/16 17:57, Radim Krčmář wrote: > 2016-06-03 14:09+0800, Haozhong Zhang: > > This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they > > will be injected to only one VCPU rather than broadcast to all > > VCPUs. As KVM reports LMCE support on Intel platforms, this features is >

[Qemu-devel] [Bug 1589257] [NEW] Boot with OVMF extremely slow to bootloader

2016-06-05 Thread Piknik
Public bug reported: I have used Arch Linux in the past with the same version (2.5.0), the exact same OVMF code and vars, and the exact same VM settings with no issues. Now with Ubuntu, I am having the issue where boot up until Windows takes about 10x longer. Every CPU thread/core allocated gets u

[Qemu-devel] [PATCH v2] gdbstub: avoid busy loop while waiting for gdb

2016-06-05 Thread Peter Wu
While waiting for a gdb response, or while sending an acknowledgement there is not much to do, so do not mark the socket as non-blocking to avoid a busy loop while paused at gdb. This only affects the user-mode emulation (qemu-arm -g 1234 ./a.out). Note that this issue was reported before at https

[Qemu-devel] [PULL 18/52] ICH9: fix typo

2016-06-05 Thread Michael Tokarev
From: Cao jin Signed-off-by: Cao jin Signed-off-by: Michael Tokarev --- hw/isa/lpc_ich9.c | 4 ++-- include/hw/i386/ich9.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 4f8ca45..1d27ea3 100644 --- a/hw/isa/lpc_ich9.c +

[Qemu-devel] [PULL 15/52] qemu-options.hx: Specify the units for -machine kvm_shadow_mem

2016-06-05 Thread Michael Tokarev
From: Peter Maydell The -machine kvm_shadow_mem option takes a size in bytes; say so explicitly in its documentation. Signed-off-by: Peter Maydell Reported-by: Tobi (github.com/tobimensch) Signed-off-by: Michael Tokarev --- qemu-options.hx | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Qemu-devel] [PULL 38/52] parallels: Use DIV_ROUND_UP

2016-06-05 Thread Michael Tokarev
From: Laurent Vivier Replace (((n) + (d) - 1) /(d)) by DIV_ROUND_UP(n,d). This patch is the result of coccinelle script scripts/coccinelle/round.cocci CC: qemu-bl...@nongnu.org Signed-off-by: Laurent Vivier Reviewed-by: Eric Blake Signed-off-by: Michael Tokarev --- block/parallels.c | 2 +-

[Qemu-devel] [PULL 05/52] fsdev: spelling fix

2016-06-05 Thread Michael Tokarev
Signed-off-by: Michael Tokarev --- fsdev/virtfs-proxy-helper.texi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fsdev/virtfs-proxy-helper.texi b/fsdev/virtfs-proxy-helper.texi index 6eb2d50..f4cbb60 100644 --- a/fsdev/virtfs-proxy-helper.texi +++ b/fsdev/virtfs-proxy-helper.

[Qemu-devel] [PULL 18/25] acpi: simplify bios_linker API by removing redundant 'table' argument

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov 'table' argument in bios_linker_add_foo() commands is a data blob of one of files also passed to the same API. So instead of passing blob in every API call, add and keep file name association with related blob at bios_linker_loader_alloc() time. And find blob by name looking

[Qemu-devel] [PULL 32/52] docs/multi-thread-compression: Fix wrong command string

2016-06-05 Thread Michael Tokarev
From: Wei Jiangang s/info_migrate_capabilities/info migrate_capabilities Signed-off-by: Wei Jiangang Reviewed-by: Eric Blake Reviewed-by: Liang Li Signed-off-by: Michael Tokarev --- docs/multi-thread-compression.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/mu

[Qemu-devel] [PULL 25/25] virtio: move bi-endian target support to a single location

2016-06-05 Thread Michael S. Tsirkin
From: Greg Kurz Paolo's recent cpu.h cleanups broke legacy virtio for ppc64 LE guests (and arm BE guests as well, even if I have not verified that). Especially, commit "33c11879fd42 qemu-common: push cpu.h inclusion out of qemu-common.h" has the side-effect of silently hiding the TARGET_IS_BIENDI

[Qemu-devel] [PULL 21/25] acpi: make bios_linker_loader_add_pointer() API offset based

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov cleanup bios_linker_loader_add_pointer() API by switching arguments to taking offsets relative to corresponding files instead of doing pointer arithmetic on behalf of user which were confusing. Also make offset inside of source file explicit in API so that user won't have to

[Qemu-devel] [PULL 17/25] acpi: convert linker from GArray to BIOSLinker structure

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov Patch just changes type of of linker variables to a structure, there aren't any functional changes. Converting linker to a structure will allow to extend it functionality in follow up patch adding sanity blob checks. Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsir

Re: [Qemu-devel] [PATCH 0/2] Reveal 'to' parameter of 'vnc' option to user

2016-06-05 Thread Robert Hu
On Tue, 2016-05-31 at 14:59 +0200, Paolo Bonzini wrote: > > On 31/05/2016 09:03, Robert Ho wrote: > > I find that '-vnc' option actually has a parameter 'to', implicitly; > > while actually is there and can be used but not be public. > > Don't know why but this may probably confuse user, especiall

[Qemu-devel] [PULL 22/25] acpi: make bios_linker_loader_add_checksum() API offset based

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov It should help to make clear that bios_linker works in terms of offsets within a file. Also it should prevent mistakes where user passes as arguments pointers to unrelated to file blobs. While at it, considering that it's a ACPI checksum and it's initial value must be 0, move

[Qemu-devel] [PULL 16/25] pc: use AcpiDeviceIfClass.send_event to issue GPE events

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov it reduces number of args passed in handlers by 1 and a number of used proxy wrappers saving ~20LOC. Also it allows to make cpu/mem hotplug code more universal as it would allow ARM to reuse it without rewrite by providing its own send_event callback to trigger events usiong G

[Qemu-devel] [PULL 23/25] pc-dimm: get memory region from ->get_memory_region()

2016-06-05 Thread Michael S. Tsirkin
From: Xiao Guangrong Curretly, the memory region of backed memory is all directly mapped to guest's address space, however, it will be not true for nvdimm device if we introduce nvdimm label which only can be indirectly accessed by ACPI DSM method Also it improves the comments a bit to reflect t

[Qemu-devel] [PULL 19/25] acpi: cleanup bios_linker_loader_cleanup()

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov bios_linker_loader_cleanup() is called only from one place and returned value is immediately freed wich makes returning pointer from bios_linker_loader_cleanup() useless. Cleanup bios_linker_loader_cleanup() by freeing data there so that caller won't have to free it. Signed-

[Qemu-devel] [PULL 08/25] pc: acpi: mark current CPU hotplug functions as legacy

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum --- include/hw/acpi/cpu_hotplug.h| 12 ++-- hw/acpi/cpu_hotplug.c| 8 hw/acpi/cpu_hotplug_acpi_table.c | 4 ++--

[Qemu-devel] [PULL 24/25] pc-dimm: introduce realize callback

2016-06-05 Thread Michael S. Tsirkin
From: Xiao Guangrong nvdimm needs to check if the backend memory is large enough to contain label data and init its memory region when the device is realized, so introduce realize callback which is called after common dimm has been realize Signed-off-by: Xiao Guangrong Reviewed-by: Michael S.

[Qemu-devel] [PULL 15/25] acpi: extend ACPI interface to provide send_event hook

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov send_event() hook will allow to send ACPI event in a target specific way (GPE or GPIO based impl.) it will also simplify proxy wrappers in piix4pm/ich9 that access ACPI regs and SCI which are part of piix4pm/lcp_ich9 devices and call acpi_foo() API directly. Signed-off-by: Ig

[Qemu-devel] [PULL 11/25] pc: acpi: cpuhp-legacy: switch ProcessorID to possible_cpus idx

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov In legacy cpu-hotplug ProcessorID == APIC ID is used in MADT and cpu-hotplug AML. It was fine as both are 8bit and unique. Spec depricated Processor() with corresponding ProcessorID and advises to use Device() and UID instead of it. However UID is just 32bit and it can't fit

[Qemu-devel] [PULL 07/25] pc: acpi: cpu-hotplug: make AML CPU_foo defines local to cpu_hotplug_acpi_table.c

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov now as those defines are used only locally inside of cpu_hotplug_acpi_table.c, move them out of header file. Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum --- include/hw/acpi/cpu_hotplug.h

[Qemu-devel] [PULL 20/25] tpm: apci: cleanup TCPA table initialization

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov At the time build_tpm_tcpa() is called the tcpalog size is always 0, so log_area_start_address which is actually offset from the start of ACPI_BUILD_TPMLOG_FILE is always 0. Also as 'TCPA' is allocated 0 filled, there is no point in calculating always 0 log_area_start_address

[Qemu-devel] [PULL 14/25] pc: Postpone SMBIOS table installation to post machine init

2016-06-05 Thread Michael S. Tsirkin
From: Corey Minyard This is the same place that the ACPI SSDT table gets added, so that devices can add themselves to the SMBIOS table. Signed-off-by: Corey Minyard Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/pc.c | 5 +++-- 1 file changed, 3 insertions(+),

[Qemu-devel] [PULL 09/25] pc: acpi: consolidate legacy CPU hotplug in one file

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov Since AML part of CPU hotplug is tightly coupled with its hardware part (IO port layout/protocol), move build_legacy_cpu_hotplug_aml() to cpu_hotplug.c and remove empty cpu_hotplug_acpi_table.c Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Mich

[Qemu-devel] [PULL 05/25] pc: acpi: consolidate CPU hotplug AML

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov move the former SSDT part of CPU hoplug close to DSDT part. AML is only moved but there isn't any functional change. Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/acpi/cpu_hotplug.h| 3 +- hw/acpi/cpu_h

[Qemu-devel] [PULL 04/25] pc: acpi: remove AML for empty/not used GPE handlers

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov ACPI spec requires GPE handlers only for GPE events that hardware implements. So remove AML for not supported by QEMU device model events. Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum Reviewed

[Qemu-devel] [PULL 13/25] ipmi: rework the fwinfo to be fetched from the interface

2016-06-05 Thread Michael S. Tsirkin
From: Corey Minyard Instead of scanning IPMI devices from a fwinfo list, allow the fwinfo to be fetched from the IPMI interface class. Then the code looking for IPMI fwinfo can scan devices on a bus and look for ones that implement the IPMI class. This will let the ACPI scope be defined by the c

[Qemu-devel] [PULL 01/25] tests: acpi: report names of expected files in verbose mode

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov print expected file name if it doesn't exists if verbose mode is enabled*. It helps to avoid running bios-tables-test under debugger to figure out missing file name. *) verbose mode is enabled if "V" env. variable is set Signed-off-by: Igor Mammedov Reviewed-by: Michael S.

[Qemu-devel] [PULL 03/25] acpi: add aml_refof()

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum --- include/hw/acpi/aml-build.h | 1 + hw/acpi/aml-build.c | 8 2 files changed, 9 insertions(+) diff --git a/include/hw/acpi/aml

[Qemu-devel] [PULL 10/25] pc: acpi: simplify build_legacy_cpu_hotplug_aml() signature

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov since IO block used by CPU hotplug is fixed size and initialized it the same file as build_legacy_cpu_hotplug_aml() just use ACPI_GPE_PROC_LEN directly instead of passing it around in several files. Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by:

[Qemu-devel] [PULL 12/25] tests: acpi: update tables with consolidated legacy cpu-hotplug AML

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/acpi-test-data/pc/DSDT | Bin 5587 -> 5503 bytes tests/acpi-test-data/pc/DSDT.bridge | Bin 7446 -> 7362 bytes tests/acpi-test-data/q35/DSDT| Bin 8357

[Qemu-devel] [PULL 06/25] pc: acpi: consolidate \GPE._E02 with the rest of CPU hotplug AML

2016-06-05 Thread Michael S. Tsirkin
From: Igor Mammedov Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum --- hw/acpi/cpu_hotplug_acpi_table.c | 4 hw/i386/acpi-build.c | 4 2 files changed, 4 insertions(+), 4 deletions(-) diff --

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