spapr_lmb_release() and spapr_core_release() call hotplug_handler_unplug()
which after a bunch of indirection calls spapr_memory_unplug() or
spapr_core_unplug(). But we already know which is the appropriate thing
to call here, so we can just fold it directly into the release function.
Once that's
The following changes since commit 4871b51b9241b10f4fd8e04bbb21577886795e25:
vmgenid-test: use boot-sector infrastructure (2017-07-14 17:03:03 +0100)
are available in the git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.10-20170717
for you to fetch changes up to 346ebfc6f
We've now implemented a PAPR extensions which allows PAPR guests (i.e.
"pseries" machine type) to resize their hash page table during runtime.
However, that extension is only enabled if explicitly chosen on the
command line. This patch enables it by default for spapr-2.10, but leaves
it disabled
All the DRC subtypes explicitly list instance_size in TypeInfo (all as
sizeof(sPAPRDRConnector). This isn't necessary, since if it's not listed
it will be derived from the parent type.
Worse, this is dangerous, because if a subtype is changed in future to
have a larger structure, then subtypes of
We currently ignore errors from the object_property_del() in
spapr_drc_release(). But the only way that could fail is if the property
doesn't exist, in which case it's a bug that we're in spapr_drc_release()
at all. So change from ignoring to abort()ing on errors.
Signed-off-by: David Gibson
--
From: Greg Kurz
In case of error, we must ensure the dynamically allocated base_core_type
is freed, like it is done everywhere else in this function.
This is a regression introduced in QEMU 2.9 by commit 8149e2992f78.
Signed-off-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/ppc/spapr.c |
From: Laurent Vivier
When migrating a guest which has already had devices hotplugged,
libvirt typically starts the destination qemu with -incoming defer,
adds those hotplugged devices with qmp, then initiates the incoming
migration.
This causes problems for the management of spapr DRC state. Be
On Fri, Jul 14, 2017 at 12:41 PM, Daniel P. Berrange
wrote:
> On Thu, Jul 13, 2017 at 02:32:06PM +0100, Stefan Hajnoczi wrote:
>> On Thu, Jul 13, 2017 at 01:02:30PM +0200, Ladi Prosek wrote:
>> > +/*
>> > + * Print an error message to current monitor if we have one, else to
>> > stderr.
>> > + *
On 07/17/2017 11:13 AM, Xulei (Stone) wrote:
|--virtio_queue_empty
Then, kmod falls in infinite loop in handle EPT_MISCONFIG.
As far as i know, when kvm enters guest after handling EPT_MISCONFIG, seabios
should return
from mmio write and wait for virtio backend(q
On Sat, Jul 15, 2017 at 7:50 AM, Markus Armbruster wrote:
> Stefan Hajnoczi writes:
>
>> On Thu, Jul 13, 2017 at 03:48:02PM +0200, Ladi Prosek wrote:
>>> On Thu, Jul 13, 2017 at 3:32 PM, Stefan Hajnoczi
>>> wrote:
>>> > On Thu, Jul 13, 2017 at 01:02:30PM +0200, Ladi Prosek wrote:
>>> >> +/*
>>>
On 07/14/2017 11:22 AM, Jason Wang wrote:
On 2017年07月13日 13:52, Zhang Chen wrote:
If colo-compare find out the first different packet that means
the following packet almost is different. we needn't do a lot
of checkpoint in this time, so we set the no-need-checkpoint
peroid, default just set
Hi all,
Today I've included a fourth type of the automatic patchew replies: FreeBSD.
So far we have these tests running by patchew on each patch series:
* Docker tests
Basically it is
make docker-test-quick@centos6 \
docker-test-build@min-glib \
docker-tes
On Fri, 2017-07-14 at 18:13 +0200, Cédric Le Goater wrote:
> But when a guest initializes radix mode, it issues a
> H_REGISTER_PROC_TBL
> to update the LPCR of all CPUs. Hot-plugged CPUs inherit from the
> same
> setting under KVM but not under TCG. So, Let's check for radix and
> update
> the defa
Am 2017-07-09 17:39, schrieb Programmingkid:
I just made a documentation page for the LatticeMicro32 target. I need
to know its current status, how much of this system is implemented,
what software runs on it. If anyone could supply more information that
would be appreciated. Pictures of this tar
Laszlo,
Thanks for the comments.
On 2017/7/14 3:41, Laszlo Ersek wrote:
snip
>
> snip
>
>>> +
>>> +error_source_table = (AcpiHardwareErrorSourceTable *)(table_data->data
>>> ++ table_data->len - buffer->len);
>>> +error_source_table->error_source_count =
>>> G
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1181796
Title:
Qemu locks
Cc'ing qemu-trivial
On 07/15/2017 07:44 PM, Peng Hao wrote:
In the first line of run_agent,it has set ga_state = s,don't need
set ga_state = s again behind.
Signed-off-by: Peng Hao
Reviewed-by: Philippe Mathieu-Daudé
---
qga/main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Rebooting a SMP TCG guest is broken for both single/multi threaded TCG.
When reset happens, all the CPUs are in halted state. First CPU is brought out
of reset and secondary CPUs would be initialized by the guest kernel using a
rtas call start-cpu.
However, in case of TCG, decrementer interrupts
On 07/16/2017 11:38 PM, Fam Zheng wrote:
Signed-off-by: Fam Zheng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/armv7m.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 8efc4e8..1c837da 100644
--- a/hw/arm/armv7m.c
+++
On 07/16/2017 11:38 PM, Fam Zheng wrote:
Signed-off-by: Fam Zheng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/net/xilinx_axienet.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
index 5ffa739..d4c2c89
On 07/16/2017 11:38 PM, Fam Zheng wrote:
Signed-off-by: Fam Zheng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/dma/xilinx_axidma.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c
index 3987b5f..9b48103 10
On 07/16/2017 11:38 PM, Fam Zheng wrote:
Signed-off-by: Fam Zheng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/xlnx-zynqmp.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 64f52f8..cd8a4aa 100644
--- a/hw/arm
On 07/16/2017 11:38 PM, Fam Zheng wrote:
Signed-off-by: Fam Zheng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/armv7m.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index c8a11f2..8efc4e8 100644
--- a/hw/arm/armv7m.c
+++
From: Paolo Bonzini
It's fairly easy for --disable-tcg to bitrot. Test it in our CI.
Signed-off-by: Paolo Bonzini
Message-Id: <20170714093016.10897-1-pbonz...@redhat.com>
Signed-off-by: Fam Zheng
---
.travis.yml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/.travis.yml b/.travis.yml
From: Paolo Bonzini
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
Message-Id: <20170629132749.997-11-pbonz...@redhat.com>
Signed-off-by: Fam Zheng
---
block/sheepdog.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git
A few error handlings are missing because we ignore the subprocess exit
code, for example "docker build" errors are currently ignored.
Introduce _do_check() aside the existing _do() method and use it in a
few places.
Signed-off-by: Fam Zheng
Message-Id: <20170712075528.22770-3-f...@redhat.com>
T
From: Paolo Bonzini
This makes the driver thread-safe. The CoMutex is dropped temporarily
while accessing the data clusters or the backing file.
Signed-off-by: Paolo Bonzini
Message-Id: <20170629132749.997-10-pbonz...@redhat.com>
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off
The **kwargs can do this just well.
Signed-off-by: Fam Zheng
Message-Id: <20170712075528.22770-2-f...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Fam Zheng
---
tests/docker/docker.py | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/tests/docker/docke
From: Paolo Bonzini
Reviewed-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
Message-Id: <20170629132749.997-5-pbonz...@redhat.com>
Signed-off-by: Fam Zheng
---
block/vpc.c | 20 ++--
1 file changed, 10 insertions(+), 10 deleti
From: Paolo Bonzini
The coroutine may run in a different AioContext, causing the
fd handler to busy wait. Fix this by resetting the handler
in restart_coroutine, before the coroutine is restarted.
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
Message-Id: <2
From: Paolo Bonzini
This part is never called for in-place writes, move it away to avoid
the "backwards" coding style typical of callback-based code.
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
Message-Id: <20170629132749.997-7-pbonz...@redhat.com>
Signed-
From: Paolo Bonzini
The VirtualBox driver is using a mutex to order all allocating writes,
but it is not protecting accesses to the bitmap because they implicitly
happen under the AioContext mutex. Change this to use a CoRwlock
explicitly.
Reviewed-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
From: Paolo Bonzini
Reviewed-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
Message-Id: <20170629132749.997-6-pbonz...@redhat.com>
Signed-off-by: Fam Zheng
---
block/vvfat.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff -
From: Paolo Bonzini
These functions are more efficient in the presence of contention.
qemu_co_rwlock_downgrade also guarantees not to block, which may
be useful in some algorithms too.
Reviewed-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
Me
From: Paolo Bonzini
This will be used in the next patch, which will call bdrv_qed_do_open
with a CoMutex taken. bdrv_qed_init_state provides a nice place to
initialize it.
Signed-off-by: Paolo Bonzini
Message-Id: <20170629132749.997-9-pbonz...@redhat.com>
Reviewed-by: Eric Blake
Reviewed-by:
From: "Daniel P. Berrange"
When trying to debug problems with tests it is natural to set
DEBUG=1 when starting the docker environment. Unfortunately
this has a side-effect of enabling an eth0 network interface
in the container, which changes the operating environment of
the test suite. IOW tests
From: Paolo Bonzini
This will let the callback take a CoMutex in the next patch.
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
Message-Id: <20170629132749.997-8-pbonz...@redhat.com>
Signed-off-by: Fam Zheng
---
block/io.c| 42 ++
From: Paolo Bonzini
Reviewed-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
Message-Id: <20170629132749.997-2-pbonz...@redhat.com>
Signed-off-by: Fam Zheng
---
block/qcow2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --gi
The following changes since commit 4871b51b9241b10f4fd8e04bbb21577886795e25:
vmgenid-test: use boot-sector infrastructure (2017-07-14 17:03:03 +0100)
are available in the git repository at:
git://github.com/famz/qemu.git tags/block-and-testing-pull-request
for you to fetch changes up to 978
On Thu, 06/29 15:27, Paolo Bonzini wrote:
> diff --git a/block/qed.c b/block/qed.c
> index db390efdbd..8228a50f68 100644
> --- a/block/qed.c
> +++ b/block/qed.c
> @@ -363,6 +363,15 @@ static void coroutine_fn
> bdrv_qed_co_drain(BlockDriverState *bs)
> }
> }
>
> +static void bdrv_qed_init_
On Fri, Jul 14, 2017 at 12:57:15PM -0300, Eduardo Habkost wrote:
> On Fri, Jul 14, 2017 at 12:23:06PM +0800, Peter Xu wrote:
> > On Wed, Jul 12, 2017 at 08:02:40PM +0100, Dr. David Alan Gilbert wrote:
> > > * Peter Xu (pet...@redhat.com) wrote:
> > > > We have the MigrationState as QDev now (which
Hello all,
Recently, I met a werid question when i run a VM in the following platfrom:
Vmware Vsphere 6.0/6.5
|-- centos 7.3 nested VM (with qemu 2.8, kmod 4.4.11, seabios 1.10)
|-- VM (with virtio-scsi controller, modern mode)
VM MUST hang in seabios when try to mmio write during virt
On Fri, Jul 14, 2017 at 05:32:10PM +0100, Dr. David Alan Gilbert wrote:
> * Eduardo Habkost (ehabk...@redhat.com) wrote:
> > On Fri, Jul 14, 2017 at 01:04:23PM +0800, Peter Xu wrote:
> > > On Wed, Jul 12, 2017 at 04:05:58PM -0300, Eduardo Habkost wrote:
> > > > On Wed, Jul 12, 2017 at 02:53:40PM +0
On Fri, Jul 14, 2017 at 06:15:54PM +0100, Dr. David Alan Gilbert wrote:
> * Peter Xu (pet...@redhat.com) wrote:
> > On Wed, Jun 28, 2017 at 08:00:34PM +0100, Dr. David Alan Gilbert (git)
> > wrote:
> > > From: "Dr. David Alan Gilbert"
> > >
> > > Stash the RAMBlock and offset for later use looki
Signed-off-by: Fam Zheng
---
hw/dma/xilinx_axidma.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c
index 3987b5f..9b48103 100644
--- a/hw/dma/xilinx_axidma.c
+++ b/hw/dma/xilinx_axidma.c
@@ -562,18 +562,6 @@ st
Signed-off-by: Fam Zheng
---
hw/arm/armv7m.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 8efc4e8..1c837da 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -132,12 +132,6 @@ static void armv7m_instance_init(Object *obj)
Signed-off-by: Fam Zheng
---
hw/net/xilinx_axienet.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
index 5ffa739..d4c2c89 100644
--- a/hw/net/xilinx_axienet.c
+++ b/hw/net/xilinx_axienet.c
@@ -989,18 +989,6
This is the arm part that was left out from:
https://lists.gnu.org/archive/html/qemu-devel/2017-07/msg04006.html
Make use of the new DEFINE_PROP_LINK, in favor of open coded the
object_property_add_link. The advantage of it is the property now get reflected
in the info qtree output, for a bit mor
Signed-off-by: Fam Zheng
---
hw/arm/armv7m.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index c8a11f2..8efc4e8 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -97,12 +97,6 @@ static void bitband_init(Object *obj)
BitBan
Signed-off-by: Fam Zheng
---
hw/intc/arm_gicv3_its_kvm.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c
index 1f8991b..39903d5 100644
--- a/hw/intc/arm_gicv3_its_kvm.c
+++ b/hw/intc/arm_gicv3_its_k
Signed-off-by: Fam Zheng
---
hw/arm/xlnx-zynqmp.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 64f52f8..cd8a4aa 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -140,11 +140,6 @@ static void xlnx_zynqmp
> From: Jean-Philippe Brucker [mailto:jean-philippe.bruc...@arm.com]
> Sent: Friday, July 14, 2017 7:26 PM
>
> On 14/07/17 08:20, Tian, Kevin wrote:
> >> From: Jean-Philippe Brucker [mailto:jean-philippe.bruc...@arm.com]
> >> Sent: Friday, July 7, 2017 11:15 PM
> >>
> >> On 07/07/17 07:21, Tian, K
Hi Laszlo
This is a good summary.
One minor comment is:
1) Tcg2Pei/Dxe are arechitecture driver. We do not expect a platform modify
them.
2) Tcg2ConfigPei/Dxe are platform sample driver. A platform may have its own
version based upon platform requirement. For example, if a platform supports
fTP
On Fri, Jul 14, 2017 at 03:28:09PM +0800, Jason Wang wrote:
>
>
> On 2017年07月14日 12:32, Peter Xu wrote:
> >On Thu, Jul 13, 2017 at 04:48:42PM +0800, Jason Wang wrote:
> >>
> >>On 2017年07月12日 16:13, Peter Xu wrote:
> >>>It is not wise to disgard all the IOTLB cache when cache size reaches
> >>>max
On Fri, Jul 14, 2017 at 12:25:13PM +0100, Jean-Philippe Brucker wrote:
> Hi Peter,
>
> On 14/07/17 03:17, Peter Xu wrote:
> >
> > [...]
> >
> >> static int virtio_iommu_unmap(VirtIOIOMMU *s,
> >> @@ -133,10 +227,64 @@ static int virtio_iommu_unmap(VirtIOIOMMU *s,
> >> uint64_t virt_addr = l
On Fri, Jul 14, 2017 at 06:40:34AM +, Bharat Bhushan wrote:
> Hi Peter,
>
> > -Original Message-
> > From: Peter Xu [mailto:pet...@redhat.com]
> > Sent: Friday, July 14, 2017 7:48 AM
> > To: Eric Auger
> > Cc: eric.auger@gmail.com; peter.mayd...@linaro.org;
> > alex.william...@red
On Fri, Jul 14, 2017 at 06:13:58PM +0200, Cédric Le Goater wrote:
> But when a guest initializes radix mode, it issues a H_REGISTER_PROC_TBL
> to update the LPCR of all CPUs. Hot-plugged CPUs inherit from the same
> setting under KVM but not under TCG. So, Let's check for radix and update
> the def
On 2017-07-16 11:59, Richard Henderson wrote:
> On 07/16/2017 11:43 AM, Aurelien Jarno wrote:
> > Indeed, if the same atomic code is used often it might be better to have
> > it cached. That said it's only true for TB that are recognized, as IIRC
> > TB with the exclusive lock are not cached.
>
>
On 07/16/2017 11:43 AM, Aurelien Jarno wrote:
Indeed, if the same atomic code is used often it might be better to have
it cached. That said it's only true for TB that are recognized, as IIRC
TB with the exclusive lock are not cached.
At the moment they are not.
But in Emilio's multi-threaded t
On 2017-07-16 01:22, Aurelien Jarno wrote:
> On 2017-07-06 16:20, Richard Henderson wrote:
> > As for other targets, cmpxchg isn't quite right for ll/sc,
> > suffering from an ABA race, but is sufficient to implement
> > portable atomic operations.
> >
> > Signed-off-by: Richard Henderson
> > ---
On 2017-07-16 09:35, Richard Henderson wrote:
> On 07/16/2017 05:18 AM, Aurelien Jarno wrote:
> > That said for further improvements did you consider decoding the gUSA
> > section in a helper. It might avoid having to emulate the atomic
> > sequence with 3 TBs in the worst case (the original one, t
Add a new slot_reserved_mask bitmask to PCIBus indicating whether or not each
PCI slot on the bus is reserved. Ensure that it is initialised to zero to
maintain the existing behaviour that all slots are available by default, and
add the additional check with appropriate error reporting to
do_pci_re
Groundwork for supporting multiple TCG contexts.
The core of this patch is this change to tcg/tcg.h:
> -extern TCGContext tcg_ctx;
> +extern TCGContext tcg_init_ctx;
> +extern TCGContext *tcg_ctx;
Note that for now we set *tcg_ctx to whatever TCGContext is passed
to tcg_context_init -- in this c
This is groundwork for supporting multiple TCG contexts.
The naive solution here is to split code_gen_buffer statically
among the TCG threads; this however results in poor utilization
if translation needs are different across TCG threads.
What we do here is to add an extra layer of indirection, a
This enables parallel TCG code generation. However, we do not take
advantage of it yet since tb_lock is still held during tb_gen_code.
In user-mode we use a single TCG context; see the documentation
added to tcg_region_init for the rationale.
Note that targets do not need any conversion: targets
This is a prerequisite for supporting multiple TCG contexts, since
we will have threads generating code in separate regions of
code_gen_buffer.
For this we need a new field (.size) in struct tb_tc to keep
track of the size of the translated code. This field adds a 4-byte
hole to the struct (and th
Also touch up the logic in do_pci_register_device() accordingly.
Signed-off-by: Mark Cave-Ayland
---
hw/pci/pci.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 0c6f74a..efc9c86 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -9
Signed-off-by: Emilio G. Cota
---
include/qemu/osdep.h | 2 ++
util/osdep.c | 40
2 files changed, 42 insertions(+)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 3cb36e6..dcecfbc 100644
--- a/include/qemu/osdep.h
+++ b/include/qe
Groundwork for supporting multiple TCG contexts.
Signed-off-by: Emilio G. Cota
---
tcg/tcg.h | 12
tcg/optimize.c | 40 +++-
2 files changed, 35 insertions(+), 17 deletions(-)
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 569f823..175d4de 100644
This is groundwork for supporting multiple TCG contexts.
To avoid scalability issues when profiling info is enabled, this patch
makes the profiling info counters distributed via the following changes:
1) Consolidate profile info into its own struct, TCGProfile, which
TCGContext also includes.
TCG regions already have a guard page.
Signed-off-by: Emilio G. Cota
---
accel/tcg/translate-all.c | 47 ---
1 file changed, 12 insertions(+), 35 deletions(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index c30d400..98aa63e 10
Thereby decoupling the resulting translated code from the current state
of the system.
Signed-off-by: Emilio G. Cota
---
target/arm/helper-a64.h| 4
target/arm/helper-a64.c| 38 --
target/arm/op_helper.c | 7 ---
target/arm/translate-a64
In preparation for adding tc.size to be able to keep track of
TB's using the binary search tree implementation from glib.
Signed-off-by: Emilio G. Cota
---
include/exec/exec-all.h | 20 ++--
accel/tcg/cpu-exec.c | 6 +++---
accel/tcg/translate-all.c | 20 ++---
Will come in handy very soon.
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
tcg/tcg.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 5afb80a..e8aae1f 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -115,6
Signed-off-by: Emilio G. Cota
---
accel/tcg/translate-all.c | 49 ++-
1 file changed, 6 insertions(+), 43 deletions(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index fd3e4a0..913b1c5 100644
--- a/accel/tcg/translate-all.c
+++
Thereby decoupling the resulting translated code from the current state
of the system.
Signed-off-by: Emilio G. Cota
---
target/hppa/helper.h| 2 ++
target/hppa/op_helper.c | 32
target/hppa/translate.c | 12 ++--
3 files changed, 40 insertions(+), 6
For some machines it is impossible to plug devices into a particular PCI bus
slot, e.g. for a real Ultra 5 there are 2 PCI bridges attached to the root
bus behind which all devices must be plugged. Ignoring this rule will cause
problems with interrupt routing since the interrupt numbers are calcula
These only depend on the host and therefore belong in the common
osdep, not in a target-dependent object.
Signed-off-by: Emilio G. Cota
---
include/exec/cpu-all.h | 2 --
include/qemu/osdep.h | 8
exec.c | 5 +
util/osdep.c | 9 +
4 files changed,
Thereby decoupling the resulting translated code from the current state
of the system.
Signed-off-by: Emilio G. Cota
---
target/i386/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 291c577..c5e4d77 100644
It is unlikely that we will ever want to call this helper passing
an argument other than the current PC. So just remove the argument,
and use the pc we already get from cpu_get_tb_cpu_state.
This change paves the way to having a common "tb_lookup" function.
Signed-off-by: Emilio G. Cota
---
tcg
Thereby decoupling the resulting translated code from the current state
of the system.
Signed-off-by: Emilio G. Cota
---
target/m68k/helper.h| 2 ++
target/m68k/op_helper.c | 32
target/m68k/translate.c | 12 ++--
3 files changed, 40 insertions(+), 6
And fix the following warning when DEBUG_TB_INVALIDATE is enabled
in translate-all.c:
CC mipsn32-linux-user/accel/tcg/translate-all.o
/data/src/qemu/accel/tcg/translate-all.c: In function ‘tb_alloc_page’:
/data/src/qemu/accel/tcg/translate-all.c:1201:16: error: format ‘%lx’ expects
argumen
Thereby decoupling the resulting translated code from the current state
of the system.
Signed-off-by: Emilio G. Cota
---
target/s390x/helper.h | 3 +++
target/s390x/mem_helper.c | 50 +++
target/s390x/translate.c | 20 +++
3 files
Groundwork for supporting multiple TCG contexts.
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
include/exec/tb-context.h | 2 ++
tcg/tcg.h | 2 --
accel/tcg/cpu-exec.c | 2 +-
accel/tcg/translate-all.c | 57 +++
Groundwork for supporting multiple TCG contexts.
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
include/exec/gen-icount.h | 7 +++
tcg/tcg.h | 2 ++
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/exec/gen-ic
Since commit 6e3b2bfd6 ("tcg: allocate TB structs before the
corresponding translated code") we are not fully utilizing
code_gen_buffer for translated code, and therefore are
incorrectly reporting the amount of translated code as well as
the average host TB size. Address this by:
- Making the cons
Groundwork for supporting multiple TCG contexts.
The hash table becomes read-only after it is filled in,
so we can save space by keeping just a global pointer to it.
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
tcg/tcg.h | 2 --
tcg/tcg.c | 10 +++
This gets rid of an ifdef check while ensuring that the debug code
is compiled, which prevents bit rot.
Suggested-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
accel/tcg/translate-all.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/accel/tcg/translate-all.
We don't really free anything in this function anymore; we just remove
the TB from the binary search tree.
Suggested-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
include/exec/exec-all.h | 2 +-
accel/tcg/cpu-exec.c | 2 +-
accel/tcg/translate-all.c | 6 +++---
3 files changed, 5 ins
This will enable us to decouple code translation from the value
of parallel_cpus at any given time. It will also help us minimize
TB flushes when generating code via EXCP_ATOMIC.
Note that the declaration of parallel_cpus is brought to exec-all.h
to be able to define there the inlines. The inlines
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Emilio G. Cota
---
tcg/mips/tcg-target.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index 85756b8..56db2
This prevents bit rot by ensuring the debug code is compiled when
building a user-mode target.
Unfortunately the helpers are user-mode-only so we cannot fully
get rid of the ifdef checks. Add a comment to explain this.
Suggested-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
accel/tcg/trans
Reviewed-by: Richard Henderson
Signed-off-by: Emilio G. Cota
---
include/exec/exec-all.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 887d7b3..28e3a24 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-a
Thereby decoupling the resulting translated code from the current state
of the system.
The tb->cflags field is not passed to tcg generation functions. So
we add a bit to TCGContext, storing there whether CF_PARALLEL is set
before translating every TB.
Most architectures have <= 32 registers, whic
This gets rid of a hole in struct TranslationBlock.
Signed-off-by: Emilio G. Cota
---
include/exec/exec-all.h | 3 +--
accel/tcg/cpu-exec.c | 2 +-
accel/tcg/translate-all.c | 3 +--
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec
Now that all code generation has been converted to check CF_PARALLEL, we can
generate !CF_PARALLEL code without having yet set !parallel_cpus --
and therefore without having to be in the exclusive region during
cpu_exec_step_atomic.
While at it, merge cpu_exec_step into cpu_exec_step_atomic.
Sign
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Emilio G. Cota
---
tcg/i386/tcg-target.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 01e3b4e..06df0
This gets rid of the need to check the tb->invalid bit during lookups.
After this change we do not need atomics to operate on tb->invalid: setting
and checking its value is serialised with tb_lock.
Signed-off-by: Emilio G. Cota
---
accel/tcg/cpu-exec.c | 3 +--
accel/tcg/translate-all.c |
Groundwork for supporting multiple TCG contexts.
Compile-tested for all targets on an x86_64 host.
Suggested-by: Richard Henderson
Signed-off-by: Emilio G. Cota
---
tcg/tci.c | 552 +++---
1 file changed, 279 insertions(+), 273 deletions(
Whenever there is an overflow in code_gen_buffer (e.g. we run out
of space in it and have to flush it), the code_time profiling counter
ends up with an invalid value (that is, code_time -= profile_getclock(),
without later on getting += profile_getclock() due to the goto).
Fix it by using the ti v
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