[snip]
Could we keep l2tpv3 option?
The l2tpv3 test is actually a test for recvmmsg. If you can do one
recvmmsg transport you can do all of them.
Yes, but I wonder whether or not the check for recvmmsg is too simple.
We probably want something like what AV_VSOCK did, test the support of
e
no-re...@patchew.org wrote:
> Hi,
>
> This series failed automatic build test. Please find the testing commands and
> their output below. If you have docker installed, you can probably reproduce
> it
> locally.
> cc: unrecognized option '-no-integrated-as'
> cc: unrecognized option '-no-integrate
Am 18.07.2017 um 18:08 hat Daniel P. Berrange geschrieben:
> On Tue, Jul 18, 2017 at 03:41:16PM +0200, Markus Armbruster wrote:
> > blockdev-add and migrate-set-parameters overload empty strings to mean
> > something entirely different. See my memo "qapi: Stop abusing
> > "special" values for some
Am 18.07.2017 um 20:57 hat no-re...@patchew.org geschrieben:
> **
> ERROR:/tmp/qemu-test/src/tests/test-qga.c:78:fixture_setup: assertion failed
> (fixture->fd != -1): (-1 != -1)
> GTester: last random seed: R02S1e410abb69660daf8fd594a35e52f43b
> make: *** [check-tests/test-qga] Error 1
> make: **
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PULL 00/14] tcg-next patch queue
Message-id: 20170719045722.25492-1-...@twiddle.net
Type: series
=== T
> For this specific case, the primary problem will be the implicit memory
> barriers that the i386 guest requires, but that the mips64 host does not
> provide.
>
> For tcg/mips/, TCG_TARGET_DEFAULT_MO should be 0, because the mips
> architecture
> does not have any implicit memory ordering. A
On 2017年07月19日 13:48, Anton Ivanov wrote:
On 19/07/17 06:39, Jason Wang wrote:
On 2017年07月19日 01:08, anton.iva...@cambridgegreys.com wrote:
From: Anton Ivanov
1. Creates a common backend for socket transports using
recvmmsg().
2. Migrates L2TPv3 to the new backend
It would be better i
On Tue, Jul 18, 2017 at 6:18 PM, Marc-André Lureau
wrote:
> Hi
>
> On Tue, Jul 18, 2017 at 6:05 PM Ladi Prosek wrote:
>>
>>
>> > I would like to hear from Ladi how he intended to use the device in
>> > the future, and if he would also prefer ACPI methods and what those
>> > methods should be.
>>
On 2017年07月19日 01:08, anton.iva...@cambridgegreys.com wrote:
From: Anton Ivanov
This adds raw socket support to the unified socket driver.
Interesting, in fact, I've finished a tpacket backend. Let me post it
sometime after hardfreeze.
Signed-off-by: Anton Ivanov
---
net/Makefile.obj
OK. Will address both comments in next version.
Brgds,
A.
On 19/07/17 06:48, Jason Wang wrote:
On 2017年07月19日 01:08, anton.iva...@cambridgegreys.com wrote:
From: Anton Ivanov
This adds GRETAP support to the unified socket driver.
Signed-off-by: Anton Ivanov
---
net/Makefile.objs |
On 19/07/17 06:39, Jason Wang wrote:
On 2017年07月19日 01:08, anton.iva...@cambridgegreys.com wrote:
From: Anton Ivanov
1. Creates a common backend for socket transports using
recvmmsg().
2. Migrates L2TPv3 to the new backend
It would be better if you could further split out 2 from this pat
On 2017年07月19日 01:08, anton.iva...@cambridgegreys.com wrote:
From: Anton Ivanov
This adds GRETAP support to the unified socket driver.
Signed-off-by: Anton Ivanov
---
net/Makefile.objs | 2 +-
net/clients.h | 4 +
net/gre.c | 313 +
On 2017年07月19日 01:08, anton.iva...@cambridgegreys.com wrote:
From: Anton Ivanov
1. Creates a common backend for socket transports using
recvmmsg().
2. Migrates L2TPv3 to the new backend
It would be better if you could further split out 2 from this patch.
Signed-off-by: Anton Ivanov
---
From: Philippe Mathieu-Daudé
Done with the Coccinelle semantic patch
scripts/coccinelle/tcg_gen_extract.cocci.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/sparc/translate.c | 15 +--
1 file changed, 5 insertions
From: Lluís Vilanova
Needed to implement a target-agnostic gen_intermediate_code()
in the future.
Reviewed-by: David Gibson
Reviewed-by: Richard Henderson
Reviewed-by: Alex Benneé
Reviewed-by: Emilio G. Cota
Signed-off-by: Lluís Vilanova
Message-Id: <150002025498.22386.18051908483085660588.
From: Philippe Mathieu-Daudé
Altough correctly implemented, bswap16_i64() never got tested/executed so the
safety TODO() statement was never removed.
Since it got now tested the TODO() can be removed.
while running Alex Bennée's image aarch64-linux-3.15rc2-buildroot.img:
Trace 0x7fa1904b0890 [
From: Philippe Mathieu-Daudé
Done with the Coccinelle semantic patch
scripts/coccinelle/tcg_gen_extract.cocci.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Laurent Vivier
Reviewed-by: Richard Henderson
Message-Id: <20170718045540.16322-5-f4...@amsat.org>
Signed-off-by: Richard Henderson
-
From: Philippe Mathieu-Daudé
Suggested-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20170718045540.16322-9-f4...@amsat.org>
Signed-off-by: Richard Henderson
---
target/sparc/translate.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/target/
From: Aurelien Jarno
Use the same mask to avoid having to load two different constants, as
suggested by Richard Henderson.
Signed-off-by: Aurelien Jarno
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20170516230159.4195-2-aurel...@aurel32.net>
Signed-off-by: R
Signed-off-by: Richard Henderson
---
include/exec/helper-tcg.h | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h
index bb92877..b0c5baf 100644
--- a/include/exec/helper-tcg.h
+++ b/include/exec/helper-tcg.h
From: Jiang Biao
Reserve a register for the guest_base using ppc code for reference.
By doing so, we do not have to recompute it for every memory load.
Signed-off-by: Jiang Biao
Signed-off-by: Richard Henderson
Message-Id: <1499677934-2249-1-git-send-email-jiang.bi...@zte.com.cn>
---
tcg/mips
From: Philippe Mathieu-Daudé
Suggested-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20170718045540.16322-10-f4...@amsat.org>
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/ta
From: Philippe Mathieu-Daudé
The following thread was helpful while writing this script:
https://github.com/coccinelle/coccinelle/issues/86
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20170718045540.16322-3-f4...@amsat.org>
Signed-off-by: Richard Henderson
---
scripts/coccinelle/t
It is much shorter to reverse all 4 half-words in parallel
than extract, reverse, and deposit each in turn.
Suggested-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 24 ++--
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/
From: Philippe Mathieu-Daudé
Done with the Coccinelle semantic patch
scripts/coccinelle/tcg_gen_extract.cocci.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Acked-by: David Gibson
Message-Id: <20170718045540.16322-6-f4...@amsat.org>
Signed-off-by: Richard Henderson
---
ttle point carrying it around further.
r~
The following changes since commit 6887dc6700ccb7820d8a9d370f421ee361c748e8:
Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20170718' into
staging (2017-07-18 21:13:48 +0100)
are available in the git repository at:
git:
From: Philippe Mathieu-Daudé
files generated using coccinelle tool: 'spatch --use-cache'
Reviewed-by: Eric Blake
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20170718045540.16322-2-f4...@amsat.org>
Signed-off-by: Richard Henderson
---
.gitignore | 2 ++
1 file changed, 2 insertions(+)
From: Philippe Mathieu-Daudé
This include was forgotten when splitting cacheinfo.c out of
tcg/ppc/tcg-target.inc.c (see commit b255b2c8).
For a Centos7 host, the include path
implicitly pulls in the desired AT_* defines.
Not so f
Hi Eduardo,
Thank you for your reply!
>On Mon, Jul 17, 2017 at 09:49:37PM -0400, Yi Wang wrote:
>> Add [vcpu] index support for hmp command "info lapic", which is
>> useful when debugging ipi and so on. Current behavior is not
>> changed when the parameter isn't specified.
>>
>> Signed-off-
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index aaaf28f..90e6d52 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -30
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 326af7f..aaaf28f 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/tra
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index d684a7b..5e37b1a 100644
--- a/target/alpha/translate.c
+++ b/target/alp
The flags are arranged such that we can manipulate them either
a whole, or as individual bytes. The computation within
cpu_get_tb_cpu_state is now reduced to a single load and mask.
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/alpha/cpu.h | 70 +--
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 4a627fc..48be19a 100644
--- a/target/alpha/translate.c
+++ b/target/a
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 5e37b1a..326af7f 100644
--- a/target/alpha/translate.c
+++ b
nce commit 6887dc6700ccb7820d8a9d370f421ee361c748e8:
Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20170718' into
staging (2017-07-18 21:13:48 +0100)
are available in the git repository at:
git://github.com/rth7680/qemu.git tags/pull-axp-20170718
for you to fetch changes up to 8aa5c65fd3d4612d8ab6
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 140d6f3..d684a7b 100644
--- a/target/alpha/translate.c
+++ b/targ
This value is constant for the cpu and does not need
to be stored within the TB.
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/alpha/cpu.h | 9 ---
target/alpha/translate.c | 70 ++--
2 files changed, 38 insertions(+
Clang 3.9 passes the CONFIG_AVX2_OPT configure test. However, the
supplied does not contain the bit_AVX2 define that we use
when detecting whether the routine can be enabled.
Introduce a qemu-specific header that uses the compiler's definition
of __cpuid et al, but supplies any missing bit_* def
On Tue, Jul 04, 2017 at 10:47:22AM +0200, Greg Kurz wrote:
> On Tue, 4 Jul 2017 17:29:01 +1000
> David Gibson wrote:
>
> > On Mon, Jul 03, 2017 at 06:48:25PM +0200, Greg Kurz wrote:
> > > The sPAPR machine always create a default PHB during initialization, even
> > > if -nodefaults was passed on
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/757702
Title:
ARM: singles
On Wed, Jul 12, 2017 at 05:09:37PM +0530, Shivaprasad G Bhat wrote:
>
>
> On 07/12/2017 04:25 PM, Andrea Bolognani wrote:
> > [libvir-list added to the loop]
> >
> > On Tue, 2017-07-04 at 10:47 +0200, Greg Kurz wrote:
> > > On Tue, 4 Jul 2017 17:29:01 +1000 David Gibson
> > > wrote:
> > > > On
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
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devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/796202
Title:
Doing a 64 b
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/959992
Title:
segfault in
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1234179
Title:
QEMU segfau
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1198350
Title:
USB pass-th
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/726619
Title:
loadvm does
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/924943
Title:
usb-host dev
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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Title:
Guests runn
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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Title:
monitor comm
On Wed, Jul 19, 2017 at 09:20:52AM +0530, Nikunj A Dadhania wrote:
> David Gibson writes:
>
> > On Tue, Jul 18, 2017 at 10:53:01AM +0530, Nikunj A Dadhania wrote:
> >> David Gibson writes:
> >>
> >> > On Mon, Jul 17, 2017 at 09:46:39AM +0530, Nikunj A Dadhania wrote:
> >> >> Rebooting a SMP TCG
On Wed, Jul 19, 2017 at 02:18:17PM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2017-07-19 at 14:01 +1000, David Gibson wrote:
> > On Wed, Jul 19, 2017 at 01:56:57PM +1000, Benjamin Herrenschmidt wrote:
> > > On Wed, 2017-07-19 at 13:08 +1000, David Gibson wrote:
> > > > On Wed, Jul 05, 2017 at 0
>On Mon, 17 Jul 2017 21:49:37 -0400
>Yi Wang wrote:
>
>> Add [vcpu] index support for hmp command "info lapic", which is
>> useful when debugging ipi and so on. Current behavior is not
>> changed when the parameter isn't specified.
>we shouldn't expose cpu_index to users anymore,
>
>I woul
On 07/18/2017 04:17 PM, jiang.bi...@zte.com.cn wrote:
Does that mean both the MTTCG feature and this patch set are all about system
mode, and have nothing to do with linux-user mode?
Yes.
> MTTCG has only been enabled on a few targets: alpha, arm, ppc64.
> Look for "mttcg=yes" in configure
On Wed, 2017-07-19 at 14:01 +1000, David Gibson wrote:
> On Wed, Jul 19, 2017 at 01:56:57PM +1000, Benjamin Herrenschmidt wrote:
> > On Wed, 2017-07-19 at 13:08 +1000, David Gibson wrote:
> > > On Wed, Jul 05, 2017 at 07:13:17PM +0200, Cédric Le Goater wrote:
> > > > Let's provide an empty shell fo
On Wed, 2017-07-19 at 13:08 +1000, David Gibson wrote:
>
> I'm somewhat uncomfortable with an irq allocater here in the intc
> code. As a rule, irq allocation is the responsibility of the machine,
> not any sub-component. Furthermore, it should allocate in a way which
> is repeatable, since they
On Wed, Jul 19, 2017 at 01:56:57PM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2017-07-19 at 13:08 +1000, David Gibson wrote:
> > On Wed, Jul 05, 2017 at 07:13:17PM +0200, Cédric Le Goater wrote:
> > > Let's provide an empty shell for the XIVE controller model with a
> > > couple of attributes f
On Wed, 2017-07-19 at 13:08 +1000, David Gibson wrote:
> On Wed, Jul 05, 2017 at 07:13:17PM +0200, Cédric Le Goater wrote:
> > Let's provide an empty shell for the XIVE controller model with a
> > couple of attributes for the IRQ number allocator. The latter is
> > largely inspired by OPAL which al
On Wed, 2017-07-19 at 13:00 +1000, David Gibson wrote:
> So, this is probably obvious, but I'm not considering this a candidate
> for qemu 2.10 (seeing as the soft freeze was yesterday). I'll still
> try to review and, once ready, queue for 2.11.
Right. I need to review still and we need to make
David Gibson writes:
> On Tue, Jul 18, 2017 at 10:53:01AM +0530, Nikunj A Dadhania wrote:
>> David Gibson writes:
>>
>> > On Mon, Jul 17, 2017 at 09:46:39AM +0530, Nikunj A Dadhania wrote:
>> >> Rebooting a SMP TCG guest is broken for both single/multi threaded TCG.
>> >>
>> >> When reset happ
On Wed, Jul 05, 2017 at 07:13:17PM +0200, Cédric Le Goater wrote:
> Let's provide an empty shell for the XIVE controller model with a
> couple of attributes for the IRQ number allocator. The latter is
> largely inspired by OPAL which allocates IPI IRQ numbers from the
> bottom of the IRQ number spa
On Wed, Jul 19, 2017 at 01:08:49PM +1000, David Gibson wrote:
> On Wed, Jul 05, 2017 at 07:13:17PM +0200, Cédric Le Goater wrote:
> > Let's provide an empty shell for the XIVE controller model with a
> > couple of attributes for the IRQ number allocator. The latter is
> > largely inspired by OPAL w
On Wed, Jul 05, 2017 at 07:13:13PM +0200, Cédric Le Goater wrote:
> On a POWER9 sPAPR machine, the Client Architecture Support (CAS)
> negotiation process determines whether the guest operates with an
> interrupt controller using the XICS legacy model, as found on POWER8,
> or in XIVE exploitation
On Wed, Jul 05, 2017 at 07:13:18PM +0200, Cédric Le Goater wrote:
> The XIVE interrupt controller of the POWER9 uses a set of tables to
> redirect exception from event sources to CPU threads. Among which we
> choose to model :
>
> - the State Bit Entries (SBE), also known as Event State Buffer
>
在 2017/7/18 下午10:24, Cornelia Huck 写道:
If a guest running on a machine without zpci issues a pci instruction,
throw them an exception.
Signed-off-by: Cornelia Huck
---
target/s390x/kvm.c | 54 +-
1 file changed, 41 insertions(+), 13 delet
在 2017/7/18 下午11:22, Cornelia Huck 写道:
On Tue, 18 Jul 2017 11:58:08 -0300
Philippe Mathieu-Daudé wrote:
Hi Cornelia,
On Tue, Jul 18, 2017 at 11:24 AM, Cornelia Huck wrote:
If we don't provide pci, we cannot have a pci device for which we
have to translate to adapter routes: just return -E
I think moving the new code on the top of this function would make it
more readable.
在 2017/7/18 下午10:24, Cornelia Huck 写道:
+} else {
+DPRINTF("fixup_msi_route on non-pci machine?!\n");
+return -ENODEV;
+}
Hi Eric,
On 2017/7/18 下午10:57, Eric Blake wrote:
On 07/17/2017 10:01 PM, Jing Liu wrote:
Hi all,
Do you anybody have iotests failure: 188, 189 and 087 of the latest qemu
upsteam?
I just wondered if it has something wrong with my test machines because
I have different results with two machine
> On 07/18/2017 02:22 PM, jiang.bi...@zte.com.cn wrote:
> > Seeing your work on multiple TCG, it seems that it has some kind of
> > connection
> > with the MTTCG feature,
> >
> > but I do not figure out how they are connected in detail.
> >
> > Could you pls help to confirm the following qu
Here are some thoughts on bits that are still missing to get a working
virtio-rdma, with some suggestions. These are very preliminary but I
feel I kept these in my head (and discussed offline) for too long. All
of the below is just my personal humble opinion.
Feature Requirements:
The basic requi
>Please confirm what's the QEMU command-line being used (especially the
-smp and -cpu options), and check if the bug persists if using "-cpu
host".
I'm using -cpu host already, here's just the cpu and smp commands:
-cpu
host,hv_vendor_id=whatever,kvm=off,hv_relaxed,hv_spinlocks=0x1fff,hv_vapic,h
On 07/18/2017 02:22 PM, jiang.bi...@zte.com.cn wrote:
Seeing your work on multiple TCG, it seems that it has some kind of connection
with the MTTCG feature,
but I do not figure out how they are connected in detail.
Could you pls help to confirm the following questions:
1.
what is the r
Yes, it is a dup. Sorry for the noise.
On Tue, Jul 18, 2017 at 9:03 PM, Eric Blake wrote:
> On 07/18/2017 07:58 PM, Nathaniel McCallum wrote:
>> Glibc used to have:
>>
>>typedef struct ucontext { ... } ucontext_t;
>>
>> Glibc now has:
>>
>>typedef struct ucontext_t { ... } ucontext_t;
>>
On 06/29/2017 09:09 AM, Laurent Vivier wrote:
> ...
>> diff --git a/linux-user/signal.c b/linux-user/signal.c
>> index 3d18d1b3ee..2c55a4f600 100644
>> --- a/linux-user/signal.c
>> +++ b/linux-user/signal.c
>> @@ -3346,7 +3346,7 @@ static void setup_rt_frame(int sig, struct
>> target_sigaction *k
On 06/29/2017 08:18 AM, Daniel P. Berrange wrote:
> On Thu, Jun 29, 2017 at 10:05:13AM +0100, Peter Maydell wrote:
>> On 28 June 2017 at 21:44, Khem Raj wrote:
>>> The ucontext_t type had a tag struct ucontext until now
>>> but newer glibc will drop it so we need to adjust and use
>>> the exposed
On 07/18/2017 07:58 PM, Nathaniel McCallum wrote:
> Glibc used to have:
>
>typedef struct ucontext { ... } ucontext_t;
>
> Glibc now has:
>
>typedef struct ucontext_t { ... } ucontext_t;
>
> However, Qemu used "struct ucontext" in declarations. This is a
> private name and compatiblity
Glibc used to have:
typedef struct ucontext { ... } ucontext_t;
Glibc now has:
typedef struct ucontext_t { ... } ucontext_t;
However, Qemu used "struct ucontext" in declarations. This is a
private name and compatiblity cannot be guaranteed. This patch
updates Qemu to only use the standard
On 07/18/2017 06:59 PM, Richard Henderson wrote:
>> +++ w/hw/usb/bus.c
>> @@ -407,8 +407,9 @@ void usb_register_companion(const char *masterbus,
>> USBPort *ports[],
>> void usb_port_location(USBPort *downstream, USBPort *upstream, int
>> portnr)
>> {
>> if (upstream) {
>> -snpri
* Cornelia Huck [2017-07-18 11:07:49 +0200]:
> On Tue, 18 Jul 2017 16:49:43 +0800
> Dong Jia Shi wrote:
>
> > * Cornelia Huck [2017-07-18 10:32:13 +0200]:
> >
> > > On Tue, 18 Jul 2017 03:49:25 +0200
> > > Dong Jia Shi wrote:
> > >
> > > > From: Jing Zhang
> > > >
> > > > When allocatin
Hi,
Seeing your work on multiple TCG, it seems that it has some kind of connection
with the MTTCG feature,
but I do not figure out how they are connected in detail.
Could you pls help to confirm the following questions:
what is the relationship between your patches and the MTTCG feature menti
On 07/17/2017 08:09 PM, Philippe Mathieu-Daudé wrote:
#define IOTEST_TEST(i) (iotest_test[((i) % ARRAY_SIZE(iotest_test))])
#define IOTEST_TYPE(i) (iotest_type[((i) / ARRAY_SIZE(iotest_test))])
Looks like array[(x)] is another candidate.
-#define IOTEST_MAX_TEST (ARRAY_SIZE(iotest_test))
On Tue, Jul 18, 2017 at 03:27:26PM +0200, Igor Mammedov wrote:
> On Wed, 12 Jul 2017 13:20:58 -0300
> Eduardo Habkost wrote:
>
> > When commit 0bacd8b3046f ('i386: Don't set CPUClass::cpu_def on
> > "max" model') removed the CPUClass::cpu_def field, we kept using
> > the x86_cpu_load_def() helper
On 07/17/2017 03:48 AM, Eric Blake wrote:
On 07/17/2017 08:42 AM, Eric Blake wrote:
On 07/13/2017 08:07 AM, Philippe Mathieu-Daudé wrote:
On 04/07/2017 04:21 PM, Philippe Mathieu-Daudé wrote:
Hi Dave,
On 04/07/2017 11:38 AM, Dr. David Alan Gilbert wrote:
Hi,
Fedora 26 has gcc 7.0.1 which
On 07/18/2017 01:30 PM, Emilio G. Cota wrote:
Should I do those updates in the same patch where tb->invalid is brought
over to cflags? Alternatives: have a later patch where all readers
are converted to atomic_read, or keep tb->invalid as a separate field (we
could use that 4-byte hole in struct
On Mon, Jul 17, 2017 at 19:29:57 -1000, Richard Henderson wrote:
> On 07/17/2017 06:54 PM, Emilio G. Cota wrote:
> >What threw me off was that in lookup_tb_ptr we're not checking tb->invalid,
> >and that biased me into thinking that it's not needed. But I should have
> >tried harder. Also, that's a
On Tue, Jul 18, 2017 at 04:54:17PM +0200, Igor Mammedov wrote:
> On Mon, 17 Jul 2017 21:49:37 -0400
> Yi Wang wrote:
>
> > Add [vcpu] index support for hmp command "info lapic", which is
> > useful when debugging ipi and so on. Current behavior is not
> > changed when the parameter isn't specifie
On Mon, Jul 17, 2017 at 09:49:37PM -0400, Yi Wang wrote:
> Add [vcpu] index support for hmp command "info lapic", which is
> useful when debugging ipi and so on. Current behavior is not
> changed when the parameter isn't specified.
>
> Signed-off-by: Yi Wang
> Signed-off-by: Yun Liu
We have 8 m
On 2017-07-18 15:40, no-re...@patchew.org wrote:
> Hi,
>
> This series failed automatic build test. Please find the testing commands and
> their output below. If you have docker installed, you can probably reproduce
> it
> locally.
>
> Subject: [Qemu-devel] [PULL 00/31] target/sh4 queue
> Messag
On 2017-07-18 15:42, no-re...@patchew.org wrote:
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Subject: [Qemu-devel] [PULL 00/31] target/sh4 queue
> Message-id: 20170718215050.3812-1-aurel...@aurel32.net
> Type: series
>
> === TEST S
Hello, all:
I have compiled qemu in cygwin with mingw according to the qemu wiki. When I
debug it with GDB, I get the error below:
.
Type "apropos word" to search for commands related to "word"...
Reading symbols from qemu-system-x86_64.exe...done.
(gdb) r -cdrom /t.iso -boot d -display
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/31] target/sh4 queue
Message-id: 20170718215050.3812-1-aurel...@aurel32.net
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PULL 00/31] target/sh4 queue
Message-id: 20170718215050.3812-1-aurel...@aurel32.net
Type: series
=== T
From: Igor Druzhinin
If we have a system with xenforeignmemory_map2() implemented
we don't need to save/restore physmap on suspend/restore
anymore. In case we resume a VM without physmap - try to
recreate the physmap during memory region restore phase and
remap map cache entries accordingly. The
From: Igor Druzhinin
This new call is trying to update a requested map cache entry
according to the changes in the physmap. The call is searching
for the entry, unmaps it and maps again at the same place using
a new guest address. If the mapping is dummy this call will
make it real.
This functio
Commit 090fa1c8 "add support for unplugging NVMe disks..." extended the
existing disk unplug flag to cover NVMe disks as well as IDE and SCSI.
The recent thread on the xen-devel mailing list [1] has highlighted that
this is not desirable behaviour: PV frontends should be able to distinguish
NVMe d
From: Igor Druzhinin
Dummys are simple anonymous mappings that are placed instead
of regular foreign mappings in certain situations when we need
to postpone the actual mapping but still have to give a
memory region to QEMU to play with.
This is planned to be used for restore on Xen.
Signed-off-
From: Peter Maydell
Check the return status of the xen_host_pci_get_* functions we call in
xen_pt_msix_init(), and fail device init if the reads failed rather than
ploughing ahead. (Spotted by Coverity: CID 777338.)
Signed-off-by: Peter Maydell
Reviewed-by: Stefano Stabellini
Signed-off-by: St
From: Igor Druzhinin
Non-functional change.
Signed-off-by: Igor Druzhinin
Reviewed-by: Stefano Stabellini
Reviewed-by: Paul Durrant
---
hw/i386/xen/xen-hvm.c | 57 ---
1 file changed, 31 insertions(+), 26 deletions(-)
diff --git a/hw/i386/xen/
From: Xiong Zhang
In igd passthrough environment, guest could only access opregion at the
first bootup time. Once guest shutdown, later guest couldn't access
opregion anymore.
This is because qemu set emulated guest opregion base address to host
register. Later guest get a wrong host opregion bas
t tags/xen-20170718-tag
for you to fetch changes up to 331b5189d756d431b1d18ae7097527ba3d3ea809:
xen: don't use xenstore to save/restore physmap anymore (2017-07-18 14:16:52
-0700)
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