Ping
On Thu, Nov 16, 2017 at 6:16 AM, Doug Gale wrote:
> I submitted it with git Nov 3 - the long lines issue with git-am
> should be resolved. Please let me know if there's still a problem.
>
> Thanks.
>
>
> On Fri, Nov 3, 2017 at 11:58 AM, Philippe Mathieu-Daudé
> wrote:
>> Cc'ing Trivial ;)
> On Nov 24, 2017, at 7:36 AM, Roman Kagan wrote:
>
> UUIDs (GUIDs) are widely used in VMBus-related stuff, so a dedicated
> property type becomes helpful.
>
> Signed-off-by: Roman Kagan
Reviewed-by: Ben Warren
> ---
> include/hw/qdev-properties.h | 3 +++
> hw/core/qdev-properties.c| 52
Thanks Roman, this seems like a nice improvement. Fix the minor point below,
and you can add my R-B.
> On Nov 24, 2017, at 7:36 AM, Roman Kagan wrote:
>
> Switch vmgenid device to use the UUID property type introduced in the
> previous patch for its 'guid' property.
>
> One semantic change it
On 11/24/2017 09:36 AM, Roman Kagan wrote:
UUIDs (GUIDs) are widely used in VMBus-related stuff, so a dedicated
property type becomes helpful.
Signed-off-by: Roman Kagan
---
include/hw/qdev-properties.h | 3 +++
hw/core/qdev-properties.c| 52
On Fri, Nov 24, 2017 at 10:29:25PM +0100, Francisco Iglesias wrote:
> Hi,
>
> This patch series is an attempt to add support for the ZynqMP QSPI (consisting
> of the Generic QSPI and the legacy QSPI) to the xlnx-zcu102 board and connect
> Numonyx n25q512a11 flashes to the QSPI. Also some function
Add support for the Zynq Ultrascale MPSoc Generic QSPI.
Signed-off-by: Francisco Iglesias
---
default-configs/arm-softmmu.mak | 2 +-
hw/ssi/xilinx_spips.c | 579
include/hw/ssi/xilinx_spips.h | 32 ++-
3 files changed, 564 insertions(+), 4
Add support for the ZynqMP QSPI (consisting of the Generic QSPI and Legacy
QSPI) and connect Numonyx n25q512a11 flashes to it.
Signed-off-by: Francisco Iglesias
Reviewed-by: Alistair Francis
---
hw/arm/xlnx-zcu102.c | 23 +++
hw/arm/xlnx-zynqmp.c | 26 +++
Add support for zero pumping according to the transfer size register.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 47 ---
include/hw/ssi/xilinx_spips.h | 2 ++
2 files changed, 42 insertions(+), 7 deletions(-)
diff --git a/hw/ss
Add support for the RX discard and RX drain functionality. Also transmit
one byte per dummy cycle (to the flash memories) with commands that require
these.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 167 +-
include/hw/ssi/xilinx_
Don't set TX FIFO UNDERFLOW interrupt after transmitting the commands.
Also update interrupts after reading out the interrupt status.
Signed-off-by: Francisco Iglesias
Acked-by: Alistair Francis
---
hw/ssi/xilinx_spips.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/
Add support for SST READ ID 0x90/0xAB commands for reading out the flash
manufacuter ID and device ID.
Signed-off-by: Francisco Iglesias
Acked-by: Alistair Francis
Acked-by: Marcin Krzemiński
---
hw/block/m25p80.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/hw/
Add support for Micron (Numonyx) n25q512a11 and n25q512a13 flashes.
Signed-off-by: Francisco Iglesias
Acked-by: Marcin Krzemiński
Reviewed-by: Alistair Francis
---
hw/block/m25p80.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 1d0aa1d..1725e
Update striping functionality to be big-endian bit order (as according to
the Zynq-7000 Technical Reference Manual). Output thereafter the even bits
into the flash memory connected to the lower QSPI bus and the odd bits into
the flash memory connected to the upper QSPI bus.
Signed-off-by: Francisc
Add support for 4 byte addresses in the LQSPI and correct LQSPI_CFG_SEP_BUS.
Signed-off-by: Francisco Iglesias
Reviewed-by: Alistair Francis
---
hw/ssi/xilinx_spips.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 878
Hi,
This patch series is an attempt to add support for the ZynqMP QSPI (consisting
of the Generic QSPI and the legacy QSPI) to the xlnx-zcu102 board and connect
Numonyx n25q512a11 flashes to the QSPI. Also some functionality is added to
m25p80.
The series starts by adding support in m25p80 for c
Move the FlashCMD enum, XilinxQSPIPS and XilinxSPIPSClass structures to the
header for consistency (struct XilinxSPIPS is found there). Also move out
a define and remove two double included headers (while touching the code).
Finally, add 4 byte address commands to the FlashCMD enum.
Signed-off-by:
Add support for the bank address register access commands (BRRD/BRWR) and
the BULK_ERASE (0x60) command.
Signed-off-by: Francisco Iglesias
Acked-by: Marcin Krzemiński
---
hw/block/m25p80.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 9d2
Make tx/rx_data_bytes more generic so they can be reused (when adding
support for the Zynqmp Generic QSPI).
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 64 +--
1 file changed, 37 insertions(+), 27 deletions(-)
diff --git a/hw/ssi
Add support for continuous read out of the RDSR and READ_FSR status
registers until the chip select is deasserted. This feature is supported
by amongst others 1 or more flashtypes manufactured by Numonyx (Micron),
Windbond, SST, Gigadevice, Eon and Macronix.
Signed-off-by: Francisco Iglesias
Acke
On Fri, Nov 24, 2017 at 10:28:48AM +, Gonglei (Arei) wrote:
> Hi,
>
> Currently, the maximum number of supported memory regions for vhost-user
> backends is 8,
> and the maximum supported memory regions for vhost-net backends is determined
> by
> " /sys/module/vhost/parameters/max_mem_regi
From: Prasad J Pandit
Hello,
An user could attempt to use an uninitialised VirtQueue object
or set Vring object with undue values, raising an unexpected
exception in Qemu. This patch set fixes this issue and also adds
a unit test to the suite.
Thank you.
--
Prasad J Pandit (2):
virtio: check
From: Prasad J Pandit
An user could attempt to use an uninitialised VirtQueue object
or unset Vring.align leading to a arithmetic exception. Add check
to avoid it.
Reported-by: Zhangboxian
Signed-off-by: Prasad J Pandit
---
hw/virtio/virtio.c | 14 +++---
1 file changed, 11 insertions
From: Prasad J Pandit
An uninitialised VirtQueue object or one with Vring.align field
set to zero(0) could lead to arithmetic exceptions. Add a unit
test to validate it.
Signed-off-by: Prasad J Pandit
---
tests/virtio-blk-test.c | 25 +
1 file changed, 25 insertions(+)
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v2 0/2] check VirtiQueue Vring objects
Type: series
Message-id: 20171124175211.2234-1-ppan...@redhat.com
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git
Hi
On Fri, Nov 24, 2017 at 4:36 PM, Roman Kagan wrote:
> Switch vmgenid device to use the UUID property type introduced in the
> previous patch for its 'guid' property.
>
> One semantic change it introduces is that post-realize modification of
> 'guid' via HMP or QMP will now be rejected with an
On Fri, Nov 24, 2017 at 4:36 PM, Roman Kagan wrote:
> UUIDs (GUIDs) are widely used in VMBus-related stuff, so a dedicated
> property type becomes helpful.
>
> Signed-off-by: Roman Kagan
Reviewed-by: Marc-André Lureau
> ---
> include/hw/qdev-properties.h | 3 +++
> hw/core/qdev-properties.c
From: Prasad J Pandit
An uninitialised VirtQueue object or one with Vring.align field
set to zero(0) could lead to arithmetic exceptions. Add a unit
test to validate it.
Signed-off-by: Prasad J Pandit
---
tests/virtio-blk-test.c | 25 +
1 file changed, 25 insertions(+)
From: Prasad J Pandit
An user could attempt to use an uninitialised VirtQueue object
or unset Vring.align leading to a arithmetic exception. Add check
to avoid it.
Reported-by: Zhangboxian
Signed-off-by: Prasad J Pandit
---
hw/virtio/virtio.c | 14 +++---
1 file changed, 11 insertions
From: Prasad J Pandit
Hello,
An user could attempt to use an uninitialised VirtQueue object
or set Vring object with undue values, raising an unexpected
exception in Qemu. This patch set fixes this issue and also adds
a unit test to the suite.
Thank you.
--
Prasad J Pandit (2):
virtio: check
Matt, does disabling apicv on the hypervisor as above work around the
issue for you?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1329956
Title:
multi-core FreeBSD guest hangs after warm reboot
S
Hi Eduardo,
On 24.11.2017 14:46, Eduardo Otubo wrote:
> v3:
> * Removed all unecessary local_err
> * Change return of isa_bus_dma() and DMA_init() from void to int8_t,
>returning -EBUSY on error and 0 on success
> * Added qdev_cleanup_nofail() in case isa_bus_dma() returns error. The
>
On 24.11.2017 15:32, Roman Kagan wrote:
> It's going to be useful, in particular, in VMBus code massively using
> uuids aka GUIDs.
>
> Signed-off-by: Roman Kagan
> ---
> include/qemu/uuid.h | 2 ++
> tests/test-uuid.c | 24
> util/uuid.c | 7 ++-
> 3 file
I managed to track down the crash running javac in user-mode
emulation. The problem is that we can have several threads which
race in page_unprotect():
* threads A & B both try to do a write to a page with code in it at
the same time (ie which we've made non-writeable, so SEGV)
* they race in
On Fri, 24 Nov 2017 15:23:25 +1100
Suraj Jitindar Singh wrote:
> cpu->compat_pvr is used to store the current compat mode of the cpu.
>
> On the receiving side during incoming migration we check compatibility
> with the compat mode by calling ppc_set_compat(). However we fail to set
> the compat
This lets distros standardize on how QEMU should install systemd
services for qemu-ga and qemu-pr-helper.
The qemu-ga unit file comes from Fedora, but I checked that
Debian is using the same path for the virtio-serisal port.
I would like to include this in 2.11, so that the qemu-pr-helper
socket
Am 23.11.2017 um 18:57 hat Fam Zheng geschrieben:
> Jeff's block job patch made the latent drain bug visible, and I find this
> patch, which by itself also makes some sense, can hide it again. :) With it
> applied we are at least back to the ground where patchew's iotests (make
> docker-test-block@
On 11/24/2017 05:15 PM, Cornelia Huck wrote:
>>> In theory this should work.
>>>
>>> In reality it seems more complicated. A per-device property is easy and can
>>> be
>>> inspected on the command line (e.g. -device virtio-blk-ccw,help), while a
>>> new
>>> machine property would require to c
On Fri, 24 Nov 2017 16:30:24 +0100
Halil Pasic wrote:
> On 11/24/2017 03:58 PM, Christian Borntraeger wrote:
> >
> >
> > On 11/24/2017 02:27 PM, Cornelia Huck wrote:
> >> On Fri, 24 Nov 2017 14:01:20 +0100
> >> Christian Borntraeger wrote:
> >>
> >>> I first liked the idea to have it as a
On 11/23/2017 01:29 AM, Alistair Francis wrote:
On Wed, Nov 8, 2017 at 3:32 AM, KONRAD Frederic
wrote:
This adds the TTC to the xlnx-zynqmp board according to the ultrascale TRM.
Signed-off-by: KONRAD Frederic
---
hw/arm/xlnx-zynqmp.c | 25 +
include/hw/ar
Switch vmgenid device to use the UUID property type introduced in the
previous patch for its 'guid' property.
One semantic change it introduces is that post-realize modification of
'guid' via HMP or QMP will now be rejected with an error; however,
according to docs/specs/vmgenid.txt this is actual
UUIDs (GUIDs) are widely used in VMBus-related stuff, so a dedicated
property type becomes helpful.
Signed-off-by: Roman Kagan
---
include/hw/qdev-properties.h | 3 +++
hw/core/qdev-properties.c| 52
2 files changed, 55 insertions(+)
diff --git
On 24.11.2017 16:33, Cornelia Huck wrote:
> Signed-off-by: Cornelia Huck
> ---
> hw/s390x/s390-virtio-ccw.c | 17 -
> include/hw/compat.h| 3 +++
> 2 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
>
UUIDs (GUIDs) are widely used in VMBus-related stuff, so a dedicated
property type becomes helpful.
In the existing code, vmgenid can immediately profit from it.
Roman Kagan (2):
qdev-properties: add UUID property type
vmgenid: use UUID property type
include/hw/qdev-properties.h | 3 +++
h
On 11/24/2017 04:33 PM, Cornelia Huck wrote:
> Signed-off-by: Cornelia Huck
Just to be ahead of ARM again? ;-)
Acked-by: Christian Borntraeger +
> ---
> hw/s390x/s390-virtio-ccw.c | 17 -
> include/hw/compat.h| 3 +++
> 2 files changed, 19 insertions(+), 1 deletion(
Signed-off-by: Cornelia Huck
---
hw/s390x/s390-virtio-ccw.c | 17 -
include/hw/compat.h| 3 +++
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index 6a57f94197..a23b8aec9f 100644
--- a/hw/s390x/s390-v
On 11/24/2017 03:58 PM, Christian Borntraeger wrote:
>
>
> On 11/24/2017 02:27 PM, Cornelia Huck wrote:
>> On Fri, 24 Nov 2017 14:01:20 +0100
>> Christian Borntraeger wrote:
>>
>>> I first liked the idea to have it as a property of the css, but
>>> this is all pretty unclear how to do right.
Am 24.11.2017 um 09:53 hat Fam Zheng geschrieben:
> v2: Grammar and spelling fixes pointed out by Kevin and Philipp.
>
> Image locking feature was added in 2.10 but the documentation has been
> missing.
> Users sometimes get confused and wonder how to configure it for their specific
> needs. We s
Am 24.11.2017 um 09:53 hat Fam Zheng geschrieben:
> Signed-off-by: Fam Zheng
> ---
> qemu-options.hx | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/qemu-options.hx b/qemu-options.hx
> index 3728e9b4dd..f10c2a3ddb 100644
> --- a/qemu-options.hx
> +++ b/qemu-options.hx
> @@ -693,6 +6
On 23 November 2017 at 16:00, Paolo Bonzini wrote:
> On 23/11/2017 16:56, Peter Maydell wrote:
>> In our various supported host OSes, the time_t type may be either 32
>> or 64 bit, and could in theory also be either signed or unsigned.
>> Notably, in OpenBSD time_t is a 64 bit type even if 'long'
On 24 November 2017 at 10:16, Auger Eric wrote:
> Hi Peter,
>
> On 24/11/17 11:11, Peter Maydell wrote:
>> On 24 November 2017 at 09:43, Eric Auger wrote:
>>> Add virt-2.11 machine type.
>>>
>>> Signed-off-by: Eric Auger
>>>
>>> ---
>>
>> Argh, did we forget this again?
>
> Yes we did, please ap
John, Kevin, do we reach a consensus? Can we go on with this?
20.11.2017 19:00, Denis V. Lunev wrote:
On 11/17/2017 06:10 AM, John Snow wrote:
On 11/16/2017 03:17 AM, Vladimir Sementsov-Ogievskiy wrote:
16.11.2017 00:20, John Snow wrote:
On 11/13/2017 11:20 AM, Vladimir Sementsov-Ogievskiy wr
On 11/24/2017 02:27 PM, Cornelia Huck wrote:
> On Fri, 24 Nov 2017 14:01:20 +0100
> Christian Borntraeger wrote:
>
>> I first liked the idea to have it as a property of the css, but
>> this is all pretty unclear how to do right. I start to think that going with
>> Halils first patch (a propert
Hi Aaron Conole && Jianfeng,
The stp could not work in ovs-dpdk vhostuser.
Because the attached vhost device doesn't have MAC address.
Now we have two ways to solve this problem.
1. The vhost learns MAC address from packet like as my first patch.
2. The virtio notifies MAC address actively to vho
On Fri, 24 Nov 2017 15:05:24 +0100
Paolo Bonzini wrote:
> On 24/11/2017 13:57, Igor Mammedov wrote:
> > I've stumbled on WS2016 hang when trying to list memory map in QEMU.
> >
> > Steps to reproduce:
> > qemu-system-x86_64 -monitor stdio -enable-kvm -m 1G ws2016x64.img
> > wait till guest bo
Hi Peter,
On 24/11/17 15:35, Peter Maydell wrote:
> On 24 November 2017 at 14:32, Auger Eric wrote:
>> On 24/11/17 15:20, Peter Maydell wrote:
>>> Thanks. My remaining question is: how important it is to
>>> put some of this into 2.11? We're getting quite close to
>>> the release now so I'm gettin
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PATCHv3] dma/i82374: avoid double creation of i82374
device
Type: series
Message-id: 20171124134644.49
On 24 November 2017 at 14:32, Auger Eric wrote:
> On 24/11/17 15:20, Peter Maydell wrote:
>> Thanks. My remaining question is: how important it is to
>> put some of this into 2.11? We're getting quite close to
>> the release now so I'm getting gradually more reluctant
>> to put in changes.
>
> I f
It's going to be useful, in particular, in VMBus code massively using
uuids aka GUIDs.
Signed-off-by: Roman Kagan
---
include/qemu/uuid.h | 2 ++
tests/test-uuid.c | 24
util/uuid.c | 7 ++-
3 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/i
Hi Peter,
On 24/11/17 15:20, Peter Maydell wrote:
> On 24 November 2017 at 14:18, Eric Auger wrote:
>> At the moment the ITS is not properly reset. On System reset or
>> reboot, previous ITS register values and caches are left
>> unchanged. Some of the registers might point to some guest RAM
>> t
On 24 November 2017 at 14:18, Eric Auger wrote:
> At the moment the ITS is not properly reset. On System reset or
> reboot, previous ITS register values and caches are left
> unchanged. Some of the registers might point to some guest RAM
> tables which are not valid anymore. This leads to state
>
Voiding the ITS caches is not supposed to happen via
individual register writes. So we introduced a dedicated
ITS KVM device ioctl to perform a cold reset of the ITS:
KVM_DEV_ARM_VGIC_GRP_CTRL/KVM_DEV_ARM_ITS_CTRL_RESET. Let's
use this latter if the kernel supports it.
Signed-off-by: Eric Auger
-
At the moment the ITS is not properly reset and this causes
various bugs on save/restore. We implement a minimalist reset
through individual register writes but for kernel versions
before v4.15 this fails voiding the vITS cache. We cannot
claim we have a comprehensive reset (hence the error message
Update headers against post v4.14 and pre v4.15-rc0.
Signed-off-by: Eric Auger
---
include/standard-headers/asm-s390/virtio-ccw.h | 1 +
include/standard-headers/asm-x86/hyperv.h | 394 +
include/standard-headers/linux/input-event-codes.h | 2 +
include/stand
At the moment the ITS is not properly reset. On System reset or
reboot, previous ITS register values and caches are left
unchanged. Some of the registers might point to some guest RAM
tables which are not valid anymore. This leads to state
inconsistencies that are detected by the kernel save/restor
>From the very beginning, post_load() was called from common
reset. This is not standard and obliged to discriminate the
reset case from the restore case using the iidr value.
Let's get rid of that call.
Signed-off-by: Eric Auger
Reviewed-by: Peter Maydell
---
v4 -> V5:
- added Peter's R-b
--
v2 patch posted on list and waiting for review:
https://lists.gnu.org/archive/html/qemu-devel/2017-11/msg04604.html
[PATCHv3] dma/i82374: avoid double creation of i82374 device
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://
On 24/11/2017 13:57, Igor Mammedov wrote:
> I've stumbled on WS2016 hang when trying to list memory map in QEMU.
>
> Steps to reproduce:
> qemu-system-x86_64 -monitor stdio -enable-kvm -m 1G ws2016x64.img
> wait till guest boots and execute in monitor
> (qemu) info mem
>
> qemu will hang wh
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL for-2.11 0/1] qemu-ga patch queue for 2.11
Type: series
Message-id: 20171120215034.22212-1-mdr...@linux.vnet.ibm.com
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
t
Hi Peter,
On 24/11/17 14:38, Peter Maydell wrote:
> On 24 November 2017 at 13:30, Eric Auger wrote:
>> Update headers against post v4.14 and pre v4.15-rc0.
>>
>> Signed-off-by: Eric Auger
>> ---
>> include/standard-headers/asm-s390/virtio-ccw.h | 1 +
>> include/standard-headers/asm-x86/h
v3:
* Removed all unecessary local_err
* Change return of isa_bus_dma() and DMA_init() from void to int8_t,
returning -EBUSY on error and 0 on success
* Added qdev_cleanup_nofail() in case isa_bus_dma() returns error. The
cleanup looks safe, but please review if I didn't miss any detail
v
On 24 November 2017 at 13:30, Eric Auger wrote:
> Voiding the ITS caches is not supposed to happen via
> individual register writes. So we introduced a dedicated
> ITS KVM device ioctl to perform a cold reset of the ITS:
> KVM_DEV_ARM_VGIC_GRP_CTRL/KVM_DEV_ARM_ITS_CTRL_RESET. Let's
> use this latt
On 24 November 2017 at 13:30, Eric Auger wrote:
> From the very beginning, post_load() was called from common
> reset. This is not standard and obliged to discriminate the
> reset case from the restore case using the iidr value.
>
> Let's get rid of that call.
>
> Signed-off-by: Eric Auger
> ---
Hi Peter,
On 24/11/17 14:34, Peter Maydell wrote:
> On 24 November 2017 at 13:30, Eric Auger wrote:
>> At the moment the ITS is not properly reset and this causes
>> various bugs on save/restore. We implement a minimalist reset
>> through individual register writes but for kernel versions
>> befor
On 24 November 2017 at 13:30, Eric Auger wrote:
> Update headers against post v4.14 and pre v4.15-rc0.
>
> Signed-off-by: Eric Auger
> ---
> include/standard-headers/asm-s390/virtio-ccw.h | 1 +
> include/standard-headers/asm-x86/hyperv.h | 394
> +
> include/
On 24 November 2017 at 13:30, Eric Auger wrote:
> At the moment the ITS is not properly reset and this causes
> various bugs on save/restore. We implement a minimalist reset
> through individual register writes but for kernel versions
> before v4.15 this fails voiding the vITS cache. We cannot
> c
Update headers against post v4.14 and pre v4.15-rc0.
Signed-off-by: Eric Auger
---
include/standard-headers/asm-s390/virtio-ccw.h | 1 +
include/standard-headers/asm-x86/hyperv.h | 394 +
include/standard-headers/linux/input-event-codes.h | 2 +
include/stand
At the moment the ITS is not properly reset. On System reset or
reboot, previous ITS register values and caches are left
unchanged. Some of the registers might point to some guest RAM
tables which are not valid anymore. This leads to state
inconsistencies that are detected by the kernel save/restor
At the moment the ITS is not properly reset and this causes
various bugs on save/restore. We implement a minimalist reset
through individual register writes but for kernel versions
before v4.15 this fails voiding the vITS cache. We cannot
claim we have a comprehensive reset (hence the error message
Voiding the ITS caches is not supposed to happen via
individual register writes. So we introduced a dedicated
ITS KVM device ioctl to perform a cold reset of the ITS:
KVM_DEV_ARM_VGIC_GRP_CTRL/KVM_DEV_ARM_ITS_CTRL_RESET. Let's
use this latter if the kernel supports it.
Signed-off-by: Eric Auger
-
>From the very beginning, post_load() was called from common
reset. This is not standard and obliged to discriminate the
reset case from the restore case using the iidr value.
Let's get rid of that call.
Signed-off-by: Eric Auger
---
hw/intc/arm_gicv3_its_common.c | 2 --
hw/intc/arm_gicv3_its_
On Fri, 24 Nov 2017 14:01:20 +0100
Christian Borntraeger wrote:
> I first liked the idea to have it as a property of the css, but
> this is all pretty unclear how to do right. I start to think that going with
> Halils first patch (a property per virtio device) is going to be the most
> simple so
Commit 14c985cffa "target-i386: present virtual L3 cache info for vcpus"
introduced and set by default exposing l3 to the guest.
The motivation behind it was that in the Linux scheduler, when waking up
a task on a sibling CPU, the task was put onto the target CPU's runqueue
directly, without sendi
On 24/11/2017 14:02, Pankaj Gupta wrote:
>
>>>- Suggestion by Paolo & Stefan(previously) to use virtio-blk makes sense
>>>if just
>>> want a flush vehicle to send guest commands to host and get reply
>>> after asynchronous
>>> execution. There was previous discussion [1] wit
On Fri, 24 Nov 2017 15:23:24 +1100
Suraj Jitindar Singh wrote:
> The patb_entry is used to store the location of the process table in
> guest memory. The msb is also used to indicate the mmu mode of the
> guest, that is patb_entry & 1 << 63 ? radix_mode : hash_mode.
>
> Currently we set this to
* Peter Xu (pet...@redhat.com) wrote:
> So it can get rid of being run on main thread.
>
> Signed-off-by: Peter Xu
Last time I asked if you were sure that we didn't do locking,
and you explained that we end up just setting up a callback
that happens in the mainloop, and this shouldn't take a loc
> >- Suggestion by Paolo & Stefan(previously) to use virtio-blk makes sense
> >if just
> > want a flush vehicle to send guest commands to host and get reply
> > after asynchronous
> > execution. There was previous discussion [1] with Rik & Dan on this.
> >
> > [1] https
On 11/24/2017 01:46 PM, Cornelia Huck wrote:
> On Thu, 23 Nov 2017 14:33:56 +0100
> Halil Pasic wrote:
>
>> Having an adequate representation for the css in QOM would be certainly
>> interesting, but at the same time (IMHO) is somewhat challenging. Let me
>> make some observations, which should
I've stumbled on WS2016 hang when trying to list memory map in QEMU.
Steps to reproduce:
qemu-system-x86_64 -monitor stdio -enable-kvm -m 1G ws2016x64.img
wait till guest boots and execute in monitor
(qemu) info mem
qemu will hang while printing mappings, consuming 100% cpu and not
respondi
On Thu, 23 Nov 2017 14:33:56 +0100
Halil Pasic wrote:
> Having an adequate representation for the css in QOM would be certainly
> interesting, but at the same time (IMHO) is somewhat challenging. Let me
> make some observations, which should some of my concerns.
>
> We already have virtual-css-
On 24/11/2017 13:40, Pankaj Gupta wrote:
>- Suggestion by Paolo & Stefan(previously) to use virtio-blk makes sense
> if just
> want a flush vehicle to send guest commands to host and get reply after
> asynchronous
> execution. There was previous discussion [1] with Rik & Dan on thi
Closing, according to the previous comment.
** Changed in: qemu
Status: New => Invalid
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https://bugs.launchpad.net/bugs/1732679
Title:
Cisco NX-OSv 9k crashes during boot with
Hello,
Thank you all for all the useful suggestions.
I want to summarize the discussions so far in the
thread. Please see below:
> >>
> >>> We can go with the "best" interface for what
> >>> could be a relatively slow flush (fsync on a
> >>> file on ssd/disk on the host), which requires
> >>> th
On 11/24/2017 10:09 AM, Greg Kurz wrote:
> On Thu, 23 Nov 2017 14:29:33 +0100
> Cédric Le Goater wrote:
>
>> On sPAPR, the creation of the interrupt presenter depends on some of
>> the machine attributes. When the XIVE interrupt mode is available,
>> this will get more complex. So provide a machi
Hi all,
whether it is possible you can give a review? thanks a lot in advance.
I have tested this series patches. as shown in [1][2].
For the APEI GHES table, I only enabled the GPIO-pin, ARMv8 SEA and ARMv8 SEI
notification type. and also reserved the
space for other notification type.
[1]
Fo
On Fri, Nov 24, 2017 at 01:25:41PM +0530, P J P wrote:
> From: Prasad J Pandit
>
> An user could attempt to use an uninitialised VirtQueue object
> or unset Vring.align leading to a arithmetic exception. Add check
> to avoid it.
>
> Reported-by: Zhangboxian
> Signed-off-by: Prasad J Pandit
> -
On Fri, Nov 24, 2017 at 01:25:42PM +0530, P J P wrote:
> From: Prasad J Pandit
>
> An uninitialised VirtQueue object or one with Vring.align field
> set to zero(0) could lead to arithmetic exceptions. Add a unit
> test to validate it.
>
> Signed-off-by: Prasad J Pandit
> ---
> tests/virtio-blk
On Fri, Nov 24, 2017 at 02:30:30PM +0800, Yang Zhong wrote:
> diff --git a/configure b/configure
> index 0c6e757..6292ab0 100755
> --- a/configure
> +++ b/configure
> @@ -426,6 +426,7 @@ vxhs=""
> supported_cpu="no"
> supported_os="no"
> bogus_os="no"
> +malloc_trim="yes"
Looks pretty good, sor
//github.com/cohuck/qemu tags/s390x-20171124
>
> for you to fetch changes up to c1c4c2192c1c063a6c53c600bb97f20555b2a528:
>
> s390/kvm_virtio/linux-headers: remove traces of old virtio transport
> (2017-11-24 10:52:05 +0100)
>
>
On Fri, Nov 24, 2017 at 08:04:59AM +0100, Cédric Le Goater wrote:
> On 11/24/2017 01:09 AM, David Gibson wrote:
> > On Thu, Nov 23, 2017 at 06:05:24PM +0100, Cédric Le Goater wrote:
> >> and use the value to define precisely the default value of the LPCR in
> >> the helper routine cpu_ppc_set_papr(
* Peter Xu (pet...@redhat.com) wrote:
> Start to use dedicate IO thread for QMP monitors that are not using
> MUXed chardev.
>
> Signed-off-by: Peter Xu
Reviewed-by: Dr. David Alan Gilbert
I guess another way to do this would be to have a property on the
Chardev something like 'can use iothrea
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