Gerd Hoffmann 于2018年9月18日周二 下午1:09写道:
>
> Hi,
>
> > +static void pxb_pcie_host_get_mmcfg_base(Object *obj, Visitor *v, const
> > char *name,
>
> > +void *opaque, Error **errp)
> > +{
> > +PCIExpressHost *e = PCI
On Fri, 14 Sep 2018 17:22:14 +0200
Paolo Bonzini wrote:
> On 29/08/2018 14:41, Viktor Prutyanov wrote:
> > elf2dmp is a converter from ELF dump (produced by
> > 'dump-guest-memory') to Windows MEMORY.DMP format (also know as
> > 'Complete Memory Dump') which can be opened in WinDbg.
> >
> > This
> From: Aaron Lindsay [mailto:aclin...@gmail.com]
> On Sep 10 14:41, Pavel Dovgalyuk wrote:
> > From: Alex Bennée [mailto:alex.ben...@linaro.org]
> > > Currently this is only available to system mode emulation. Can it be
> > > extended to include linux-user as well?
> >
> > Why not? I'm not familia
On Mon, Sep 17, 2018 at 12:31:02PM -0400, Emilio G. Cota wrote:
> From: Paolo Bonzini
>
> cpu->do_interrupt can now be called with BQL held (from
> cpu->cpu_exec_interrupt) or without (from cpu_handle_exception).
>
> Only a few targets rely on global device state in cc->do_interrupt;
> add check
On Mon, Sep 17, 2018 at 12:31:03PM -0400, Emilio G. Cota wrote:
> From: Paolo Bonzini
>
> Most interrupt requests do not need to take the BQL, and in fact
> most architectures do not need it at all. Push the BQL acquisition
> down to target code.
>
> Cc: Aleksandar Markovic
> Cc: Alexander Graf
On Mon, Sep 17, 2018 at 12:31:01PM -0400, Emilio G. Cota wrote:
> It's not needed anymore.
>
> Cc: David Gibson
> Cc: Alexander Graf
> Cc: qemu-...@nongnu.org
> Signed-off-by: Emilio G. Cota
Acked-by: David Gibson
> ---
> target/ppc/helper_regs.h | 8 +---
> 1 file changed, 1 insertion(
On Mon, Sep 17, 2018 at 12:30:32PM -0400, Emilio G. Cota wrote:
> From: Paolo Bonzini
>
> It will be changed to an atomic operation soon.
>
> Cc: David Gibson
> Cc: Alexander Graf
> Cc: qemu-...@nongnu.org
> Signed-off-by: Paolo Bonzini
> Signed-off-by: Emilio G. Cota
Acked-by: David Gibson
On Mon, Sep 17, 2018 at 12:30:50PM -0400, Emilio G. Cota wrote:
> From: Paolo Bonzini
>
> Cc: David Gibson
> Cc: Alexander Graf
> Cc: qemu-...@nongnu.org
> Signed-off-by: Paolo Bonzini
> Signed-off-by: Emilio G. Cota
Acked-by: David Gibson
> ---
> hw/ppc/ppc.c| 2 +-
>
Hi,
> +static void pxb_pcie_host_get_mmcfg_base(Object *obj, Visitor *v, const char
> *name,
> +void *opaque, Error **errp)
> +{
> +PCIExpressHost *e = PCIE_HOST_BRIDGE(obj);
> +
> +visit_type_uint64(v, name
I have two image A and B, and A is the backing file of B
I write data in address addr in A.
Then create B and set A as backing file of B.
Then I discard the same addr in B.
So the entry of addr in l2 table should be 1( also is
QCOW2_CLUSTER_ZERO_PLAIN)
, right?
But the addr cluster in A will fil
On Mon, Sep 17, 2018 at 10:09:33AM -0500, Brijesh Singh wrote:
[...]
> > > +static int amdvi_int_remap_legacy(AMDVIState *iommu,
> > > + MSIMessage *origin,
> > > + MSIMessage *translated,
> > > + u
On Mon, Sep 17, 2018 at 06:51:24AM -0500, Brijesh Singh wrote:
>
>
> On 9/16/18 11:33 PM, Peter Xu wrote:
> > On Fri, Sep 14, 2018 at 01:26:58PM -0500, Brijesh Singh wrote:
> >> Currently, the amdvi_validate_dte() assumes that a valid DTE will
> >> always have V=1. This is not true. The V=1 means
> On Sep 17, 2018, at 2:51 PM, Peter Maydell wrote:
>
> On 17 September 2018 at 18:56, Programmingkid
> wrote:
>>
>>> On Sep 17, 2018, at 1:52 PM, Peter Maydell wrote:
>>>
>>> On 17 September 2018 at 18:48, Programmingkid
>>> wrote:
What I hope to do is implement a PowerPC CPU flag
It seems that this "bug" affects only 2D-performance mediated through
GDI in Windows (CPU-, not GPU-driven). There have been reports that GDI
switches a lot between user/kernel space.
Are vmexits triggered when the guest switches from user- to kernel-
space? Could this be subsequently causing IRBS
On 18 September 2018 at 00:18, Programmingkid wrote:
>
>> On Sep 17, 2018, at 5:25 PM, Peter Maydell wrote:
>>
>> On 17 September 2018 at 22:18, John Arbuckle
>> wrote:
>>> https://www.nxp.com/files-static/product/doc/MPCFPE32B.pdf
>>> Page 2-8 in table 2-4 is where the description of this bit
> On Sep 17, 2018, at 5:25 PM, Peter Maydell wrote:
>
> On 17 September 2018 at 22:18, John Arbuckle
> wrote:
>> https://www.nxp.com/files-static/product/doc/MPCFPE32B.pdf
>> Page 2-8 in table 2-4 is where the description of this bit can be found.
>>
>> It is described as:
>>
>> Floating-po
On 17 September 2018 at 22:18, John Arbuckle wrote:
> https://www.nxp.com/files-static/product/doc/MPCFPE32B.pdf
> Page 2-8 in table 2-4 is where the description of this bit can be found.
>
> It is described as:
>
> Floating-point fraction rounded. The last arithmetic, rounding, or conversion
> i
On 17 September 2018 at 18:08, Thomas Huth wrote:
> The global cpu_single_env variable has been removed more than 5 years
> ago, so apparently nobody used this dead debug code in that timeframe
> anymore. Thus let's remove it completely now.
>
> Signed-off-by: Thomas Huth
It's also x86-specific
https://www.nxp.com/files-static/product/doc/MPCFPE32B.pdf
Page 2-8 in table 2-4 is where the description of this bit can be found.
It is described as:
Floating-point fraction rounded. The last arithmetic, rounding, or conversion
instruction incremented the fraction. This bit is NOT sticky.
Thi
On 09/17/2018 10:57 AM, Vladimir Sementsov-Ogievskiy wrote:
> Use bdrv_dirty_bitmap_next_dirty_area() instead of
> bdrv_dirty_iter_next_area(), because of the following problems of
> bdrv_dirty_iter_next_area():
>
> 1. Using HBitmap iterators we should carefully handle unaligned offset,
> as fi
On 09/17/2018 10:57 AM, Vladimir Sementsov-Ogievskiy wrote:
> The function alters bdrv_dirty_iter_next_area(), which is wrong and
> less efficient (see further commit
> "block/mirror: fix and improve do_sync_target_write" for description).
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
Public bug reported:
Greetings,
CentOS 7.5.1804
Linux 3.10.0-862.11.6.el7.x86_64
qemu-img version 3.0.50 (v3.0.0-614-g19b599f)
When trying to convert a vmdk flat file to qcow2 format, I get the following
error message:
qemu-img: Could not open './sk-R12-flat.vmdk': invalid VMDK image descripto
On 09/17/2018 08:00 AM, Pavel Dovgalyuk wrote:
>> From: John Snow [mailto:js...@redhat.com]
>> On 09/14/2018 03:27 AM, Pavel Dovgalyuk wrote:
From: Pavel Dovgalyuk [mailto:dovga...@ispras.ru]
> From: John Snow [mailto:js...@redhat.com]
> On 09/12/2018 04:19 AM, Pavel Dovgalyuk wrote
On Sep 10 14:41, Pavel Dovgalyuk wrote:
> From: Alex Bennée [mailto:alex.ben...@linaro.org]
> > Currently this is only available to system mode emulation. Can it be
> > extended to include linux-user as well?
>
> Why not? I'm not familiar with linux-user, so I'll need some time to try.
Yes. In fa
On 17 September 2018 at 18:56, Programmingkid wrote:
>
>> On Sep 17, 2018, at 1:52 PM, Peter Maydell wrote:
>>
>> On 17 September 2018 at 18:48, Programmingkid
>> wrote:
>>> What I hope to do is implement a PowerPC CPU flag that indicates if an
>>> rounded result is inexact.
>>
>> How is this
On 09/17/2018 01:06 PM, Eduardo Habkost wrote:
...#define TYPE_AMD_IOMMU_DEVICE "amd-iommu"
#define AMD_IOMMU_DEVICE(obj)\
@@ -278,6 +288,9 @@ typedef struct AMDVIState {
/* IOTLB */
GHashTable *iotlb;
+
+/* Interrupt remapping */
+bool intr_enabled;
Why do y
On 09/17/2018 11:51 AM, Vladimir Sementsov-Ogievskiy wrote:
> Hmm, ping, anybody here ?)
>
Was preparing to stage on Friday, working on it now.
I never understood why you forbid the transfer of read only bitmaps
though, can you point that out for me?
--js
On 09/17/2018 04:19 AM, David Hildenbrand wrote:
Am 12.09.18 um 22:08 schrieb Tony Krowiak:
A new CPU model feature and two new CPU model facilities are
introduced to support AP devices for a KVM guest.
CPU model features:
1. The KVM_S390_VM_CPU_FEAT_AP CPU model feature indicates that
AP
setrlimit guest calls that affect memory resources
(RLIMIT_{AS,DATA,STACK}) may interfere with QEMU internal memory
management. They may result in QEMU lockup because mprotect call in
page_unprotect would fail with ENOMEM error code, causing infinite loop
of SIGSEGV. E.g. it happens when running li
Reviewed-by: Peter Maydell
Signed-off-by: Max Filippov
---
Changes v2->v3:
- change get_pte return type to bool as suggested by Peter;
Changes v1->v2:
- change ldl_phys to address_space_ldl in get_pte and check transaction
for success;
target/xtensa/cpu.c | 2 +-
target/xtensa/cpu.h
On 17 September 2018 at 18:48, Programmingkid wrote:
> What I hope to do is implement a PowerPC CPU flag that indicates if an
> rounded result is inexact.
How is this different from the float_flag_inexact flag that softfloat already
supports ?
thanks
-- PMM
On Mon, Sep 17, 2018 at 11:00:46AM -0500, Brijesh Singh wrote:
>
>
> On 09/17/2018 08:49 AM, Eduardo Habkost wrote:
> > Hi,
> >
> > I couldn't review the whole patch yet, but I have some comments
> > below:
> >
> > On Fri, Sep 14, 2018 at 01:26:59PM -0500, Brijesh Singh wrote:
> > > Register th
> On Sep 17, 2018, at 1:52 PM, Peter Maydell wrote:
>
> On 17 September 2018 at 18:48, Programmingkid
> wrote:
>> What I hope to do is implement a PowerPC CPU flag that indicates if an
>> rounded result is inexact.
>
> How is this different from the float_flag_inexact flag that softfloat al
In the softfloat.c file there is a function called float64_add(). What I need
is a way to pack and canonicalize a FloatParts value. There doesn't appear to
be any way. This is what I have tried so far, but the results are not good.
The intermediate_result and the rounded_result should be close
The SLOF boot process is always quite slow ... but we can speed it up
a little bit by specifying "-nodefaults" and by using the "nvramrc"
variable instead of "boot-command" (since "nvramrc" is evaluated earlier
in the SLOF boot process than "boot-command").
Signed-off-by: Thomas Huth
---
tests/m
Hi Fredrik,
Nitpicking here, but I think it's what makes code clean and pleasant to
read.
On Sun, 16 Sep 2018, Fredrik Noring wrote:
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 77d678353e..327e96307b 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/transl
The global cpu_single_env variable has been removed more than 5 years
ago, so apparently nobody used this dead debug code in that timeframe
anymore. Thus let's remove it completely now.
Signed-off-by: Thomas Huth
---
accel/tcg/translate-all.c | 9 -
1 file changed, 9 deletions(-)
diff -
On 17/09/2018 18:51, Kevin Wolf wrote:
> Am 17.09.2018 um 17:59 hat Paolo Bonzini geschrieben:
>> On 17/09/2018 14:53, Kevin Wolf wrote:
> I think I can drop the ref/unref pair, but not the whole patch (whose
> main point is reordering dec_in_flight vs. the AIO callback).
You're r
On 29 August 2018 at 02:16, Max Filippov wrote:
> Signed-off-by: Max Filippov
> ---
> Changes v1->v2:
> - change ldl_phys to address_space_ldl in get_pte and check transaction
> for success;
> --- a/target/xtensa/helper.c
> +++ b/target/xtensa/helper.c
> @@ -642,11 +642,27 @@ static int get_pt
On 5 September 2018 at 17:18, Max Filippov wrote:
> setrlimit guest calls that affect memory resources
> (RLIMIT_{AS,DATA,STACK}) may interfere with QEMU internal memory
> management. They may result in QEMU lockup because mprotect call in
> page_unprotect would fail with ENOMEM error code, causin
It's not needed anymore.
Cc: David Gibson
Cc: Alexander Graf
Cc: qemu-...@nongnu.org
Signed-off-by: Emilio G. Cota
---
target/ppc/helper_regs.h | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h
index 5efd18049e..801eb
From: Paolo Bonzini
Cc: Cornelia Huck
Cc: Christian Borntraeger
Cc: Alexander Graf
Cc: Richard Henderson
Cc: David Hildenbrand
Cc: qemu-s3...@nongnu.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
hw/intc/s390_flic.c | 2 +-
target/s390x/cpu.c | 2 +-
2 files changed,
From: Paolo Bonzini
It's not needed anymore.
Cc: Marcelo Tosatti
Cc: Richard Henderson
Cc: Eduardo Habkost
Cc: k...@vger.kernel.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/i386/kvm.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/i386/kvm.c b/ta
This patch explicitly drops the BQL assertion from
the user-mode version; previous patches have taken
care of softmmu's cpu_interrupt.
Cc: Peter Crosthwaite
Cc: Richard Henderson
Signed-off-by: Emilio G. Cota
---
accel/tcg/translate-all.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/acce
From: Paolo Bonzini
Cc: David Gibson
Cc: Alexander Graf
Cc: qemu-...@nongnu.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
hw/ppc/ppc.c| 2 +-
target/ppc/excp_helper.c| 3 ++-
target/ppc/kvm.c| 4 ++--
target/ppc/translate_in
From: Paolo Bonzini
Cc: Mark Cave-Ayland
Cc: Artyom Tarasenko
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
hw/sparc64/sparc64.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c
index 408388945e..d7be7a2fb2 1
Am 17.09.2018 um 17:59 hat Paolo Bonzini geschrieben:
> On 17/09/2018 14:53, Kevin Wolf wrote:
> >>> I think I can drop the ref/unref pair, but not the whole patch (whose
> >>> main point is reordering dec_in_flight vs. the AIO callback).
> >>
> >> You're right, though I think I did that on purpose
Hello everyone,
My name is Michael. I'm working for voestalpine in an embedded software project
for railways diagnostics.
Before filing a bug on Launchpad I wanted to write to this list to get a proper
judgement of our problem.
We use the gcc cross compiler for armhf architecture and qemu to e
From: Paolo Bonzini
Cc: Peter Crosthwaite
Cc: Richard Henderson
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
accel/tcg/tcg-all.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index 69ad44bd54..8b8b9ab05c 100644
--- a/accel/tcg/
From: Paolo Bonzini
Cc: Chris Wulff
Cc: Marek Vasut
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/nios2/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index fbfaa2ce26..849eaaa392 100644
--- a/target
I am not familiar with whpx, so I opted for the safe
(and slow) route of performing probably many unnecessary
atomic_reads.
Cc: Richard Henderson
Cc: Eduardo Habkost
Signed-off-by: Emilio G. Cota
---
target/i386/whpx-all.c | 42 +-
1 file changed, 25 ins
I am not familiar with hax, so I opted for the safe
(and slow) route of performing probably many unnecessary
atomic_reads.
Cc: Richard Henderson
Cc: Eduardo Habkost
Signed-off-by: Emilio G. Cota
---
target/i386/hax-all.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
From: Paolo Bonzini
Cc: Laurent Vivier
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/m68k/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 582e3a73b3..4b15184a50 100644
--- a/target/m68k/cpu.c
+++ b/t
From: Paolo Bonzini
Now that cpu->interrupt_request is accessed with atomics,
we can drop the BQL around cpu_reset_interrupt, which is a
step towards not taking the BQL mandatorily in cpu_exec_interrupt.
Cc: Peter Crosthwaite
Cc: Richard Henderson
Signed-off-by: Paolo Bonzini
Signed-off-by: E
From: Paolo Bonzini
Cc: Peter Crosthwaite
Cc: Richard Henderson
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
accel/tcg/cpu-exec.c | 6 +++---
accel/tcg/tcg-all.c | 3 +--
accel/tcg/translate-all.c | 2 +-
qom/cpu.c | 6 +++---
4 files changed, 8 i
From: Paolo Bonzini
Cc: Aurelien Jarno
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/sh4/cpu.c| 2 +-
target/sh4/helper.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index b9f393b7c7..892a023c5c 100644
From: Paolo Bonzini
Cc: Michael Walle
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/lm32/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index b7499cb627..6c0178e1ea 100644
--- a/target/lm32/cpu.c
+++ b/ta
From: Paolo Bonzini
Cc: Guan Xuetao
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/unicore32/cpu.c | 2 +-
target/unicore32/softmmu.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
index 68f978d
From: Paolo Bonzini
Cc: Mark Cave-Ayland
Cc: Artyom Tarasenko
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/sparc/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 0f090ece54..cac7e18fc7 100644
---
From: Paolo Bonzini
Cc: Stafford Horne
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
hw/openrisc/cputimer.c | 2 +-
target/openrisc/cpu.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c
index 850f88761c
From: Paolo Bonzini
Cc: Peter Maydell
Cc: qemu-...@nongnu.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/arm/cpu.c| 2 +-
target/arm/helper.c | 12 +---
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
i
From: Paolo Bonzini
Cc: Anthony Green
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/moxie/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 8d67eb6727..f25144242b 100644
--- a/target/moxie/cpu.c
+++
I am not familiar with hvf, so I opted for the safe
(and slow) route of performing probably many unnecessary
atomic_reads.
Cc: Richard Henderson
Cc: Eduardo Habkost
Signed-off-by: Emilio G. Cota
---
target/i386/hvf/hvf.c| 7 ---
target/i386/hvf/x86hvf.c | 22 +++---
2
From: Paolo Bonzini
Cc: "Edgar E. Iglesias"
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/microblaze/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 9b546a2c18..c9cff79e38 100644
--- a/
From: Paolo Bonzini
cpu->do_interrupt can now be called with BQL held (from
cpu->cpu_exec_interrupt) or without (from cpu_handle_exception).
Only a few targets rely on global device state in cc->do_interrupt;
add checks to those targets to acquire the BQL if not already held.
Cc: Aleksandar Mar
From: Paolo Bonzini
It will be changed to an atomic operation soon.
Cc: Richard Henderson
Cc: Eduardo Habkost
Cc: Marcelo Tosatti
Cc: k...@vger.kernel.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/i386/hax-all.c| 4 ++--
target/i386/hvf/x86hvf.c | 8 --
From: Paolo Bonzini
Most interrupt requests do not need to take the BQL, and in fact
most architectures do not need it at all. Push the BQL acquisition
down to target code.
Cc: Aleksandar Markovic
Cc: Alexander Graf
Cc: Anthony Green
Cc: Artyom Tarasenko
Cc: Aurelien Jarno
Cc: Christian Bor
From: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Cc: Marcelo Tosatti
Cc: k...@vger.kernel.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/i386/cpu.c| 7 ---
target/i386/helper.c | 4 ++--
target/i386/kvm.c| 44
From: Paolo Bonzini
Cc: Richard Henderson
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/hppa/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 00bf444620..fe10c1a86a 100644
--- a/target/hppa/cpu.c
+++
Consistently access u16.high with atomics to avoid
undefined behaviour in MTTCG.
Note that icount_decr.u16.low is only used in icount mode,
so regular accesses to it are OK.
Cc: Peter Crosthwaite
Cc: Richard Henderson
Signed-off-by: Emilio G. Cota
---
accel/tcg/tcg-all.c | 2 +-
accel/t
From: Paolo Bonzini
It will be changed to an atomic operation soon.
Cc: Peter Crosthwaite
Cc: Richard Henderson
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
accel/tcg/cpu-exec.c | 6 +++---
exec.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff
From: Paolo Bonzini
Cc: "Edgar E. Iglesias"
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/cris/cpu.c| 3 ++-
target/cris/helper.c | 8
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index a23aba2688..84
This series comes originally from a series of patches that Paolo
sent to me a long time ago. I have kept most of his S-o-b tags,
but I have done the forward port of the patches to the current
QEMU code base, so please blame all possible bugs on me, not him.
The goal of this series is to push the B
From: Paolo Bonzini
It will be changed to an atomic operation soon.
Cc: David Gibson
Cc: Alexander Graf
Cc: qemu-...@nongnu.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/ppc/excp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/
From: Paolo Bonzini
It will be changed to an atomic operation soon.
Cc: Stafford Horne
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/openrisc/sys_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/openrisc/sys_helper.c b/target/openris
From: Paolo Bonzini
Cc: Aurelien Jarno
Cc: Aleksandar Markovic
Cc: James Hogan
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/mips/cpu.c | 7 ---
target/mips/kvm.c | 2 +-
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/mips/cpu.c b/target/mi
From: Paolo Bonzini
It will be changed to an atomic operation soon.
Cc: Cornelia Huck
Cc: Richard Henderson
Cc: Alexander Graf
Cc: David Hildenbrand
Cc: qemu-s3...@nongnu.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/s390x/excp_helper.c | 2 +-
1 file changed,
From: Paolo Bonzini
Cc: Richard Henderson
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/alpha/cpu.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index b08078e7fc..76001e66f1 100644
--- a/target/alph
On 17/09/2018 07:32, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/scsi/lsi53c895a.c | 214
> +--
> hw/scsi/trace-events | 62 +++
> 2 files changed, 165 insertions(+), 111 deletions(-)
>
> diff --git a/hw/scsi/
05.07.2018 19:18, Vladimir Sementsov-Ogievskiy wrote:
05.07.2018 18:59, Eric Blake wrote:
On 07/04/2018 06:23 AM, Vladimir Sementsov-Ogievskiy wrote:
This is necessary for efficient block-status export, for clients which
support it.
qemu as client doesn't currently process additional informat
On 09/17/2018 08:49 AM, Eduardo Habkost wrote:
Hi,
I couldn't review the whole patch yet, but I have some comments
below:
On Fri, Sep 14, 2018 at 01:26:59PM -0500, Brijesh Singh wrote:
Register the interrupt remapping callback and read/write ops for the
amd-iommu-ir memory region.
amd-iomm
On 17/09/2018 10:31, Fam Zheng wrote:
> This option is added together with scsi-disk but is never honoured,
> becuase we don't emulate the VPD page for scsi-block. We could intercept
> and inject the user specified value like for max xfer len, but it's
> probably not helpful since the intent of 070
On 17/09/2018 14:53, Kevin Wolf wrote:
>>> I think I can drop the ref/unref pair, but not the whole patch (whose
>>> main point is reordering dec_in_flight vs. the AIO callback).
>>
>> You're right, though I think I did that on purpose back in the day.
>> IIRC it was related to bdrv_drain, which mi
Hmm, ping, anybody here ?)
02.08.2018 22:10, John Snow wrote:
On 08/02/2018 03:05 PM, Denis V. Lunev wrote:
On 08/02/2018 12:50 PM, Dr. David Alan Gilbert wrote:
* Denis V. Lunev (d...@openvz.org) wrote:
I don't quite understand the last two paragraphs.
we are thinking right now to elimin
ping. Finally, what about this?
07.08.2018 20:43, Vladimir Sementsov-Ogievskiy wrote:
Hi all!
Here is an asynchronous scheme for handling fragmented qcow2
reads and writes. Both qcow2 read and write functions loops through
sequential portions of data. The series aim it to parallelize these
loop
ping
31.07.2018 20:30, Vladimir Sementsov-Ogievskiy wrote:
Hi all.
Here is NBD reconnect. Previously, if connection failed all current
and future requests will fail. After the series, nbd-client driver
will try to reconnect unlimited times. During first @reconnect-delay
seconds of reconnecting
This allows SeaBIOS to configure MCFG base during initialization.
The mcfg size is calculated using based on desired bus number
Signed-off-by: Zihan Yang
---
hw/pci-bridge/pci_expander_bridge.c | 37 +
include/hw/pci-bridge/pci_expander_bridge.h | 7 ++
2
On 09/17/2018 12:52 AM, Peter Xu wrote:
On Fri, Sep 14, 2018 at 01:27:00PM -0500, Brijesh Singh wrote:
Emulate the interrupt remapping support when guest virtual APIC is
not enabled.
For more info Refer: AMD IOMMU spec Rev 3.0 - section 2.2.5.1
When VAPIC is not enabled, it uses interrupt r
Describe new pci segments of host bridges in AML as new pci devices,
with _SEG and _BBN to let them be in DSDT.
Signed-off-by: Zihan Yang
---
hw/i386/acpi-build.c | 53 +---
1 file changed, 30 insertions(+), 23 deletions(-)
diff --git a/hw/i386/ac
Hi all
Here is a minimal working version of supporting multiple pci domains.
The next a few paragraphs will illustrate the purpose and use example.
Current issue and limitations will be in last 2 paragraphs, followed
by the changelog of each verison.
Currently only q35 host bridge is allocated an
The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default,
add a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe
Signed-off-by: Zihan Yang
---
hw/pci-bridge/pci_expander_bridge.c | 86 +++--
1 file changed, 82 insertions(+), 4 deletions(
This reverts commit a33fbb4f8b64226becf502a123733776ce319b24.
The functionality is unused.
Note: in addition to automatic revert, drop second parameter in
hbitmap_iter_next() call from hbitmap_next_dirty_area() too.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: John Snow
---
includ
pxb-pcie resides in pci domain 0 by default and users can not specify the
domain number. This patch adds 2 new property 'domain_nr' and 'max_bus'
to pxb-pcie device.
The first property allows user to choose a non-zero pci domain so that
they can hopefully add more pcie devices without being restri
pxb-pcie may only consumes a subset of 256 busses in a pci domain, but seabios
does not know it unless pxb-pcies passes it to seabios. This patch places
desired mcfg size into a hidden pci bar. The size is calculated based on
desired bus number of a pxb-pcie
Signed-off-by: Zihan Yang
---
hw/pci-
Allocate new segment for pxb-pcie host bridges in MCFG table, and reserve
corresponding MCFG space for them. This allows user-defined pxb-pcie
host bridges to be placed in different pci domain than q35 host.
The pci_host_bridges list is changed to be tail list to ensure the q35 host
is always the
Add bytes parameter to the function, to limit searched range.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/dirty-bitmap.h | 3 ++-
include/qemu/hbitmap.h | 10 +++---
block/backup.c | 3 ++-
block/dirty-bitmap.c | 5 +++--
nbd/server.c
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/test-hbitmap.c | 107 +++
1 file changed, 107 insertions(+)
diff --git a/tests/test-hbitmap.c b/tests/test-hbitmap.c
index c0da31a6bd..4f312e9da3 100644
--- a/tests/test-hbitmap.c
+++ b/tests/test-hbitm
Hi all.
1. bdrv_dirty_iter_next_area don't use hbitmap_next_zero and uses
inefficient loop instead. Let's improve it.
2. bdrv_dirty_iter_next_area don't handle unaligned offset and
max_offset correctly. I'm not sure that it is a real bug. But if it is,
we need these series in 3.0.
Details are in
This reverts commit 72d10a94213a954ad569095cb4491f2ae0853c40.
The function is unused now.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: John Snow
---
include/block/dirty-bitmap.h | 2 --
block/dirty-bitmap.c | 55
2 files changed, 57 del
This reverts commit 269576848ec3d57d2d958cf5ac69b08c44adf816.
The functionality is unused. Drop tests.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: John Snow
---
tests/test-hbitmap.c | 36
1 file changed, 12 insertions(+), 24 deletions(-)
diff
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