On 06/11/2018 05:52, Dongli Zhang wrote:
> The initial value of nalloc is -1, but not 1.
>
> Signed-off-by: Dongli Zhang
> ---
> This is based on git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git
> tags/for_upstream
>
> hw/block/virtio-blk.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletio
On Mon, Nov 05, 2018 at 11:20:35AM +0100, David Hildenbrand wrote:
> The callbacks are also called for cold plugged devices. Drop the "hot"
> to better match the actual callback names.
>
> While at it, also rename pcie_cap_slot_hotplug_common() to
> pcie_cap_slot_check_common().
Uh.. this part o
Enable direct stores cpu features including MOVDIRI and MOVDIR64B.
MOVDIRI moves doubleword or quadword from register to memory through
direct store.
MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity.
Changelog:
v2:
Separated from the series
http://lists.nongnu.org/a
MOVDIRI moves doubleword or quadword from register to memory through
direct store which is implemented by using write combining (WC) for
writing data directly into memory without caching the data.
The bit definition:
CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI
The release document ref below link:
htt
MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity.
Direct store is implemented by using write combining (WC) for writing
data directly into memory without caching the data.
The bit definition:
CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B
The release document ref below link:
http
On 11/05/2018 09:53 PM, Juan Quintela wrote:
Fei Li wrote:
Make qemu_thread_create() return a Boolean to indicate if it succeeds
rather than failing with an error. And add an Error parameter to hold
the error message and let the callers handle it.
Nice work, thanks.
Signed-off-by: Fei Li
Hi,
This series failed docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20181102170730.12432-1-cont...@steffen-goertz.de
Subject: [Qemu-devel] [PATCH v4 00/13] a
On Mon, Nov 05, 2018 at 11:49:40AM -0200, Eduardo Habkost wrote:
> On Mon, Nov 05, 2018 at 08:30:28AM +0100, Gerd Hoffmann wrote:
> > Hi,
> >
> > > > - Maintainers can deprecate stuffs
> > > > - Orphan code can become Supported
> > > > - Once scheduled for removal, there is no way back
> > > > -
On Mon, Nov 5, 2018 at 6:02 PM Thomas Huth wrote:
> On 2018-11-01 03:12, Zhang Chen wrote:
> > This compilation issue will occur when user use --disable-replication
> > to config Qemu.
> >
> > Reported-by: Thomas Huth
> > Signed-off-by: Zhang Chen
> > ---
> > migration/colo.c | 28
Hi Alistair,
On Tue, Nov 6, 2018 at 3:47 AM Alistair Francis wrote:
>
> On Mon, Nov 5, 2018 at 5:24 AM Bin Meng wrote:
> >
> > Hi,
> >
> > On Wed, Oct 31, 2018 at 6:22 AM Alistair Francis
> > wrote:
> > >
> > > Connect the gpex PCIe device based on the device tree included in the
> > > HiFive U
Hi,
This series failed docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20181102170730.12432-1-cont...@steffen-goertz.de
Subject: [Qemu-devel] [PATCH v4 00/13] ar
Hi,
> > I can see that it simplifies the logic in spice-server if we have a
> > single function call instead of two. So we could deprecate
> > spice_qxl_set_max_monitors() in favour of your
> > spice_qxl_set_device_info() variant.
> >
> > spice_qxl_set_max_monitors() would then basically do th
On 11/06/2018 01:49 AM, Eric Blake wrote:
> On 11/2/18 3:11 AM, Dongli Zhang wrote:
>> Hi,
>>
>> Is there any way to emulate I/O timeout on qemu side (not fault injection in
>> VM
>> kernel) without modifying qemu source code?
>
> You may be interested in Rich's work on nbdkit. If you don't m
> From: David Gibson [mailto:da...@gibson.dropbear.id.au]
> On Tue, Oct 30, 2018 at 12:30:31PM +0300, Pavel Dovgalyuk wrote:
> > This patch fixes processing of mtmsr instructions in icount mode.
> > In this mode writing to interrupt/peripheral state is controlled
> > by can_do_io flag. This flag mu
On 11/02/2018 10:46 AM, Peter Xu wrote:
On Thu, Nov 01, 2018 at 06:17:12PM +0800, Fei Li wrote:
[...]
@@ -1339,7 +1339,7 @@ bool multifd_recv_all_channels_created(void)
}
/* Return true if multifd is ready for the migration, otherwise false */
-bool multifd_recv_new_channel(QIOChann
From: Prasad J Pandit
While performing mmio device r/w operations, guest could set 'addr'
parameter such that 'locty' index exceeds TPM_TIS_NUM_LOCALITIES=5.
Add check to avoid OOB access.
Reported-by: Cheng Feng
Signed-off-by: Prasad J Pandit
---
hw/tpm/tpm_tis.c | 10 --
1 file chan
From: Prasad J Pandit
When TIS request is done, set 'sts' data field across all localities.
Signed-off-by: Prasad J Pandit
---
hw/tpm/tpm_tis.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c
index 20126dd838..58d90645bc 100644
--- a/hw/t
Hi,
On 11/05/2018 09:32 PM, Juan Quintela wrote:
Fei Li wrote:
When qemu_signal_init() fails in qemu_init_main_loop(), we return
without setting an error. Its callers crash then when they try to
report the error with error_report_err().
To avoid such segmentation fault, add a new Error para
> hw/core/ptimer.o: In function `timer_new_tl':
> /home/eblake/qemu/include/qemu/timer.h:536: undefined reference to
> `timer_init_tl'
> collect2: error: ld returned 1 exit status
> make: *** [/home/eblake/qemu/rules.mak:124: tests/ptimer-test] Error 1
> make: *** Waiting for unfinished jobs
I
On 11/05/2018 09:59 PM, Juan Quintela wrote:
Fei Li wrote:
Always call migrate_set_error() to set the error state without relying
on whether multifd_save_cleanup() succeeds. As the passed &local_err
is never used in multifd_save_cleanup(), remove it.
Error is not used, you are right.
But t
The initial value of nalloc is -1, but not 1.
Signed-off-by: Dongli Zhang
---
This is based on git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git
tags/for_upstream
hw/block/virtio-blk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-
On 2018/10/16 下午9:23, Xiao Wang wrote:
What's this
===
Following the patch (vhost: introduce mdev based hardware vhost backend)
https://lwn.net/Articles/750770/, which defines a generic mdev device for
vhost data path acceleration (aliased as vDPA mdev below), this patch set
introduces
On Tue, Nov 06, 2018 at 11:17:03AM +0800, Dongli Zhang wrote:
>
>
> On 11/06/2018 02:15 AM, Michael S. Tsirkin wrote:
> > From: Yaowei Bai
> >
> > Here should be submit_requests, there is no submit_merged_requests
> > function.
> >
> > Signed-off-by: Yaowei Bai
> > Reviewed-by: Michael S. Tsi
Hi,
This series failed docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20181102001303.32640-1-f4...@amsat.org
Subject: [Qemu-devel] [PATCH for 3.2 v2 0/7] hw/arm
On 11/06/2018 02:15 AM, Michael S. Tsirkin wrote:
> From: Yaowei Bai
>
> Here should be submit_requests, there is no submit_merged_requests
> function.
>
> Signed-off-by: Yaowei Bai
> Reviewed-by: Michael S. Tsirkin
> Signed-off-by: Michael S. Tsirkin
> ---
> hw/block/virtio-blk.c | 4 ++-
On 29.10.18 18:34, Paolo Bonzini wrote:
> Emulation of the block limits VPD page called back into scsi-disk.c,
> which however expected the request to be for a SCSIDiskState and
> accessed a scsi-generic device outside the bounds of its struct
> (namely to retrieve s->max_unmap_size and s->max_io_s
On 29.10.18 18:34, Paolo Bonzini wrote:
> Pass other sense, such as UNIT_ATTENTION or BUSY, directly to the
> guest.
>
> Reported-by: Max Reitz
> Signed-off-by: Paolo Bonzini
> ---
> hw/scsi/scsi-generic.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
[...]
> @@ -269,12 +268
On 29.10.18 18:34, Paolo Bonzini wrote:
> Block limits emulation is just placing 0xb0 as the final byte of the
> VPD pages list. However, VPD page numbers must be sorted, so change
> that to an in-place insert. Since I couldn't find any disk that triggered
> the loop more than once, this was test
On 29.10.18 18:34, Paolo Bonzini wrote:
> A device can report an excessive number of VPD pages when asked for a
> list; this can cause an out-of-bounds access to buf in
> scsi_generic_set_vpd_bl_emulation. It should not happen, but
> it is technically not incorrect so handle it: do not check any b
On 05.11.18 16:25, Markus Armbruster wrote:
> Max Reitz writes:
>
>> On 19.10.18 13:34, Markus Armbruster wrote:
>>> From: Jeff Cody
>>>
>>> This adds configure options to control the following block drivers:
>>>
>>> * Bochs
>>> * Cloop
>>> * Dmg
>>> * Qcow (V1)
>>> * Vdi
>>> * Vvfat
>>> * qed
>
On 05.11.18 15:18, Kevin Wolf wrote:
> Am 19.10.2018 um 18:49 hat Max Reitz geschrieben:
>> I noticed that with the (more or less) recent series from Marc-André the
>> output of qemu-img amend -f qcow2 -o help changed to this:
>>
>> $ ./qemu-img amend -f qcow2 -o help
>> Creation options for 'qcow2
On 10/18/18 3:31 PM, Paolo Bonzini wrote:
From: Artem Pisarenko
Attributes are simple flags, associated with individual timers for their
whole lifetime. They intended to be used to mark individual timers for
special handling when they fire.
New/init functions family in timer interface updated
On 11/1/18 7:28 PM, Viktor Prutyanov wrote:
Replace POSIX mmap with GLib g_mapped_file_new to make elf2dmp
cross-paltform. After this patch there are no direct POSIX calls.
s/paltform/platform/
Signed-off-by: Viktor Prutyanov
---
Makefile | 2 +-
--
Eric Blake, Pri
On 11/2/18 6:01 AM, Li Qiang wrote:
When trigger a 'query-cpus' qmp, the pc is an signed value like
following:
{"arch": "x86", ... "pc": -1732653994, "halted": true,...}
It is strange. Change it to uint64_t.
Signed-off-by: Li Qiang
---
qapi/misc.json | 12 ++--
1 file changed, 6 ins
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20181103015821.30074-1-lbl...@janustech.com
Subject: [Qemu-devel] [PATCH] include: Add a comment to explain the origin of
sizes' lookup table
=== TEST SCRIPT BEGIN ===
#!/bi
On 10/25/18 7:03 PM, Maxim Samoylov wrote:
This allows forwarding TCP6 and UDP6 connections down to
netdev=user connected guests.
Signed-off-by: Maxim Samoylov
---
hmp-commands.hx | 31
include/net/slirp.h | 2 +
net/slirp.c | 214
On 10/9/18 8:23 AM, Daniel P. Berrangé wrote:
From: "Daniel P. Berrange"
Currently any client which can complete the TLS handshake is able to use
the NBD server. The server admin can turn on the 'verify-peer' option
for the x509 creds to require the client to provide a x509 certificate.
This me
ping.
On 10/19/2018 8:52 AM, Brad Smith wrote:
Use MAP_STACK in qemu_alloc_stack() on OpenBSD.
Added to our 6.4 release.
MAP_STACK Indicate that the mapping is used as a stack. This
flag must be used in combination with MAP_ANON and
MAP_PRIVATE.
Implement
Below are a number of fixes to some off-by-one, read outside array bounds, and
NULL pointer accesses detected by an internal Oracle static analysis tool
(Parfait).
https://labs.oracle.com/pls/apex/f?p=labs:49:P49_PROJECT_ID:13
v1 -> v2
Based on feedback from Eric Blake:
patch2: reworded commi
Although the function block_job_get() can return NULL, it would be a
serious bug if it did so (because the job yields before executing anything
(if it started successfully); but otherwise, commit_active_start() would
have returned an error). However, as a precaution, before dereferencing
the 'job'
The calls to find_mapping_for_cluster() may return NULL but it
isn't always checked for before dereferencing the value returned.
Additionally, add some asserts to cover cases where NULL can't
be returned but which might not be obvious at first glance.
Signed-off-by: Liam Merwick
---
block/vvfat.
The commit for 0e4e4318eaa5 increments QCOW2_OL_MAX_BITNR but does not
add an array entry for QCOW2_OL_BITMAP_DIRECTORY_BITNR to metadata_ol_names[].
As a result, an array dereference of metadata_ol_names[8] in
qcow2_pre_write_overlap_check() could result in a read outside of the array
bounds.
Fi
The dev_id returned by the call to blk_get_attached_dev_id() in
blk_root_get_parent_desc() can be NULL (an internal call to
object_get_canonical_path may have returned NULL).
Instead of just checking this case before before dereferencing,
adjust blk_get_attached_dev_id() to return the empty string
In the assert checking the array dereference of JobVerbTable[verb]
in job_apply_verb() the check of the index, verb, allows an overrun
because an index equal to the array size is permitted.
Similarly, in the assert check of JobSTT[s0][s1] with index s1
in job_state_transition(), an off-by-one over
On 05/11/18 00:19, Max Reitz wrote:
On 19.10.18 22:39, Liam Merwick wrote:
The calls to find_mapping_for_cluster() may return NULL but it
isn't always checked for before dereferencing the value returned.
Additionally, add some asserts to cover cases where NULL can't
be returned but which migh
On 05/11/18 00:07, Max Reitz wrote:
On 19.10.18 22:39, Liam Merwick wrote:
A NULL 'list' passed into function dump_qlist() isn't correctly
validated and can be passed to qlist_first() where it is dereferenced.
Given that dump_qlist() is static, and callers already do the right
thing, just ad
On 04/11/18 23:57, Max Reitz wrote:
On 19.10.18 22:39, Liam Merwick wrote:
The dev_id returned by the call to blk_get_attached_dev_id() in
blk_root_get_parent_desc() can be NULL (an internal call to
object_get_canonical_path may have returned NULL).
Instead of just checking this case before
This driver uses the kernel-mode acceleration for virtio-blk and
allows to get a near bare metal disk performance inside a VM.
Signed-off-by: Vitaly Mayatskikh
---
configure | 10 +
default-configs/virtio.mak| 1 +
hw/block/Makefile.objs| 1 +
hw/block/vhost-
V2 changes:
- checkpatch style fixes
- correct size detection of disk image placed on a file system
This driver moves virtio-blk host-side processing to kernel (via new
vhost_blk kernel driver). It accelerates virtual disk performance
close to the bare metal levels, especially for parellel loads.
David Hildenbrand writes:
> On 05.11.18 16:37, Markus Armbruster wrote:
>> David Hildenbrand writes:
>>
>>> On 31.10.18 18:55, Markus Armbruster wrote:
David Hildenbrand writes:
> On 31.10.18 15:40, Markus Armbruster wrote:
>> David Hildenbrand writes:
>>
>>> The qem
On Mon, Nov 05, 2018 at 03:05:27PM +, Peter Maydell wrote:
> On 25 October 2018 at 01:52, Michael S. Tsirkin wrote:
> > The following changes since commit 13399aad4fa87b2878c49d02a5d3bafa6c966ba3:
> >
> > Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-10-22'
> > into stag
On Mon, Nov 5, 2018 at 12:45 PM Michael S. Tsirkin wrote:
> I think you should Cc more widely to get meaningful
> review. At least virtio-blk and block layer core people.
Thanks, it turns out I missed the existence of qemu/scripts directory
completely.
--
wbr, Vitaly
Hi Aleksandar,
On Tue, Oct 23, 2018 at 03:12:14PM +0200, Aleksandar Markovic wrote:
> From: Aleksandar Rikalo
>
> Add support for initial ramdisk loading for the Mips Boston board.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Aleksandar Rikalo
> Signed-off-by: Aleksandar Markovic
On Mon, Nov 5, 2018 at 5:24 AM Bin Meng wrote:
>
> Hi,
>
> On Wed, Oct 31, 2018 at 6:22 AM Alistair Francis
> wrote:
> >
> > Connect the gpex PCIe device based on the device tree included in the
> > HiFive Unleashed ROM.
> >
> > Signed-off-by: Alistair Francis
> > ---
> > default-configs/riscv3
Coverity caught a malloc() call that was never freed. This patch ensures
that we free the memory but also updates the allocation to use
g_strdup_printf() instead of malloc().
Signed-off-by: Alistair Francis
Suggested-by: Peter Maydell
---
hw/riscv/spike.c | 6 +++---
1 file changed, 3 insertion
On Tue, Oct 16, 2018 at 10:37:03AM +0100, Peter Maydell wrote:
> ATS1HR and ATS1HW (which allow AArch32 EL2 to do address translations
> on the EL2 translation regime) were implemented in commit 14db7fe09a2c8.
> However, we got them wrong: these should do stage 1 address translations
> as defined f
On 5 November 2018 at 16:37, Kevin Wolf wrote:
> The following changes since commit b2f7a038bb4c4fc5ce6b8486e8513dfd97665e2a:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-softfloat-20181104'
> into staging (2018-11-05 10:32:49 +)
>
> are available in the Git repository at:
>
>
Signed-off-by: Aaron Lindsay
Reviewed-by: Richard Henderson
---
target/arm/helper.c | 39 +--
1 file changed, 37 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 11eb62bdda..cff3a5a562 100644
--- a/target/arm/helper.c
This both advertises that we support four counters and enables them
because the pmu_num_counters() reads this value from PMCR.
Signed-off-by: Aaron Lindsay
Signed-off-by: Aaron Lindsay
---
target/arm/helper.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/
Setup a QEMUTimer to get a callback when we expect counters to next
overflow and trigger an interrupt at that time.
Signed-off-by: Aaron Lindsay
---
target/arm/cpu.c| 11
target/arm/cpu.h| 7 +++
target/arm/helper.c | 126 +---
3 files chan
Hello, Fredrik.
I appreciate your response and efforts!
>
> From: Fredrik Noring
>
> Subject: Re: [PATCH 0/2] target/mips: Fix decoding mechanisms of R5900
> M{F,T}{HI,LO}1 and DIV[> U]1
>
> Thank you for your review, Aleksandar,
>
> > For LL, SC, LLD and SCD instructions, there is a need to pr
The instruction event is only enabled when icount is used, cycles are
always supported. Always defining get_cycle_count (but altering its
behavior depending on CONFIG_USER_ONLY) allows us to remove some
CONFIG_USER_ONLY #defines throughout the rest of the code.
Signed-off-by: Aaron Lindsay
Signed
This commit doesn't add any supported events, but provides the framework
for adding them. We store the pm_event structs in a simple array, and
provide the mapping from the event numbers to array indexes in the
supported_event_map array. Because the value of PMCEID[01] depends upon
which events are
Add arrays to hold the registers, the definitions themselves, access
functions, and logic to reset counters when PMCR.P is set. Update
filtering code to support counters other than PMCCNTR. Support migration
with raw read/write functions.
Signed-off-by: Aaron Lindsay
Signed-off-by: Aaron Lindsay
pmccntr_read and pmccntr_write contained duplicate code that was already
being handled by pmccntr_sync. Consolidate the duplicated code into two
functions: pmccntr_op_start and pmccntr_op_finish. Add a companion to
c15_ccnt in CPUARMState so that we can simultaneously save both the
architectural re
Add an array for PMOVSSET so we only define it for v7ve+ platforms
Signed-off-by: Aaron Lindsay
Reviewed-by: Richard Henderson
---
target/arm/helper.c | 28
1 file changed, 28 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0522a606a4..67
Because of the PMU's design, many register accesses have side effects
which are inter-related, meaning that the normal method of saving CP
registers can result in inconsistent state. These side-effects are
largely handled in pmu_op_start/finish functions which can be called
before and after the sta
Signed-off-by: Aaron Lindsay
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/helper.c | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 63d4e993f4..0522a606a4 100644
--- a/targ
Rename arm_ccnt_enabled to pmu_counter_enabled, and add logic to only
return 'true' if the specified counter is enabled and neither prohibited
or filtered.
Signed-off-by: Aaron Lindsay
Signed-off-by: Aaron Lindsay
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/cpu.c
In some cases it may be helpful to modify state before saving it for
migration, and then modify the state back after it has been saved. The
existing pre_save function provides half of this functionality. This
patch adds a post_save function to provide the second half.
Signed-off-by: Aaron Lindsay
The ARM PMU implementation currently contains a basic cycle counter, but
it is often useful to gather counts of other events, filter them based
on execution mode, and/or be notified on counter overflow. These patches
flesh out the implementations of various PMU registers including
PM[X]EVCNTR and P
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20181105140327.8363-1-v.mayats...@gmail.com
Subject: [Qemu-devel] [PATCH 0/1 resend] Add vhost-pci-blk driver
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git
Hi,
This series failed docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20181101101715.9443-1-...@suse.com
Subject: [Qemu-devel] [PATCH RFC v7 0/9] qemu_thread_c
From: Mao Zhongyi
Signed-off-by: Mao Zhongyi
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/pci/pci_bridge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 08b7e
From: Philippe Mathieu-Daudé
Introduced in 48ebf2f90f8 and faf1e708d5b, these functions
were never used. Remove them.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/pci-bridge/xio3130_downstream.h | 11 ---
hw/pci-bridge
From: Laszlo Ersek
Expose the calculated "hole64 start" GPAs as plain uint64_t values,
extracting the internals of the current property getters.
This patch doesn't change behavior.
Cc: "Michael S. Tsirkin"
Cc: Alex Williamson
Cc: Gerd Hoffmann
Cc: Igor Mammedov
Cc: Marcel Apfelbaum
Signed-
From: "Singh, Brijesh"
Now that amd-iommu support interrupt remapping, enable the GASup in IVRS
table and GASup in extended feature register to indicate that IOMMU
support guest virtual APIC mode. GASup provides option to guest OS to
make use of 128-bit IRTE.
Note that the GAMSup is set to zero
From: Li Qiang
It seems that the intel link is unavailable, change it to point to the
qemu site.
Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Marcel Apfelbaum
Acked-by: Michael S. Tsirkin
Reviewed-by: Michael S. Tsirkin
---
hw/pci-host/piix.c | 2 +-
1 file chan
From: "Singh, Brijesh"
To be consistent with intel-iommu:
- rename the address space to use '_' instead of '-'
- update the memory region relationships
Signed-off-by: Brijesh Singh
Reviewed-by: Peter Xu
Cc: Peter Xu
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Edua
From: Li Qiang
Cc: qemu-triv...@nongnu.org
Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/pci-host/piix.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci
From: Laszlo Ersek
The "tests/acpi-test-data" files are currently not covered by any section
in MAINTAINERS, and "scripts/checkpatch.pl" complains when new data files
are added.
Cc: "Michael S. Tsirkin"
Cc: Alex Williamson
Cc: Gerd Hoffmann
Cc: Igor Mammedov
Cc: Marcel Apfelbaum
Signed-off-
From: Philippe Mathieu-Daudé
Noted while refactoring:
CC mips-softmmu/hw/mips/gt64xxx_pci.o
In file included from include/hw/pci-host/gt64xxx.h:2,
from hw/mips/gt64xxx_pci.c:30:
include/hw/pci/pci_bus.h:23:5: error: unknown type name ‘PCIIOMMUFunc’
From: "Singh, Brijesh"
Currently, the amdvi_validate_dte() assumes that a valid DTE will
always have V=1. This is not true. The V=1 means that bit[127:1] are
valid. A valid DTE can have IV=1 and V=0 (i.e address translation
disabled and interrupt remapping enabled)
Remove the V=1 check from amdv
test will be added by follow-up patch.
Signed-off-by: Michael S. Tsirkin
---
tests/data/acpi/q35/DSDT.mmio64 | Bin 0 -> 8947 bytes
tests/data/acpi/q35/SRAT.mmio64 | Bin 0 -> 224 bytes
2 files changed, 0 insertions(+), 0 deletions(-)
create mode 100644 tests/data/acpi/q35/DSDT.mmio64
create m
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/pci-bridge/ioh3420.h | 6 --
hw/pci-bridge/ioh3420.c | 2 +-
2 files changed, 1 insertion(+), 7 deletions(-)
delete mode 100644 hw/pci-bridge/ioh342
From: Yongji Xie
Some old guests (before commit 7a11370e5: "virtio_blk: enable VQs early")
kick virtqueue before setting VIRTIO_CONFIG_S_DRIVER_OK. This violates
the virtio spec. But virtio 1.0 transitional devices support this behaviour.
So we should start vhost when guest kicks in this case.
S
From: "Singh, Brijesh"
Register the interrupt remapping callback and read/write ops for the
amd-iommu-ir memory region.
amd-iommu-ir is set to higher priority to ensure that this region won't
be masked out by other memory regions.
Signed-off-by: Brijesh Singh
Cc: Peter Xu
Cc: "Michael S. Tsir
From: yuchenlin
There are 3 virtqueues (ctrl, event and cmd) for virtio scsi device,
but seabios will only set the physical address for the 3rd one (cmd).
Then in vhost_virtqueue_start(), virtio_queue_get_desc_addr()
will be 0 for ctrl and event vq.
In this case, ctrl and event vq are not initia
From: Peter Xu
We should handle VTD_FR_CONTEXT_ENTRY_P properly when synchronizing
shadow page tables. Having invalid context entry there is perfectly
valid when we move a device out of an existing domain. When that
happens, instead of posting an error we invalidate the whole region.
Without t
From: Laszlo Ersek
In commit 9fa99d2519cb ("hw/pci-host: Fix x86 Host Bridges 64bit PCI
hole", 2017-11-16), we meant to expose such a 64-bit PCI MMIO aperture in
the ACPI DSDT that would be at least as large as the new "pci-hole64-size"
property (2GB on i440fx, 32GB on q35). The goal was to offer
From: Li Qiang
Make them more QOMConventional.
Cc:qemu-triv...@nongnu.org
Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/pci-host/piix.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
d
From: "Singh, Brijesh"
The vtd_generate_msi_message() in intel-iommu is used to construct a MSI
Message from IRQ. A similar function will be needed when we add interrupt
remapping support in amd-iommu. Moving the function in common file to
avoid the code duplication. Rename it to x86_iommu_irq_to
From: "Singh, Brijesh"
When interrupt remapping is enabled, add a special IVHD device
(type IOAPIC).
Signed-off-by: Brijesh Singh
Acked-by: Peter Xu
Cc: Peter Xu
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Cc: Marcel Apfelbaum
Cc: Tom Lendacky
Cc
From: Peter Xu
There are two callers for vtd_sync_shadow_page_table_range(): one
provided a valid context entry and one not. Move that fetching
operation into the caller vtd_sync_shadow_page_table() where we need to
fetch the context entry.
Meanwhile, remove the error_report_once() directly sin
From: Laszlo Ersek
In commit 9fa99d2519cb ("hw/pci-host: Fix x86 Host Bridges 64bit PCI
hole", 2017-11-16), we meant to expose such a 64-bit PCI MMIO aperture in
the ACPI DSDT that would be at least as large as the new "pci-hole64-size"
property (2GB on i440fx, 32GB on q35). The goal was to offer
From: Gerd Hoffmann
Add memory bar to pci-testdev. Size is configurable using the membar
property. Setting the size to zero (default) turns it off. Can be used
to check whether guests handle large pci bars correctly.
Reviewed-by: Marc-André Lureau
Reviewed-by: Laszlo Ersek
Tested-by: Laszlo
From: "Singh, Brijesh"
Emulate the interrupt remapping support when guest virtual APIC is
not enabled.
For more info Refer: AMD IOMMU spec Rev 3.0 - section 2.2.5.1
When VAPIC is not enabled, it uses interrupt remapping as defined in
Table 20 and Figure 15 from IOMMU spec.
Signed-off-by: Brije
From: Peter Xu
QEMU is not handling the global DMAR switch well, especially when from
"on" to "off".
Let's first take the example of system reset.
Assuming that a guest has IOMMU enabled. When it reboots, we will drop
all the existing DMAR mappings to handle the system reset, however we'll
sti
From: "Singh, Brijesh"
Emulate the interrupt remapping support when guest virtual APIC is
enabled.
For more information refer: IOMMU spec rev 3.0 (section 2.2.5.2)
When VAPIC is enabled, it uses interrupt remapping as defined in
Table 22 and Figure 17 from IOMMU spec.
Signed-off-by: Brijesh Si
From: "Singh, Brijesh"
Interrupt remapping needs kernel-irqchip={off|split} on both Intel and AMD
platforms. Move the check in common place.
Signed-off-by: Brijesh Singh
Reviewed-by: Peter Xu
Cc: Peter Xu
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
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