> From: BALATON Zoltan
> Sent: Monday, February 11, 2019 5:01 AM
> To: qemu-devel@nongnu.org
> Cc: Aurelien Jarno; Aleksandar Markovic; Huacai Chen
> Subject: [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data
>
> The machine comes with 256M memory module by default but it's
>
On Tue, 5 Feb 2019 at 17:33, Eric Auger wrote:
>
> Add the kvm_arm_get_max_vm_phys_shift() helper that returns the
> log of the maximum IPA size supported by KVM. This capability
> needs to be known to create the VM with a specific IPA max size
> (kvm_type passed along KVM_CREATE_VM ioctl.
>
>
On 05.02.19 18:32, Eric Auger wrote:
> This patch adds the the memory hot-plug/hot-unplug infrastructure
> in machvirt. It is still not enabled as no device memory is allocated.
>
> Signed-off-by: Eric Auger
> Signed-off-by: Shameer Kolothum
> Signed-off-by: Kwangwoo Lee
>
> ---
> v4 -> v5:
>
On Tue, 5 Feb 2019 at 17:33, Eric Auger wrote:
>
> The machine RAM attributes will need to be analyzed during the
> configure_accelerator() process. especially kvm_type() arm64
> machine callback will use them to know how many IPA/GPA bits are
> needed to model the whole RAM range. So let's
On 14/02/19 17:21, Markus Armbruster wrote:
> * As an interim step, the #DeviceState:realized property can also be
> * set with qdev_init_nofail().
> * In the future, devices will propagate this state change to their children
> * and along busses they expose.
>
> This sentence is five years
> From: Aleksandar Markovic
> Sent: Monday, February 11, 2019 5:31 PM
> To: qemu-devel@nongnu.org
> Cc: aurel...@aurel32.net; Aleksandar Markovic; Aleksandar Rikalo;
> alex.ben...@linaro.org; Paul > Burton; c...@braap.org
> Subject: [PATCH v3 1/6] target/mips: compare virtual addresses in LL/SC
On Tue, 5 Feb 2019 at 17:33, Eric Auger wrote:
>
> From: Shameer Kolothum
>
> We introduce an helper to create a memory node.
>
> Signed-off-by: Eric Auger
> Signed-off-by: Shameer Kolothum
> ---
> hw/arm/boot.c | 54 ---
> 1 file changed, 34
On Thu, 2019-02-14 at 08:51 -0700, Alex Williamson wrote:
> On Thu, 14 Feb 2019 08:07:33 +0100
> Knut Omang wrote:
>
> > On Wed, 2019-02-13 at 12:13 -0700, Alex Williamson wrote:
> > > On Wed, 13 Feb 2019 10:29:58 +0100
> > > Knut Omang wrote:
> > >
> > > > Add a helper function to add PCIe
On 01/02/19 16:05, Philippe Mathieu-Daudé wrote:
> This lacks a DISPLAY dependency?
>
> $ i386-softmmu/qemu-system-i386 -M q35
> qemu-system-i386: Unknown device 'VGA' for bus 'PCIE'
> Aborted (core dumped)
If you got this with --without-default-devices, then it's intended behavior.
VGA_PCI is
On Thu, Feb 14, 2019 at 05:47:08PM +0100, Paolo Bonzini wrote:
> On 01/02/19 16:05, Philippe Mathieu-Daudé wrote:
> > This lacks a DISPLAY dependency?
> >
> > $ i386-softmmu/qemu-system-i386 -M q35
> > qemu-system-i386: Unknown device 'VGA' for bus 'PCIE'
> > Aborted (core dumped)
>
> If you got
On Thu, 14 Feb 2019 at 16:21, Markus Armbruster wrote:
>
> One of qdev's perennial sources of confusion is what to do at object
> instantiation time, i.e. in TypeInfo::instance_init(), and what to do at
> device realization time, i.e. in DeviceClass::realize().
Thanks for opening this topic.
On 14/02/19 17:40, Peter Maydell wrote:
>> ---
>> hw/i386/pc.c | 8 +--
>> include/standard-headers/asm-x86/bootparam.h | 34
>>
>> scripts/update-linux-headers.sh | 6 +
>> 3 files changed, 41 insertions(+), 7
On Tue, 5 Feb 2019 at 17:33, Eric Auger wrote:
>
> In preparation for a split of the memory map into a static
> part and a dynamic part floating after the RAM, let's rename the
> regions located after the RAM
>
> Signed-off-by: Eric Auger
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 5 Feb 2019 at 17:33, Eric Auger wrote:
>
> From: Alexey Kardashevskiy
>
> Since Linux'es ab66dcc76d "powerpc: generate uapi header and system call
> table files" there are 2 new files: unistd_32.h and unistd_64.h. These
> files content is moved from unistd.h so now we have to copy new
On Tue, 5 Feb 2019 at 19:14, Paolo Bonzini wrote:
>
> From: Li Zhijian
>
> it's from v4.20-rc5.
>
> CC: Stefano Garzarella
> CC: Michael S. Tsirkin
> Signed-off-by: Li Zhijian
> Reviewed-by: Michael S. Tsirkin
> Reviewed-by: Stefano Garzarella
> Signed-off-by: Paolo Bonzini
> ---
>
On 31/01/19 23:24, Philippe Mathieu-Daudé wrote:
> The model implementation is:
> - abstract SuperIO parent which can instantiate all configs,
> - child implementation.
>
> Childs require their parent, and even if the parent will instantiate
> them without all properties, the parent needs to link
One of qdev's perennial sources of confusion is what to do at object
instantiation time, i.e. in TypeInfo::instance_init(), and what to do at
device realization time, i.e. in DeviceClass::realize(). qdev-core.h's
comment falls short:
* # Realization #
* Devices are constructed in two stages,
On Sat, 9 Feb 2019 at 03:38, Richard Henderson
wrote:
>
> Changes since v2:
> * Fix some representational issues with FPSCR.
> * Use host vector saturation for SQADD/UQADD.
> This requires changing the internal representation of FPSR.QC.
> * Fix a latent vector bug, noticed during the
On 2/14/19 9:24 AM, Markus Armbruster wrote:
> Diff from v4:
>
> +++ b/qapi/Makefile.objs
> @@ -18,8 +18,9 @@ util-obj-y += $(QAPI_COMMON_MODULES:%=qapi-visit-%.o)
> util-obj-y += qapi-emit-events.o
> util-obj-y += $(QAPI_COMMON_MODULES:%=qapi-events-%.o)
>
> -common-obj-y +=
On Wed, 13 Feb 2019 at 18:31, Samuel Thibault
wrote:
>
> The following changes since commit 0b5e750bea635b167eb03d86c3d9a09bbd43bc06:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
> into staging (2019-02-12 10:53:37 +)
>
> are available in the Git repository
It looks like there was going to be code to check we had some sort of
alignment so lets replace it with an actual check. This is a bit more
useful than the enigmatic "failed to read the initial flash content"
when we attempt to read the number of bytes the device should have.
This is a potential
Am 14.02.2019 um 15:13 hat Alberto Garcia geschrieben:
> On Tue 12 Feb 2019 03:47:47 PM CET, Kevin Wolf wrote:
> > Am 17.01.2019 um 16:33 hat Alberto Garcia geschrieben:
> >> @@ -3861,6 +3923,10 @@ int bdrv_drop_intermediate(BlockDriverState *top,
> >> BlockDriverState *base,
> >> goto
On 2/14/19 4:57 AM, Igor Mammedov wrote:
> QEMU will crashes with
> qapi/qobject-output-visitor.c:210: qobject_output_complete: Assertion
> `qov->root && ((>stack)->slh_first == ((void *)0))' failed
> when trying to get value of not set hostmem's "host-nodes"
> property,
On Thu, 14 Feb 2019 08:07:33 +0100
Knut Omang wrote:
> On Wed, 2019-02-13 at 12:13 -0700, Alex Williamson wrote:
> > On Wed, 13 Feb 2019 10:29:58 +0100
> > Knut Omang wrote:
> >
> > > Add a helper function to add PCIe capability for Access Control Services
> > > (ACS)
> >
> > This is
On 2/13/19 5:50 PM, John Snow wrote:
>
> On 2/13/19 6:49 PM, John Snow wrote:
>> The following changes since commit 0b5e750bea635b167eb03d86c3d9a09bbd43bc06:
>>
>> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
>> into staging (2019-02-12 10:53:37 +)
>>
>> are
On 2/13/19 5:49 PM, John Snow wrote:
> When bitmaps are persistent, they may incur a disk read or write when bitmaps
> are added or removed. For configurations like virtio-dataplane, failing to
> acquire this lock will abort QEMU when disk IO occurs.
>
> We used to acquire aio_context as part of
Am 14.02.2019 um 16:21 hat Alberto Garcia geschrieben:
> On Tue 12 Feb 2019 03:54:15 PM CET, Kevin Wolf wrote:
> >> @@ -336,6 +340,10 @@ void commit_start(const char *job_id,
> >> BlockDriverState *bs,
> >> }
> >> }
> >>
> >> +if (bdrv_freeze_backing_chain(commit_top_bs, base,
Configuring QEMU with:
configure --target-list="x86_64-softmmu" --cc=clang --enable-pvrdma
Results in:
qemu/hw/rdma/rdma_rm_defs.h:108:3: error: redefinition of typedef
'RdmaDeviceResources' is a C11 feature [-Werror,-Wtypedef-redefinition]
} RdmaDeviceResources;
^
On Thu, 14 Feb 2019 at 14:56, Marc-André Lureau
wrote:
>
> Hi
>
> On Thu, Feb 14, 2019 at 12:30 PM Peter Maydell
> wrote:
> >
> > Ping! Thanks to Alex for doing low-level review of this patchset.
>
> Overall, looks good to me too.
>
> Minor nit: configure doesn't check presence of sphinx-build,
Diff from v4:
diff --git a/Makefile.objs b/Makefile.objs
index 95150d7173..5fb022d7ad 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -79,8 +79,8 @@ common-obj-$(CONFIG_FDT) += device_tree.o
##
# qapi
-common-obj-y +=
Having to include qapi-events.h just for QAPIEvent is suboptimal, but
quite tolerable now. It'll become problematic when we have events
conditional on the target, because then qapi-events.h won't be usable
from target-independent code anymore. Avoid that by generating it
into separate files.
Marc-André posted a v1 that relies on a QAPI schema language extension
'top-unit' to permit splitting the generated code. Here is his cover
letter:
The thrid and last part (of "[PATCH v2 00/54] qapi: add #if
pre-processor conditions to generated code") is about adding schema
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Reviewed-by: Eduardo Habkost
Acked-by: Cornelia Huck
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
include/sysemu/arch_init.h | 3 --
monitor.c | 3 --
qapi/misc.json
From: Marc-André Lureau
A few targets don't emit RTC_CHANGE, we could restrict the event to
the tagets that do emit it.
Note: There is a lot more of events & commands that we could restrict
to capable targets, with the cost of some additional complexity, but
the benefit of added correctness and
From: Marc-André Lureau
It depends on TARGET_PPC || TARGET_ARM || TARGET_I386 || TARGET_S390X.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eduardo Habkost
Acked-by: Cornelia Huck
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
include/sysemu/arch_init.h | 1 -
query-events doesn't reflect compile-time configuration. Instead of
fixing that, deprecate the command in favor of query-qmp-schema.
Libvirt prefers query-qmp-schema as of commit 22d7222ec0 "qemu: caps:
Don't call 'query-events' when we probe events from QMP schema".
It'll be in the next
We generate code for built-ins and sub-modules into separate files
since commit cdb6610ae42 and 252dc3105fc (v2.12.0). Both commits
neglected to update documentation. Do that now.
Signed-off-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
---
docs/devel/qapi-code-gen.txt | 38
Signed-off-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
---
docs/devel/qapi-code-gen.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/docs/devel/qapi-code-gen.txt b/docs/devel/qapi-code-gen.txt
index b91bde647c..c9ba8ddb2e 100644
--- a/docs/devel/qapi-code-gen.txt
+++
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Acked-by: Cornelia Huck
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
hw/s390x/s390-skeys.c | 2 +-
include/sysemu/arch_init.h | 7 --
monitor.c |
From: Marc-André Lureau
Move rtc-reset-reinjection and SEV in target.json and make them
conditional on TARGET_I386.
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
hw/timer/mc146818rtc.c | 2 +-
monitor.c | 31
From: Marc-André Lureau
This command is no longer needed, the schema has compile-time
configuration conditions.
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
include/qapi/qmp/dispatch.h | 1 -
qapi/qmp-registry.c | 8
2
The next commit wants to generate qapi-emit-events.{c.h}. To enable
that, extend QAPISchemaModularCVisitor to support additional "system
modules", i.e. modules that don't correspond to a (user-defined) QAPI
schema module.
Signed-off-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
---
Adding QAPI's .o to util-obj-y, common-obj-y and obj-y is spread over
three places: Makefile.objs takes care of target-independent generated
code, Makefile.target of target-dependent generated code, and
qapi/Makefile.objs of (target-independent) hand-written code.
Do everything in
We neglect to call .visit_module() for the special module we use for
built-ins. Harmless, but clean it up anyway. The
tests/qapi-schema/*.out now show the built-in module as 'module None'.
Subclasses of QAPISchemaModularCVisitor need to ._add_module() this
special module to enable code
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
monitor.c| 11 ---
qapi/misc.json | 43 --
qapi/target.json | 45
This reverts commit 7bd263490590ee6fcf34ecb6203437e22f6e5a9c.
The commit applied the events' conditions to the members of enum
QAPIEvent. Awkward, because it renders QAPIEvent unusable in
target-independent code as soon as we make an event target-dependent.
Reverting this has the following
From: Marc-André Lureau
The following patches are going to introduce per-target #ifdef in the
schemas.
The introspection data is statically generated once, and must thus be
built per-target to reflect target-specific configuration.
Drop "do_test_visitor_in_qmp_introspect(_schema_qlit)" since
On Wed, 13 Feb 2019 at 16:19, Marc-André Lureau
wrote:
>
> The following changes since commit 0b5e750bea635b167eb03d86c3d9a09bbd43bc06:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
> into staging (2019-02-12 10:53:37 +)
>
> are available in the Git repository
We can't add appropriate target-specific conditionals to misc.json,
because that would make all of misc.json unusable in
target-independent code. To keep misc.json target-independent, we
need to split off target-dependent target.json.
This commit doesn't actually split off anything, it merely
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Acked-by: Cornelia Huck
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
qapi/target.json | 6 ++
1 file changed, 6 insertions(+)
diff --git a/qapi/target.json b/qapi/target.json
index 17671d77c1..010df35ebb
On Tue 12 Feb 2019 03:54:15 PM CET, Kevin Wolf wrote:
>> @@ -336,6 +340,10 @@ void commit_start(const char *job_id, BlockDriverState
>> *bs,
>> }
>> }
>>
>> +if (bdrv_freeze_backing_chain(commit_top_bs, base, errp) < 0) {
>> +goto fail;
>> +}
>
> Don't error paths
On Thu, Feb 14, 2019 at 3:56 PM Richard Henderson
wrote:
>
> On 2/14/19 1:16 AM, Laurent Desnogues wrote:
> > Hello,
> >
> > On Thu, Feb 14, 2019 at 5:00 AM Richard Henderson
> > wrote:
> >>
> >> Note that float16_to_float32 rightly squashes SNaN to QNaN.
> >> But of course pickNaNMulAdd, for
On Sun, 10 Feb 2019 at 16:57, Mark wrote:
>
> Signed-off-by: Mark
Hi; thanks for submitting this patch! I have some review
comments below. As Andrew suggests, it's probably also a good
idea to look at Gregory Estrade's implementation of the timer,
to see which is the best basis for a patchset
Hi
On Thu, Feb 14, 2019 at 12:30 PM Peter Maydell wrote:
>
> Ping! Thanks to Alex for doing low-level review of this patchset.
Overall, looks good to me too.
Minor nit: configure doesn't check presence of sphinx-build, and on my
fc29, it's sphinx-build-3 :)
CI files will probably need to be
On 2/14/19 1:16 AM, Laurent Desnogues wrote:
> Hello,
>
> On Thu, Feb 14, 2019 at 5:00 AM Richard Henderson
> wrote:
>>
>> Note that float16_to_float32 rightly squashes SNaN to QNaN.
>> But of course pickNaNMulAdd, for ARM, selects SNaNs first.
>> So we have to preserve SNaN long enough for the
On 2/14/19 4:15 PM, Igor Mammedov wrote:
On Thu, 14 Feb 2019 15:12:35 +0200
Marcel Apfelbaum wrote:
Hi Igor, Jing
On 2/14/19 1:31 PM, Igor Mammedov wrote:
On Wed, 13 Feb 2019 15:40:57 +0800
"Liu, Jing2" wrote:
Hi Igor,
Thanks for your reply!
On 2/5/2019 11:47 PM, Igor Mammedov
Peter Maydell writes:
> On Tue, 5 Feb 2019 at 20:21, Alex Bennée wrote:
>>
>> Hi,
>>
>> I've re-spun the cpuid patches with the changes suggested by Peter's
>> review. The biggest change is the squashing of bits is now all data
>> driven with ARMCPRegUserSpaceInfo being used to control how
On Wed, 13 Feb 2019 at 15:45, Palmer Dabbelt wrote:
>
> merged tag 'pull-tcg-20190211'
> Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
> The following changes since commit 22c5f446514a2a4bb0dbe1fea26713da92fc85fa:
>
> Merge remote-tracking branch
Marc-André Lureau writes:
> Hi
>
> On Thu, Feb 14, 2019 at 10:44 AM Markus Armbruster wrote:
>>
>> Adding QAPI's .o to util-obj-y, common-obj-y and obj-y is spread over
>> three places: Makefile.objs takes care of target-independent generated
>> code, Makefile.target of target-dependent
Hi Yuval,
On 2/13/19 8:53 AM, Yuval Shaia wrote:
Hi,
Please review the following patch-set which consist of cosmetics fixes to
device's user interface (traces, error_report and monitor) and some bug
fixes.
Thanks Markus, Eric, Marcel and David for reviewing v0.
Appreciate your review to this
On Tue 12 Feb 2019 03:47:47 PM CET, Kevin Wolf wrote:
> Am 17.01.2019 um 16:33 hat Alberto Garcia geschrieben:
>> @@ -3861,6 +3923,10 @@ int bdrv_drop_intermediate(BlockDriverState *top,
>> BlockDriverState *base,
>> goto exit;
>> }
>>
>> +if (bdrv_is_backing_chain_frozen(top,
On Thu, 14 Feb 2019 15:12:35 +0200
Marcel Apfelbaum wrote:
> Hi Igor, Jing
>
> On 2/14/19 1:31 PM, Igor Mammedov wrote:
> > On Wed, 13 Feb 2019 15:40:57 +0800
> > "Liu, Jing2" wrote:
> >
> >> Hi Igor,
> >>
> >> Thanks for your reply!
> >>
> >> On 2/5/2019 11:47 PM, Igor Mammedov wrote:
>
On Tue, 5 Feb 2019 at 20:21, Alex Bennée wrote:
>
> Hi,
>
> I've re-spun the cpuid patches with the changes suggested by Peter's
> review. The biggest change is the squashing of bits is now all data
> driven with ARMCPRegUserSpaceInfo being used to control how bits are
> altered for userspace
I'm considering to deprecating -mem-path/prealloc CLI options and replacing
them with a single memdev Machine property to allow interested users to pick
used backend for initial RAM (fixes mixed -mem-path+hostmem backends issues)
and as a transition step to modeling initial as a Device instead of
Public bug reported:
When building a package with sbuild on Debian, sbuild can use aptitude
to resolve dependencies.
Recently, some changes introduced to aptitude or related packages cause
qemu to crash:
(sid-m68k-sbuild)root@nofan:/# aptitude -y --without-recommends -o
On Wed, 6 Feb 2019 at 05:29, Richard Henderson
wrote:
>
> For opcodes 0-5, move some if conditions into the structure
> of a switch statement. For opcodes 6 & 7, decode everything
> at once with a second switch.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Wed, 6 Feb 2019 at 05:29, Richard Henderson
wrote:
>
> Changes since v1:
> * Typo fixed in patch 2, which had scrogged FMOV
> * Return 0 for NaN, as for any other ARM fp conversion.
>
>
> r~
>
>
> Richard Henderson (3):
> target/arm: Force result size into dp after operation
>
On Wed, 6 Feb 2019 at 05:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> v2: Return 0 for NaN
> ---
> +/* The the fraction is shifted out entirely. */
"The the"...
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index
On 12/02/2019 14:35, Alberto Garcia wrote:
> On Mon 11 Feb 2019 05:58:05 PM CET, Vladimir Sementsov-Ogievskiy wrote:
The problem is in the concept of "base" node. The code written in
manner that base is not changed during block job. However, job don't
own base and there is no
On 14/02/2019 12:43, Andreas Schwab wrote:
> System calls that return a socket address do so by writing the (possibly
> truncated) address into the provided buffer space, but setting the
> addrlen parameter to the actual size of the address. To determine how
> much to copy back to the target
On 07/02/2019 15:51, Andreas Schwab wrote:
> System calls that return a socket address do so by writing the (possibly
> truncated) address into the provided buffer space, but setting the addrlen
> parameter to the actual size of the address. To determine how much to
> copy back to the target
Patchew URL: https://patchew.org/QEMU/20190213195501.7790-1-js...@redhat.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
On Tue, 12 Feb 2019 at 21:30, Richard Henderson
wrote:
>
> v2 fixes the clang build failure. I've addressed this by changing
> the names of two of the insns.decode argument sets. This could
> probably use an additional error from decodetree.py itself...
>
> Only reposting the changed patch,
On 2/13/19 8:53 AM, Yuval Shaia wrote:
To make code more readable move handling of protected list to a
rdma_utils
Signed-off-by: Yuval Shaia
---
hw/rdma/rdma_backend.c | 20 +--
hw/rdma/rdma_backend_defs.h | 8 ++--
hw/rdma/rdma_utils.c| 39
On 2/13/19 4:46 PM, Yuval Shaia wrote:
On Wed, Feb 13, 2019 at 01:40:34PM +0100, Philippe Mathieu-Daudé wrote:
On 2/13/19 7:53 AM, Yuval Shaia wrote:
The function argument rdma_dev_res is not needed as it is stored in the
backend_dev object at init.
Signed-off-by: Yuval Shaia
Reviewed-by:
Hi Igor, Jing
On 2/14/19 1:31 PM, Igor Mammedov wrote:
On Wed, 13 Feb 2019 15:40:57 +0800
"Liu, Jing2" wrote:
Hi Igor,
Thanks for your reply!
On 2/5/2019 11:47 PM, Igor Mammedov wrote:
On Wed, 30 Jan 2019 21:02:10 +0800
"Liu, Jing2" wrote:
Hi everyone,
I have two questions.
1. PCI
> From: Aleksandar Markovic
> Sent: Thursday, February 14, 2019 12:18 PM
> To: qemu-devel@nongnu.org
> Cc: aurel...@aurel32.net; Aleksandar Markovic; Aleksandar Rikalo;
> alex.ben...@linaro.org
> Subject: [PATCH v3 0/9] target/mips: Add MSA ASE tests
>
> From: Aleksandar Markovic
>
> v2->v3:
>
On 2/13/19 12:21 PM, Dr. David Alan Gilbert wrote:
* Yuval Shaia (yuval.sh...@oracle.com) wrote:
Allow interrogating device internals through HMP interface.
The exposed indicators can be used for troubleshooting by developers or
sysadmin.
There is no need to expose these attributes to a
This patchset adds a model of the Arm Musca devboards
('musca-a' and 'musca-b1').
These boards are described here:
https://developer.arm.com/products/system-design/development-boards/iot-test-chips-and-boards/musca-a-test-chip-board
Create a new include file for the pl011's device struct,
type macros, etc, so that it can be instantiated using
the "embedded struct" coding style.
Signed-off-by: Peter Maydell
---
include/hw/char/pl011.h | 34 ++
hw/char/pl011.c | 31
The Musca board puts its SRAM and flash behind TrustZone
Memory Protection Controllers (MPCs). Each MPC sits between
the CPU and the RAM/flash, and also has a set of memory mapped
control registers. Wire up the MPCs, and the memory behind them.
For the moment we implement the flash as simple ROM,
The PL011 UART has six interrupt lines:
* RX (receive data)
* TX (transmit data)
* RT (receive timeout)
* MS (modem status)
* E (errors)
* combined (logical OR of all the above)
So far we have only emulated the combined interrupt line;
add support for the others, so that boards that wire
Wire up the two PL011 UARTs in the Musca board.
Signed-off-by: Peter Maydell
---
hw/arm/musca.c | 34 +-
1 file changed, 29 insertions(+), 5 deletions(-)
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index ec8dfee1964..e9701533d20 100644
--- a/hw/arm/musca.c
+++
The Peripheral Protection Controller's handling of unused ports
is that if there is nothing connected to the port's downstream
then it does not create the sysbus MMIO region for the upstream
end of the port. This results in odd behaviour when there is
an unused port in the middle of the range:
On Mon, 11 Feb 2019 at 16:49, Richard Henderson
wrote:
>
> On 2/11/19 8:19 AM, Peter Maydell wrote:
> > Thanks. Richard: is this effectively a bugfix for big-endian guest code ?
>
> Yes.
Thanks, applied to target-arm.next; I've added a line to the commit
message to note that it only affects BE
The Musca-A and Musca-B1 development boards are based on the
SSE-200 subsystem for embedded. Implement an initial skeleton
model of these boards, which are similar but not identical.
This commit creates the board model with the SSE and the IRQ
splitters to wire IRQs up to its two CPUs. As yet
Wire up the PL031 RTC for the Musca board.
Signed-off-by: Peter Maydell
---
hw/arm/musca.c | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 5fadac8c09b..ec8dfee1964 100644
--- a/hw/arm/musca.c
+++
The Musca boards have DAPLink firmware that sets the initial
secure VTOR value (the location of the vector table) differently
depending on the boot mode (from flash, from RAM, etc). Export
the init-svtor as a QOM property of the ARMSSE object so that
the board can change it.
Signed-off-by: Peter
Many of the devices on the Musca board live behind TrustZone
Peripheral Protection Controllers (PPCs); add models of the
PPCs, using a similar scheme to the MPS2 board models.
This commit wires up the PPCs with "unimplemented device"
stubs behind them in the correct places in the address map.
In commit 91c1e9fcbd7548db368 where we added dual-CPU support to
the ARMSSE, we set up the wiring of the expansion IRQs via nested
loops: the outer loop on 'i' loops for each CPU, and the inner loop
on 'j' loops for each interrupt. Fix a typo which meant we were
wiring every expansion IRQ line to
Create a new include file for the pl031's device struct,
type macros, etc, so that it can be instantiated using
the "embedded struct" coding style.
Signed-off-by: Peter Maydell
---
include/hw/timer/pl031.h | 44
hw/timer/pl031.c | 25
In commit 4b635cf7a95e501211 we added a QOM property to the ARMSSE
object, but forgot to add it to the documentation comment in the
header. Correct the omission.
Fixes: 4b635cf7a95e501211 ("hw/arm/armsse: Make SRAM bank size configurable")
Signed-off-by: Peter Maydell
---
Convert the debug printing in the PL031 device to use trace events,
and augment it to cover the interesting parts of device operation.
Signed-off-by: Peter Maydell
---
hw/timer/pl031.c | 55 +++
hw/timer/trace-events | 6 +
2 files changed, 36
The pl011 logs when the guest makes a bad access. It prints
the address offset in hex but confusingly omits the '0x'
prefix; add it.
Signed-off-by: Peter Maydell
---
hw/char/pl011.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index
There is a small window between the twice blk_is_available in
scsi_disk_emulate_command which would cause crash due to the later
assertion if the remote cdrom is detached in this window.
So this patch replaces assertions with return to avoid qemu crash.
Signed-off-by: Xiang Zheng
---
The qemu
A new CPU model facilities is introduced to support AP devices
interruption interception for a KVM guest.
"APQI" for "AP-Queue Interruption" facility
The S390_FEAT_AP_QUEUE_INTERRUPT_CONTROL, CPU facility indicates
whether the PQAP instruction with the AQIC command is available
to the guest.
This QEMU patch is to be used in conjonction with the following patch
series in LINUX.
vfio: ap: ioctl definitions for AP Queue Interrupt Control
The LINUX patch series handle all the interception in KVM
and we do not need to take care of the interception in QEMU.
The goal of this patch is to
Patchew URL:
https://patchew.org/QEMU/20190214102816.3393-1-peter.mayd...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214102816.3393-1-peter.mayd...@linaro.org
Subject: [Qemu-devel] [PATCH v2 0/7] ui/cocoa: Use
Alex Bennée writes:
> Peter Maydell writes:
>
>> On Wed, 13 Feb 2019 at 16:29, Alex Bennée wrote:
>>>
>>>
>>> Peter Maydell writes:
>>>
>>> > At the moment the Arm implementations of kvm_arch_{get,put}_registers()
>>> > don't support having QEMU change the values of system registers
>>> >
System calls that return a socket address do so by writing the (possibly
truncated) address into the provided buffer space, but setting the
addrlen parameter to the actual size of the address. To determine how
much to copy back to the target memory the emulation needs to remember
the incoming
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