On Thu, 14 Feb 2019 18:58:46 +
Peter Maydell wrote:
Hi
> Hi; Coverity detected an issue in contrib/elf2dmp/main.c (CID
> 1398641). In this loop:
>
> for (; KernBase >= 0xf780; KernBase -= PAGE_SIZE) {
> nt_start_addr = va_space_resolve(, KernBase);
> if
On Fri, 15 Feb 2019, Peter Maydell wrote:
On Fri, 15 Feb 2019 at 01:28, BALATON Zoltan wrote:
On Thu, 14 Feb 2019, Peter Maydell wrote:
- (void)sendEvent:(NSEvent *)event
{
COCOA_DEBUG("QemuApplication: sendEvent\n");
-[super sendEvent: event];
+if (!cocoaView || ![cocoaView
On Fri, Feb 15, 2019 at 02:29:59PM +0100, David Hildenbrand wrote:
> This is a set of tests to test basic device unplugging functionality for
> - some PCI implementations
> - CCW devices on s390x
> - spapr memory and cpu core devices
>
> I plaed with ACPI CPU unplug but getting that to run with
On 02/15/19 17:01, Markus Armbruster wrote:
> The size of the flash chip is a property of the machine. It is *fixed*.
I'll have to disagree on this one; in OVMF's case, you can build OVMF in
1MB, 2MB, and 4MB *cumulative* size (that is, the numbers I give here
each refer to the sum of both
On 15.02.19 18:02, Richard Henderson wrote:
> Previously this was only supported for roundAndPackFloat64.
>
> New support in round_canonical, round_to_int, float128_round_to_int,
> roundAndPackFloat32, roundAndPackInt32, roundAndPackInt64,
> roundAndPackUint64. This does not include any of the
On 15.02.19 22:27, Michael S. Tsirkin wrote:
> On Fri, Feb 15, 2019 at 02:29:59PM +0100, David Hildenbrand wrote:
>> This is a set of tests to test basic device unplugging functionality for
>> - some PCI implementations
>> - CCW devices on s390x
>> - spapr memory and cpu core devices
>>
>> I plaed
Peter Maydell writes:
> On Wed, 30 Jan 2019 at 07:41, Gerd Hoffmann wrote:
>>
>> From: Bandan Das
>>
>> For every MTP_WRITE_BUF_SZ copied, this patch writes it to file before
>> getting the next block of data. The file is kept opened for the
>> duration of the operation but the sanity checks
Before kernel 4.20.x this was not an issue as nested virtualization was
not enabled by default. In any distribution using 4.20.x or later,
snapshots and migration do not work.
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Adding System Information
** Attachment added: "System-Details.txt"
https://bugs.launchpad.net/qemu/+bug/1816189/+attachment/5238921/+files/System-Details.txt
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Public bug reported:
With an update to Qemu (3.1.x) I am unable to revert snapshots using
virt-manager or virsh. Virtual Machines existing before the update seem
to function properly. It is only after creating a new machine that
snapshots are misbehaving. I tested spinning up vms of tumbleweed,
Kris, your situation is completely different.
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https://bugs.launchpad.net/bugs/1816052
Title:
qemu system emulator fails to start if no sound card is present on
host
Status in
Don't know if same but just noticed "no sound" unless I unplug and
replug headphones. If I boot with no headphones plugged in I get no
sound, but if I plug in headphones I get sound. Of course, then, if I
unplug headphones I still get sound. Something about plugging/unplugging
to the headphones
That was Ubuntu DD current on comment #1
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https://bugs.launchpad.net/bugs/1816052
Title:
qemu system emulator fails to start if no sound card is present on
host
Status in QEMU:
On 2/15/19 5:25 PM, Paul Durrant wrote:
> The if() statement is clearly bogus (dead code which should have been
> cleaned up when grant mapping was removed).
"... was removed in 06454c24ad)."
>
> Spotted by Coverity: CID 1398635
>
> While in the neighbourhood, add a missing 'fall through'
On 2/15/19 4:36 PM, Daniel P. Berrangé wrote:
> The type 3 SMBIOS structure[1] ends with fields
>
> ...
> 0x14 - contained element count
> 0x15 - contained element record length
> 0x16 - sku number
>
> The smbios_type_3 struct missed the contained element record
> length field,
On 2/15/19 12:37 PM, Peter Maydell wrote:
> Coverity points out (CID 1398632, CID 1398650) that we
> leak a couple of allocated strings in the error-exit
> code path for setting up the MHUs in the ARMSSE.
> Fix this bug by moving the allocate-and-free of each
> string to be closer to the use, so
On 2/15/19 12:52 PM, Marc-André Lureau wrote:
> SDL dependency was removed in commit
> f29b3431f6294168e5f8fc63edb91c15c6a08e41.
>
> Signed-off-by: Marc-André Lureau
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
> ---
> chardev/Makefile.objs | 1 -
> 1 file changed,
Patchew URL:
https://patchew.org/QEMU/20190215192302.27855-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190215192302.27855-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH v4 0/8]
Patchew URL:
https://patchew.org/QEMU/20190215192302.27855-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190215192302.27855-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH v4 0/8]
HP-UX checks this register after sending data to the target. If there's no valid
information present, it assumes the client disconnected because the kernel sent
to much data. Implement at least some of the SBCL functionality that is possible
without having a real SCSI bus.
Signed-off-by: Sven
On Fri, Feb 15, 2019 at 10:36:53AM +0100, Paolo Bonzini wrote:
> > HP-UX checks this register after sending data to the target. If there's no
> > valid
> > information present, it assumes the client disconnected because the kernel
> > sent
> > to much data. Implement at least some of the SBCL
Move all of the fp helpers out of helper.c into a new file.
This is code movement only. Since helper.c has no copyright
header, take the one from cpu.h for the new file.
Signed-off-by: Richard Henderson
---
target/arm/helper.c | 1062 -
Note that float16_to_float32 rightly squashes SNaN to QNaN.
But of course pickNaNMulAdd, for ARM, selects SNaNs first.
So we have to preserve SNaN long enough for the correct NaN
to be selected. Thus float16_to_float32_by_bits.
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 5
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 5
target/arm/translate-a64.c | 50 +-
2 files changed, 54 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 1eea1a408b..69589573e4 100644
---
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 1 +
target/arm/cpu64.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 8ea6569088..b9fa548718 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2003,6 +2003,7 @@ static void
There are lots of special cases within these insns. Split the
major argument decode/loading/saving into no_output (compares),
rd_is_dp, and rm_is_dp.
We still need to special case argument load for compare (rd as
input, rm as zero) and vcvt fixed (rd as input+output), but lots
of special cases
Changes since v3:
Rebased on master, and combined the JSConv and FHM patch sets.
There were a number of patch conflicts which needed fixing up.
Changes since v2:
Patch 2 splits out vfp_helper.c, which I wrote for something else.
But while rebasing it occured to me that helper_vjcvt is better
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 5 ++
target/arm/translate.c | 103 +
2 files changed, 79 insertions(+), 29 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 69589573e4..9cf439fb8d 100644
---
Signed-off-by: Richard Henderson
---
v2: Return 0 for NaN
v3: Return aa32 flags in FPSCR.NZCV.
---
target/arm/cpu.h | 10 +
target/arm/helper.h| 3 ++
target/arm/cpu.c | 1 +
target/arm/cpu64.c | 2 +
target/arm/translate-a64.c | 26 +++
For opcodes 0-5, move some if conditions into the structure
of a switch statement. For opcodes 6 & 7, decode everything
at once with a second switch.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 94 --
1 file changed, 49 insertions(+),
Peter Maydell writes:
> On Fri, 15 Feb 2019 at 18:45, Bandan Das wrote:
>>
...
>> I believe this is a false positive, there's still more data incoming
>> and we have successfully written the data we got this time, so we return
>> without freeing up any of the structures. I will add a comment
On 23.01.19 11:33, Stefan Hajnoczi wrote:
> The previous patch includes the LUKS payload overhead into the qemu-img
> measure calculation for qcow2. Update qemu-iotests 178 to exercise this
> new code path.
>
> Reviewed-by: Max Reitz
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by:
On 23.01.19 11:33, Stefan Hajnoczi wrote:
> LUKS encryption reserves clusters for its own payload data. The size of
> this area must be included in the qemu-img measure calculation so that
> we arrive at the correct minimum required image size.
>
> (Ab)use the qcrypto_block_create() API to
On Fri, 15 Feb 2019 at 18:45, Bandan Das wrote:
>
> Peter Maydell writes:
> > CID 1398642: This early-return case in usb_mtp_write_data() returns
> > from the function without doing any of the cleanup (closing file,
> > freeing data, etc). Possibly it should be "goto done;" instead ?
> > The
On 2/15/19 8:30 AM, David Hildenbrand wrote:
The issue with testing asynchronous unplug requests it that they usually
require a running guest to handle the request. However, to test if
unplug of PCI devices works, we can apply a nice little trick on some
architectures:
On system reset, x86
Patchew URL:
https://patchew.org/QEMU/20190215174548.2630-1-yury-ko...@yandex-team.ru/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190215174548.2630-1-yury-ko...@yandex-team.ru
Subject: [Qemu-devel] [PATCH v3 0/5] Add
On 15/02/19 16:42, Igor Mammedov wrote:
>>
>> What about -m, too? Then you'd specify a memdev instead of the initial
>> memory size.
> that somewhat what I've planned,
> make -m X translate into -object
> memory-backend-ram,id=magically-get-what-board-uses-now,size=X -machine
> memdev=thatid
>
Patchew URL:
https://patchew.org/QEMU/20190215174548.2630-1-yury-ko...@yandex-team.ru/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190215174548.2630-1-yury-ko...@yandex-team.ru
Subject: [Qemu-devel] [PATCH v3 0/5] Add
The region 0x4001 .. 0x4001 and its secure-only alias
at 0x5001... are for per-CPU devices. We implement this by
giving each CPU its own container memory region, where the
per-CPU devices live. Unfortunately, the alias region which
makes devices mapped at 0x4... addresses also appear
The implementation of the TAP net backend already supports the case
(s->host_vnet_hdr_len && !s->using_vnet_hdr), which means that
the TAP device is expecting the header, while the net frontend
(emulated device) is not aware of it. This case is handled by
stripping or prepending the (zeroed)
If ignore-shared capability is set then skip shared RAMBlocks during the
RAM migration.
Also, move qemu_ram_foreach_migratable_block (and rename) to the
migration code, because it requires access to the migration capabilities.
Signed-off-by: Yury Kotov
---
exec.c| 19
Hi,
I was doing experiments with a custom paravirtualized net device,
and I ran into a limitation of the TAP backend. I see from the kernel
code that it is not possible to set the TAP virtio-net header
length to something different from 10 or 12, which means that it
is not possible to set it to
Currently we don't check which capabilities set in the source QEMU.
We just expect that the target QEMU has the same enabled capabilities.
Add explicit validation for capabilities to make sure that the target VM
has them too. This is enabled for only new capabilities to keep compatibily.
Signed-off-by: Yury Kotov
---
tests/migration-test.c | 131 +
1 file changed, 106 insertions(+), 25 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 8352612364..dd604c4f21 100644
--- a/tests/migration-test.c
+++
Hi,
The series adds a migration capability, which allows to skip shared RAM blocks
during the migration. It's useful for fast local migration. E.g. to update QEMU
for the running guests.
Usage example:
1. Start source VM:
qemu-system-x86 \
-m 4G \
-object
We want to use local migration to update QEMU for running guests.
In this case we don't need to migrate shared (file backed) RAM.
So, add a capability to ignore such blocks during live migration.
Signed-off-by: Yury Kotov
---
migration/migration.c | 14 ++
migration/migration.h | 1
Currently, qemu_ram_foreach_* calls RAMBlockIterFunc with many
block-specific arguments. But often iter func needs RAMBlock*.
This refactoring is needed for fast access to RAMBlock flags from
qemu_ram_foreach_block's callback. The only way to achieve this now
is to call qemu_ram_block_from_host
On 14.02.19 00:24, Eric Blake wrote:
> On 2/13/19 4:53 PM, Max Reitz wrote:
>> The commit and mirror block nodes are filters, so they should be marked
>> as such.
>>
>> Signed-off-by: Max Reitz
>> Reviewed-by: Alberto Garcia
>> ---
>> block/commit.c | 2 ++
>> block/mirror.c | 2 ++
>> 2 files
On Fri, 15 Feb 2019 18:29:19 +0100
Thomas Huth wrote:
> On 18/12/2018 12.56, Philippe Mathieu-Daudé wrote:
> > The VFIO helpers are used by the NVMe block driver, add the
> > entries to both sections.
> >
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > v2: add util/vfio-helpers.c, add
On 18/12/2018 12.56, Philippe Mathieu-Daudé wrote:
> The VFIO helpers are used by the NVMe block driver, add the
> entries to both sections.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> v2: add util/vfio-helpers.c, add entries to NVMe section
> ---
> MAINTAINERS | 5 +
> 1 file
On 18/12/2018 12.56, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> v2: Moved from TCG to KVM section
> ---
> MAINTAINERS | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 83c127f0d6..771b1c7b94 100644
> --- a/MAINTAINERS
The various ACL related commands are obsolete now that the QAuthZ
framework for authorization is fully integrated throughout QEMU network
services. Mark it as deprecated with no replacement to be provided.
Authorization is now provided by using 'object_add' together with
the 'tls-authz' or
From: "Daniel P. Berrange"
Currently any client which can complete the TLS handshake is able to use
a chardev server. The server admin can turn on the 'verify-peer' option
for the x509 creds to require the client to provide a x509
certificate. This means the client will have to acquire a
Text from "docs/nvdimm.txt" says:
Guest Data Persistence
--
Though QEMU supports multiple types of vNVDIMM backends on Linux,
currently the only one that can guarantee the guest write persistence
is the device DAX on the real NVDIMM device (e.g., /dev/dax0.0), to
which all
From: "Daniel P. Berrange"
As with the previous patch to qemu-nbd, the nbd-server-start QMP command
also needs to be able to specify authorization when enabling TLS encryption.
First the client must create a QAuthZ object instance using the
'object-add' command:
{
'execute':
From: "Daniel P. Berrange"
The VNC server has historically had support for ACLs to check both the
SASL username and the TLS x509 distinguished name. The VNC server was
responsible for creating the initial ACL, and the client app was then
responsible for populating it with rules using the HMP
From: "Daniel P. Berrange"
Currently any client which can complete the TLS handshake is able to use
the NBD server. The server admin can turn on the 'verify-peer' option
for the x509 creds to require the client to provide a x509 certificate.
This means the client will have to acquire a
v1: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg04482.html
v2: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg05727.html
v3: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg01639.html
This series builds on the core authorization framework:
v8:
From: "Daniel P. Berrange"
The QEMU instance that runs as the server for the migration data
transport (ie the target QEMU) needs to be able to configure access
control so it can prevent unauthorized clients initiating an incoming
migration. This adds a new 'tls-authz' migration parameter that is
From: Benjamin Herrenschmidt
That "b" means "base address" and thus shouldn't be in the name
of actual entries and related constants.
This patch keeps the synthetic patb_entry field of the spapr
virtual hypervisor unchanged until I figure out if that has
an impact on the migration stream.
On 2/15/19 7:12 AM, Eric Blake wrote:
> On 2/15/19 7:03 AM, Denis Plotnikov wrote:
>> Adds a fast path on aio context setting preventing
>> unnecessary context setting routine.
>> Also, it prevents issues with cyclic walk of child
>> bds-es appeared because of registering aio walking
>> notifiers:
From: Benjamin Herrenschmidt
(Might need more patch splitting)
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Cédric Le Goater
---
target/ppc/mmu-book3s-v3.h | 45 ++
target/ppc/mmu-hash64.h| 19 +---
target/ppc/mmu-book3s-v3.c | 18
Hello,
Here is another series of fixes and extensions from Ben providing
support for POWER9 native hash MMU and POWER9 native radix MMU. These
prepare ground for the support of QEMU POWER9 PowerNV machines.
>From there, I hand over the patchset to Suraj for any follow-ups.
Thanks,
C.
Benjamin
From: Benjamin Herrenschmidt
Now that LPCR:HR is set properly for SPAPR, use it for deciding
the translation type, which also works for bare metal
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Cédric Le Goater
---
target/ppc/mmu-book3s-v3.h | 14 +-
v1: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg04482.html
v2: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg05727.html
v3: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg01639.html
This series builds on the core authorization framework:
v8:
mis-fire.
Ignore this one, I used the wrong base branch to git-publish and didn't
interrupt it quickly enough
Re-posted v4 with correct base.
On Fri, Feb 15, 2019 at 05:13:28PM +, Daniel P. Berrangé wrote:
> v1: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg04482.html
> v2:
From: Benjamin Herrenschmidt
Let's use the generic helper tlb_flush_all_cpus_synced() instead
of iterating the CPUs ourselves.
We do lose the optimization of clearing the "other" CPUs "need flush"
flags but this shouldn't be a problem in practice.
Signed-off-by: Benjamin Herrenschmidt
From: Benjamin Herrenschmidt
Our TCG TLB only tags whether it's a HV vs a guest access, so it must
be flushed when the LPIDR is changed.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Cédric Le Goater
---
target/ppc/helper.h | 1 +
target/ppc/misc_helper.c| 15
The inotify userspace API for reading events is quite horrible, so it is
useful to wrap it in a more friendly API to avoid duplicating code
across many users in QEMU. Wrapping it also allows introduction of a
platform portability layer, so that we can add impls for non-Linux based
equivalents in
From: Benjamin Herrenschmidt
No guest support yet
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Cédric Le Goater
---
target/ppc/mmu-radix64.c | 81 ++--
1 file changed, 69 insertions(+), 12 deletions(-)
diff --git a/target/ppc/mmu-radix64.c
From: Benjamin Herrenschmidt
The HW relies on LPCR:HR along with the PATE to determine whether
to use Radix or Hash mode. In fact it uses LPCR:HR more commonly
than the PATE.
For us, it's also more efficient to do so, especially since unlike
the HW we do not maintain a cache of the current PATE
From: Benjamin Herrenschmidt
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Cédric Le Goater
---
target/ppc/mmu-book3s-v3.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu-book3s-v3.h b/target/ppc/mmu-book3s-v3.h
index 41b77158622a..12ec0054c207
Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-pal...@sifive.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190213155414.22285-1-pal...@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to
From: Benjamin Herrenschmidt
POWER9 (arch v3) slightly changes the HPTE format. The B bits move
from the first to the second half of the HPTE, and the AVPN/ARPN
are slightly shorter.
However, under SPAPR, the hypercalls still take the old format
(and probably will for the foreseable future).
From: Benjamin Herrenschmidt
With mttcg, we can have MMU lookups happening at the same time
as the guest modifying the page tables.
Since the HPTEs of the hash table MMU contains two words (or
double worlds on 64-bit), we need to make sure we read them
in the right order, with the correct
From: Benjamin Herrenschmidt
Historically the 64-bit server MMU supports two way of configuring the
guest "real mode" mapping:
- The "RMA" with is a single chunk of physically contiguous
memory remapped as guest real, and controlled by the RMLS
field in the LPCR register and the RMOR register.
From: Benjamin Herrenschmidt
To enable inlining more things, move #include of mmu-hash64.h and
mmu-radix64.h to mmu-book3s-v3.h
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Cédric Le Goater
---
target/ppc/mmu-book3s-v3.h | 3 +++
hw/ppc/spapr_hcall.c | 1 -
Am 15.02.2019 um 14:49 hat Alberto Garcia geschrieben:
> If there's an error in commit_start() then the block job must be
> deleted before replacing commit_top_bs, otherwise it will fail because
> of lack of permissions. This happens since the permission system was
> introduced in
On 14.02.19 03:35, Eric Blake wrote:
> On 12/3/18 11:52 AM, Max Reitz wrote:
>> This new error option allows users of blkdebug to inject errors only on
>> certain kinds of I/O operations. Users usually want to make a very
>> specific operation fail, not just any; but right now they simply hope
>>
Previously this was only supported for roundAndPackFloat64.
New support in round_canonical, round_to_int, float128_round_to_int,
roundAndPackFloat32, roundAndPackInt32, roundAndPackInt64,
roundAndPackUint64. This does not include any of the floatx80 routines,
as we do not have users for that
Markus Armbruster writes:
> Laszlo Ersek writes:
>
>> On 02/15/19 13:28, Alex Bennée wrote:
>>> It looks like there was going to be code to check we had some sort of
>>> alignment so lets replace it with an actual check. This is a bit more
>>> useful than the enigmatic "failed to read the
Am 15.02.2019 um 14:03 hat Denis Plotnikov geschrieben:
> Adds a fast path on aio context setting preventing
> unnecessary context setting routine.
> Also, it prevents issues with cyclic walk of child
> bds-es appeared because of registering aio walking
> notifiers:
>
> Call stack:
>
> 0
On 14.02.19 03:25, Eric Blake wrote:
> On 2/13/19 4:53 PM, Max Reitz wrote:
>> What bs->file and bs->backing mean depends on the node. For filter
>> nodes, both signify a node that will eventually receive all R/W
>> accesses. For format nodes, bs->file contains metadata and data, and
>>
Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-pal...@sifive.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190213155414.22285-1-pal...@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to
Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-pal...@sifive.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190213155414.22285-1-pal...@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to
On Fri, 15 Feb 2019 15:36:00 +
Daniel P. Berrangé wrote:
> The type 3 SMBIOS structure[1] ends with fields
>
> ...
> 0x14 - contained element count
> 0x15 - contained element record length
> 0x16 - sku number
>
> The smbios_type_3 struct missed the contained element record
>
The function needs to make sure it is passed a valid disk name. This is
easily done by making sure that the parsing loop results in a non-zero
value.
Spotted by Coverity: CID 1398640
Reported-by: Peter Maydell
Signed-off-by: Paul Durrant
---
Cc: Stefano Stabellini
Cc: Anthony Perard
Cc:
On Wed, 13 Feb 2019 at 23:49, John Snow wrote:
>
> The following changes since commit 0b5e750bea635b167eb03d86c3d9a09bbd43bc06:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
> into staging (2019-02-12 10:53:37 +)
>
> are available in the Git repository at:
>
>
Am 15.02.2019 um 17:21 hat Eric Blake geschrieben:
> On 11/7/18 7:09 AM, Daniel Henrique Barboza wrote:
> > At this moment, QEMU attempts to create/load/delete snapshots
> > by using either an ID (id_str) or a name. The problem is that the code
> > isn't consistent of whether the entered argument
The if() statement is clearly bogus (dead code which should have been
cleaned up when grant mapping was removed).
Spotted by Coverity: CID 1398635
While in the neighbourhood, add a missing 'fall through' annotation.
Reported-by: Peter Maydell
Signed-off-by: Paul Durrant
---
Cc: Stefan
Paul Durrant (3):
dataplane/xen-block: remove dead code
xen-block: remove redundant assignment
xen-block: report error condition from vbd_name_to_disk()
hw/block/dataplane/xen-block.c | 5 +
hw/block/xen-block.c | 24
2 files changed, 17
On 11/7/18 7:09 AM, Daniel Henrique Barboza wrote:
> At this moment, QEMU attempts to create/load/delete snapshots
> by using either an ID (id_str) or a name. The problem is that the code
> isn't consistent of whether the entered argument is an ID or a name,
> causing unexpected behaviors.
>
>
Hello,
Here is a series of fixes and extensions provided by Ben which modify
the POWER9 interrupt model to prepare ground for the support of the
XIVE interrupt controller as found on POWER9 PowerNV machines.
Thanks
C.
Changes since initial patchset :
- modified the commit log to comment the
From: Benjamin Herrenschmidt
And use it to get the correct HILE bit in HID0
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
---
target/ppc/cpu-qom.h| 2 ++
target/ppc/excp_helper.c| 17 +
From: Benjamin Herrenschmidt
When issuing a power management instruction, we set MSR:EE
to force ppc_hw_interrupt() into calling powerpc_excp()
to deal with the fact that on P7 and P8, the system reset
caused by the wakeup needs to be generated regardless of
the MSR:EE value (using LPCR only).
The assignment to 'p' is unnecessary as the code will either goto 'invalid'
or p will get overwritten.
Spotted by Coverity: CID 1398638
Reported-by: Peter Maydell
Signed-off-by: Paul Durrant
---
Cc: Stefano Stabellini
Cc: Anthony Perard
Cc: Kevin Wolf
Cc: Max Reitz
---
From: Benjamin Herrenschmidt
STOP must act differently based on PSSCR:EC on POWER9. When set, it
acts like the P7/P8 power management instructions and wake up at 0x100
based on the wakeup conditions in LPCR.
When PSSCR:EC is clear however it will wakeup at the next instruction
after STOP (if EE
From: Benjamin Herrenschmidt
This controls whether the External Interrupt (0x500) can be
delivered to the hypervisor or not.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
---
target/ppc/excp_helper.c| 5 -
From: Benjamin Herrenschmidt
Adds support for the Hypervisor directed interrupts in addition to the
OS ones.
Signed-off-by: Benjamin Herrenschmidt
[clg: - modified the icp_realize() and xive_tctx_realize() to take
into account explicitely the POWER9 interrupt model
- introduced a
> -Original Message-
[snip]
> >
> > (5) CID 1398649: resource leak in xen_block_drive_create():
> >
> > In hw/block/xen-block.c xen_block_drive_create() Coverity
> > complains that the call "driver_layer = qdict_new()" allocates
> > memory that's leaked because we don't save the pointer
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