On Tue, 05 Feb 2019 23:25:54 -0600
Shivaprasad G Bhat wrote:
> nvdimm_device_list is required for parsing the list for devices
> in subsequent patches. Move it to common area.
>
> Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Igor Mammedov
> ---
> hw/acpi/nvdimm.c| 27
Am 19.02.2019 um 07:44 hat Thomas Huth geschrieben:
> On 18/02/2019 19.22, Cleber Rosa wrote:
> >
> >
> > On 2/13/19 6:54 AM, Thomas Huth wrote:
> >> This is very convenient for people like me who store their QEMU git trees
> >> on gitlab.com: Automatic CI pipelines are now run for each branch
On Mon, 18 Feb 2019 22:29:40 +0100
Auger Eric wrote:
> Hi Peter,
>
> On 2/14/19 6:29 PM, Peter Maydell wrote:
> > On Tue, 5 Feb 2019 at 17:33, Eric Auger wrote:
> >>
> >> This patch implements the machine class kvm_type() callback.
> >> It returns the max IPA shift needed to implement the
On 19.02.19 03:58, David Gibson wrote:
> On Mon, Feb 18, 2019 at 10:21:56AM +0100, David Hildenbrand wrote:
>> This is a set of tests to test basic device unplugging functionality for
>> - some PCI implementations
>> - CCW devices on s390x
>> - spapr memory and cpu core devices
>>
>> I plaed with
Hi Philippe,
On Mon, Feb 18, 2019 at 10:39:54PM +0100, Philippe Mathieu-Daudé wrote:
> > -newval = s->script_ram[addr >> 2];
> > -shift = (addr & 3) * 8;
> > -mask = ((uint64_t)1 << (size * 8)) - 1;
> > -newval &= ~(mask << shift);
> > -newval |= val << shift;
> > -
On 2019/2/14 下午12:26, w...@redhat.com wrote:
From: Wei Xu
https://github.com/Whishay/qemu.git
Userspace and vhost-net backend test has been done with upstream kernel
in guest.
v3->v4:
- add version number to the subject of each patch.(mst)
v2->v3:
v2/01 - drop it since the
On 2019/2/14 下午12:26, w...@redhat.com wrote:
From: Wei Xu
Add userspace and vhost kernel/user support.
Add CLI "ring_packed=true/false" to enable/disable packed ring provision.
Usage:
-device virtio-net-pci,netdev=xx,mac=xx:xx:xx:xx:xx:xx,ring_packed=false
By default it is provided.
On 2/12/19 6:40 AM, David Gibson wrote:
> On Mon, Jan 28, 2019 at 10:46:11AM +0100, Cédric Le Goater wrote:
>> This is simple model of the POWER9 XIVE interrupt controller for the
>> PowerNV machine. XIVE for baremetal is a complex controller and the
>> model only addresses the needs of the
On 2019/2/14 下午12:26, w...@redhat.com wrote:
From: Wei Xu
Both userspace and vhost-net/user are supported with this patch.
A new subsection is introduced for packed ring, only 'last_avail_idx'
and 'last_avail_wrap_counter' are saved/loaded presumably based on
all the others relevant
Philippe Mathieu-Daudé writes:
> Hi Pavel,
>
> On 2/11/19 6:34 AM, Pavel Dovgalyuk wrote:
>> Ping.
>
> You forgot to Cc Aleksandar, to get his MIPS maintainer Ack-by:
>
> ./scripts/get_maintainer.pl -f target/mips/helper.c
> Aleksandar Markovic (maintainer:MIPS)
>
>>
>> Pavel Dovgalyuk
>>
>>>
Problem reproduced with virtio-scsi as well on the same guest, this time it
took less than a day.
Information from the log file:
vdev 0x55823f119f90 ("virtio-scsi")
vq 0x55823f122e80 (idx 2)
inuse 128 vring.num 128
old_shadow_avail_idx 58367 last_avail_idx 58113 avail_idx 58367
avail 0x3de8a800
On 2019/2/14 下午12:26, w...@redhat.com wrote:
From: Wei Xu
This is a helper for packed ring.
To support packed ring, the head descriptor in a chain should be updated
lastly since no 'avail_idx' like in packed ring to explicitly tell the
driver side that all payload is ready after having done
On 2019/2/14 下午12:26, w...@redhat.com wrote:
From: Wei Xu
Difference between 'avail_wrap_counter' and 'last_avail_wrap_counter':
For Tx(guest transmitting), they are the same after each pop of a desc.
For Rx(guest receiving), they are also the same when there are enough
descriptors to carry
Paolo Bonzini writes:
> On 30/01/19 15:13, Markus Armbruster wrote:
>> -global driver=cfi.pflash01,property=secure,value=on
>>
>> Affects *all* such devices, but fortunately we have at most two, and the
>> one we don't want to affect happens to ignore the property value.
>
> Is this true?
On 2019/2/18 下午10:46, Wei Xu wrote:
Do we allow chain more descriptors than vq size in the case of indirect?
According to the spec:
"
The device limits the number of descriptors in a list through a
transport-specific and/or device-specific value. If not limited,
the maximum number of
On 2019/2/18 下午7:53, Vincenzo Maffione wrote:
Hi Jason,
Thanks for the quick reply.
My PV device (to be open sourced soon) uses the QEMU net backend interface,
in a way similar to virtio-net.
For example it uses qemu_set_offload(), qemu_has_vnet_hdr_len(),
qemu_using_vnet_hdr(),
On 18/02/2019 19.22, Cleber Rosa wrote:
>
>
> On 2/13/19 6:54 AM, Thomas Huth wrote:
>> This is very convenient for people like me who store their QEMU git trees
>> on gitlab.com: Automatic CI pipelines are now run for each branch that is
>> pushed to the server - useful for some extra-testing
On 2019/2/19 上午7:34, Michael S. Tsirkin wrote:
On Mon, Feb 18, 2019 at 10:49:08PM +0200, Yuri Benditovich wrote:
On Mon, Feb 18, 2019 at 6:39 PM Michael S. Tsirkin wrote:
On Mon, Feb 18, 2019 at 11:58:51AM +0200, Yuri Benditovich wrote:
On Mon, Feb 18, 2019 at 5:49 AM Jason Wang wrote:
Hi Eric, hi Daniel,
QEMU iotest 233 is failing for me on RHEL7:
233[07:29:30] [07:29:30] [failed, exit status 1] - output
mismatch (see 233.out.bad)
--- /home/thuth/devel/qemu/tests/qemu-iotests/233.out 2019-02-19
07:14:45.0 +0100
+++
On 2019/2/19 上午1:07, Wei Xu wrote:
On Mon, Feb 18, 2019 at 03:27:21PM +0800, Jason Wang wrote:
On 2019/2/14 下午12:26, w...@redhat.com wrote:
From: Wei Xu
Add packed ring headcount check.
Common part of split/packed ring are kept.
Signed-off-by: Wei Xu
---
hw/virtio/virtio.c | 197
Make MMU-related tests conditional on the presence of MMUv2 option.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_mmu.S | 4
tests/tcg/xtensa/test_phys_mem.S | 4
2 files changed, 8 insertions(+)
diff --git a/tests/tcg/xtensa/test_mmu.S b/tests/tcg/xtensa/test_mmu.S
Test arithmetic operations for normal, NaN and Inf arguments.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile | 1 +
tests/tcg/xtensa/macros.inc | 17
tests/tcg/xtensa/test_fp0_arith.S | 173 ++
3 files changed, 191
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile | 1 +
tests/tcg/xtensa/test_fp_cpenable.S | 27 +++
2 files changed, 28 insertions(+)
create mode 100644 tests/tcg/xtensa/test_fp_cpenable.S
diff --git a/tests/tcg/xtensa/Makefile
Make tests for specific special registers conditional on the presence of
the options that add these registers and test that the registers are not
accessible otherwise.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_sr.S | 133 +
1 file changed,
Test comparisons and conditional move operations.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile | 1 +
tests/tcg/xtensa/test_fp1.S | 141
2 files changed, 142 insertions(+)
create mode 100644 tests/tcg/xtensa/test_fp1.S
diff --git
Make s32c1i tests conditional on the presence of this option. Initialize
ATOMCTL SR when it's present to allow RCW transactions on uncached
memory.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_s32c1i.S | 12
1 file changed, 12 insertions(+)
diff --git
Make data/instruction tests conditional on the presence of
data/instruction cache, whether they're lockable and whether data cache
is writeback.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_cache.S | 62 ++-
1 file changed, 50 insertions(+), 12
Make interrupt tests conditional on the presence of interrupt option and
on the presence of level-1 and high level software interrupts. Don't use
hard-coded interrupt level for the high level interrupt tests, choose
high level software IRQ and use its configured level.
Signed-off-by: Max Filippov
Don't use 'loop' opcode in generic testsuite completion code, only use
core opcodes to make it work with any configuration.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/macros.inc | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/tests/tcg/xtensa/macros.inc
Make timer/CCOUNT tests conditional on the presence of timer option and
number of configured timers. Don't use hard coded interrupt levels for
timers, use configured values.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_timer.S | 48 +++
1 file
SR tests generate instructions that the assembler does not recognize and
thus must take care about configuration endianness.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_sr.S | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git
Make tests for optional instruction groups conditional on the presence
of corresponding options in the config.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_clamps.S | 4
tests/tcg/xtensa/test_loop.S | 4
tests/tcg/xtensa/test_mac16.S | 4
tests/tcg/xtensa/test_max.S
Use bbci.l/bbsi.l instead of bbci/bbsi, as they are assembly macros that
accept little-endian bit number and produce correct immediate for both
little and big endian configurations. Choose value loaded into register
for bbc/bbs opcodes based on configuration endianness.
Signed-off-by: Max
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile| 1 +
tests/tcg/xtensa/test_flix.S | 60
2 files changed, 61 insertions(+)
create mode 100644 tests/tcg/xtensa/test_flix.S
diff --git a/tests/tcg/xtensa/Makefile
Uncomment test_boolean in the test makefile. Make actual tests code
conditional on the presence of boolean option in the config.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile | 2 +-
tests/tcg/xtensa/test_boolean.S | 4
2 files changed, 5 insertions(+), 1 deletion(-)
When test suite with multiple tests fails it's not obvious which test
failed. Pring "failed" in every invocation of test_fail. Do printing
when DEBUG preprocessor macro is defined.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/macros.inc | 7 ++-
1 file changed, 6 insertions(+), 1
Test conversions for normal, NaN and Inf arguments.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile| 1 +
tests/tcg/xtensa/test_fp0_conv.S | 304 +++
2 files changed, 305 insertions(+)
create mode 100644 tests/tcg/xtensa/test_fp0_conv.S
Configurations with LITBASE register may use absolute literals by
default. Pass --no-absolute-literals option to assembler to use
PC-relative literals instead.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/tcg/xtensa/Makefile
Configurations w/o vecbase may have vectors not grouped together and not
in fixed order. They may not always be grouped into single output
sections by assigning next offset to dot, as it may sometimes move dot
backwards and sometimes they may even belong to different memory region.
Don't group
Make windowed register tests conditional on the presence of this option.
Fix tests to work correctly for both 32 and 64 physical registers.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_windowed.S | 32 +++-
1 file changed, 23 insertions(+), 9 deletions(-)
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile | 1 +
tests/tcg/xtensa/test_lsc.S | 122
2 files changed, 123 insertions(+)
create mode 100644 tests/tcg/xtensa/test_lsc.S
diff --git a/tests/tcg/xtensa/Makefile
Cache prefetch option adds an unprivileged SR PREFCTL. Add trivial
implementation for this SR.
Signed-off-by: Max Filippov
---
target/xtensa/cpu.h | 1 +
target/xtensa/translate.c | 16
2 files changed, 17 insertions(+)
diff --git a/target/xtensa/cpu.h
Make debug tests conditional on the presence of the debug option in the
config and tests that depend on the presence/number of instruction or
data breakpoint registers on the corresponding definitions. Use
configured debug interrupt level instead of the hardcoded value to set
up IRQ handler and
Hello,
this series reorganizes xtensa tests so that they can be run on various
xtensa core configurations. It adds new tests for FPU2000 opcodes and
for FLIX. It also adds support for printing test execution trace when
preprocessor macro DEBUG is defined.
Max Filippov (23):
target/xtensa:
Stephen Checkoway writes:
> On Feb 18, 2019, at 13:08, Markus Armbruster wrote:
>
>> Stephen Checkoway writes:
>>
>>> On Feb 18, 2019, at 08:43, Thomas Huth wrote:
>>>
On 18/02/2019 07.07, Stephen Checkoway wrote:
> Hi all,
>
> I've been working on some improvements to the
Function acpi_memory_plug_cb() is only invoked when dev is a PCDIMM,
which is hotpluggable. This means it is not necessary to check this
property again.
This patch removes this check.
Signed-off-by: Wei Yang
---
hw/acpi/memory_hotplug.c | 4
1 file changed, 4 deletions(-)
diff --git
PCDIMM's realize callback is introduced to do proper setup for NVDIMM.
Currently the NVDIMM setup task is nvdimm_prepare_memory_region(), which
is done in pre_plug stage. This means related task has already been done
at realize point.
This patch remove PCDIMM realize callback.
Signed-off-by:
Two trivial cleanup for pc-dimm.
Patch [1] remove the check on class->hotpluggable since pc-dimm is always
hotpluggable.
Patch [2] remove realized callback since the task is done in pre_plug stage.
Wei Yang (2):
pc-dimm: remove check on pc-dimm hotpluggable
pc-dimm: remove realize callback
I agree. Thanks. :)
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You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1816052
Title:
qemu system emulator fails to start if no sound card is present on
host
Status in QEMU:
New
Bug description:
Laszlo Ersek writes:
> On 02/18/19 18:01, Laszlo Ersek wrote:
>> On 02/18/19 13:56, Markus Armbruster wrote:
>>> QOMification left parameter @size unused in pflash_cfi01_register()
>>> and pflash_cfi02_register(). register(). Obviously, @size should
>
> I meant to point out the typo above, but
BALATON Zoltan writes:
> On Mon, 18 Feb 2019, Markus Armbruster wrote:
>> BALATON Zoltan writes:
>>> On Mon, 18 Feb 2019, Markus Armbruster wrote:
Machine "sam460ex" maps its flash memory at address 0xFFF0. When
no image is supplied, its size is 1MiB (0x10). Else, it's the
xtensa-modules part of the test_mmuhifi_c3 core is missing fixes that
returns XTENSA_UNDEFINED for undefined opcodes and marks all data
structures static. Run sed script from target/xtensa/import_core.sh on
it. This fixes test_sr tests for missing special registers.
Signed-off-by: Max Filippov
On Fri, Feb 15, 2019 at 06:00:24PM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> POWER9 (arch v3) slightly changes the HPTE format. The B bits move
> from the first to the second half of the HPTE, and the AVPN/ARPN
> are slightly shorter.
>
> However, under SPAPR, the
On Tue, Feb 19, 2019 at 03:05:29PM +1100, David Gibson wrote:
> On Fri, Feb 15, 2019 at 06:00:24PM +0100, Cédric Le Goater wrote:
> > From: Benjamin Herrenschmidt
> >
> > POWER9 (arch v3) slightly changes the HPTE format. The B bits move
> > from the first to the second half of the HPTE, and the
Patchew URL: https://patchew.org/QEMU/20190218125615.18970-1-arm...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190218125615.18970-1-arm...@redhat.com
Subject: [Qemu-devel] [PATCH 00/10] pflash: Fixes and cleanups
Patchew URL: https://patchew.org/QEMU/20190218125615.18970-1-arm...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190218125615.18970-1-arm...@redhat.com
Subject: [Qemu-devel] [PATCH 00/10] pflash: Fixes and cleanups
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1737883
Title:
Cannot
Thank you for replying.
Well i am using latest PROXMOX in a cluster of 4 physical servers.
during the weekend i had to stop all hosts because electricians had to
work on the fuse box.
i shutted down all vm's then powered off all physical hosts. One of them
took very long.
this host had a raid5 of
On Fri, Feb 15, 2019 at 06:00:23PM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> With mttcg, we can have MMU lookups happening at the same time
> as the guest modifying the page tables.
>
> Since the HPTEs of the hash table MMU contains two words (or
> double worlds on
On Mon, Feb 18, 2019 at 10:20:43PM +0100, Philippe Mathieu-Daudé wrote:
> On 2/18/19 7:47 AM, David Gibson wrote:
> > On Fri, Feb 15, 2019 at 06:00:19PM +0100, Cédric Le Goater wrote:
> >> From: Benjamin Herrenschmidt
> >>
> >> Now that LPCR:HR is set properly for SPAPR, use it for deciding
> >>
On Fri, Feb 15, 2019 at 06:00:22PM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> To enable inlining more things, move #include of mmu-hash64.h and
> mmu-radix64.h to mmu-book3s-v3.h
>
> Signed-off-by: Benjamin Herrenschmidt
> Signed-off-by: Cédric Le Goater
I don't really
On Fri, Feb 15, 2019 at 06:00:21PM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> Signed-off-by: Benjamin Herrenschmidt
> Signed-off-by: Cédric Le Goater
Applied, thanks.
> ---
> target/ppc/mmu-book3s-v3.h | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
>
On Fri, Feb 15, 2019 at 06:00:20PM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> Historically the 64-bit server MMU supports two way of configuring the
> guest "real mode" mapping:
>
> - The "RMA" with is a single chunk of physically contiguous
> memory remapped as guest
On Mon, Feb 18, 2019 at 01:56:10PM +0100, Markus Armbruster wrote:
> Machine "ref405ep" maps its flash memory at address 2^32 - image size.
> Image size is rounded up to the next multiple of 64KiB. Useless,
> because pflash_cfi02_realize() fails with "failed to read the initial
> flash content"
On Mon, Feb 18, 2019 at 11:43:49PM +0530, P J P wrote:
> From: Prasad J Pandit
>
> On ppc hosts, hypervisor shares following system attributes
>
> - /proc/device-tree/system-id
> - /proc/device-tree/model
>
> with a guest. This could lead to information leakage and misuse.[*]
> Add machine
On Mon, Feb 18, 2019 at 10:21:56AM +0100, David Hildenbrand wrote:
> This is a set of tests to test basic device unplugging functionality for
> - some PCI implementations
> - CCW devices on s390x
> - spapr memory and cpu core devices
>
> I plaed with ACPI CPU unplug but getting that to run with
On Mon, Feb 18, 2019 at 11:52:18AM +, Daniel P. Berrangé wrote:
> On Mon, Feb 18, 2019 at 12:38:11PM +0100, Greg Kurz wrote:
> > On Mon, 18 Feb 2019 15:42:18 +0530
> > P J P wrote:
> >
> > > From: Prasad J Pandit
> > >
> > > On ppc hosts, hypervisor shares following system attributes
> > >
All the example code are indented with four spaces except this one.
Fix this by adding four spaces here.
Signed-off-by: Wei Yang
---
CODING_STYLE | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/CODING_STYLE b/CODING_STYLE
index 73f66ca185..27581d80c1 100644
---
The first one is suggested by Igor Mammedov to provide rule for multiline
code.
The second is a trivial fix to make example code all indented with 4 spaces.
Wei Yang (2):
CODING_STYLE: specify the indent rule for multiline code
CODING_STYLE: indent example code as all others
CODING_STYLE |
We didn't specify the indent rule for multiline code here, which may
misleading users. And in current code, the code use different rules.
Add this rule in CODING_STYLE to make sure this is clear to every one.
Signed-off-by: Wei Yang
Suggested-by: Igor Mammedov
---
CODING_STYLE | 26
On Mon, 18 Feb 2019, Markus Armbruster wrote:
BALATON Zoltan writes:
On Mon, 18 Feb 2019, Markus Armbruster wrote:
Machine "sam460ex" maps its flash memory at address 0xFFF0. When
no image is supplied, its size is 1MiB (0x10). Else, it's the
size of the image rounded up to the next
On Fri, Feb 15, 2019 at 05:16:38PM +0100, Cédric Le Goater wrote:
> Hello,
>
> Here is a series of fixes and extensions provided by Ben which modify
> the POWER9 interrupt model to prepare ground for the support of the
> XIVE interrupt controller as found on POWER9 PowerNV machines.
Applied to
Currently we do device realization like below:
hotplug_handler_pre_plug()
dc->realize()
hotplug_handler_plug()
Before we do device realization and plug, we should allocate necessary
resources and check if memory-hotplug-support property is enabled.
At the piix4 and ich9, the
On 15/02/2019 16:30, David Gibson wrote:
> On Fri, Feb 15, 2019 at 03:42:56PM +1100, Alexey Kardashevskiy wrote:
>>
>>
>> On 15/02/2019 14:22, David Gibson wrote:
>>> On Thu, Feb 14, 2019 at 04:21:44PM +1100, Alexey Kardashevskiy wrote:
NVIDIA V100 GPUs have on-board RAM which is mapped
On 2/18/19 12:46 PM, Vladimir Sementsov-Ogievskiy wrote:
> 14.02.2019 2:36, John Snow wrote:
>> Add an inconsistent bit to dirty-bitmaps that allows us to report a bitmap as
>> persistent but potentially inconsistent, i.e. if we find bitmaps on a qcow2
>> that have been marked as "in use".
>>
On Mon, Feb 18, 2019 at 02:53:36PM +0100, Igor Mammedov wrote:
>On Mon, 18 Feb 2019 13:21:29 +
>Wei Yang wrote:
>
>> On Mon, Feb 18, 2019 at 01:56:02PM +0100, Igor Mammedov wrote:
>> >On Mon, 18 Feb 2019 12:13:24 +
>> >Wei Yang wrote:
>> >
>> >> On Mon, Feb 18, 2019 at 10:50:34AM +0100,
On 31.01.19 18:55, Kevin Wolf wrote:
> There are use cases where raw images are given (e.g. existing physical
> disks), but advanced features like dirty bitmaps or backing files are
> wanted that require use of a proper image format like qcow2.
>
> This series adds an incompatible feature bit to
On 31.01.19 18:55, Kevin Wolf wrote:
> Signed-off-by: Kevin Wolf
> ---
> qapi/block-core.json | 1 +
> block/qcow2.c| 6 +-
> 2 files changed, 6 insertions(+), 1 deletion(-)
[...]
> diff --git a/block/qcow2.c b/block/qcow2.c
> index 4959bf16a4..e3427f9fcd 100644
> ---
On 31.01.19 18:55, Kevin Wolf wrote:
> Rather than requiring that the external data file node is passed
> explicitly when creating the qcow2 node, store the filename in the
> designated header extension during .bdrv_create and read it from there
> as a default during .bdrv_open.
>
>
On 31.01.19 18:55, Kevin Wolf wrote:
> This adds a .bdrv_open option to specify the external data file node.
>
> Signed-off-by: Kevin Wolf
> ---
> qapi/block-core.json | 3 ++-
> block/qcow2.h| 4 +++-
> block/qcow2.c| 25 +++--
> 3 files changed, 28
On 2/18/19 3:37 PM, Eric Blake wrote:
> On 2/18/19 12:13 PM, Vladimir Sementsov-Ogievskiy wrote:
>> 14.02.2019 2:36, John Snow wrote:
>>> Signed-off-by: John Snow
>>> ---
>>> block/dirty-bitmap.c | 15 +
>>> block/qcow2-bitmap.c | 42
On 31.01.19 18:55, Kevin Wolf wrote:
> This changes the qcow2 implementation to direct all guest data I/O to
> s->data_file rather than bs->file, while metadata I/O still uses
> bs->file. At the moment, this is still always the same, but soon we'll
> add options to set s->data_file to an external
On Mon, Feb 18, 2019 at 10:49:08PM +0200, Yuri Benditovich wrote:
> On Mon, Feb 18, 2019 at 6:39 PM Michael S. Tsirkin wrote:
> >
> > On Mon, Feb 18, 2019 at 11:58:51AM +0200, Yuri Benditovich wrote:
> > > On Mon, Feb 18, 2019 at 5:49 AM Jason Wang wrote:
> > > >
> > > >
> > > > On 2019/2/13
When bitmaps are persistent, they may incur a disk read or write when bitmaps
are added or removed. For configurations like virtio-dataplane, failing to
acquire this lock will abort QEMU when disk IO occurs.
We used to acquire aio_context as part of the bitmap lookup, so re-introduce
the lock for
On 31.01.19 18:55, Kevin Wolf wrote:
> The cluster allocation code uses 0 as an invalid offset that is used in
> case of errors or as "offset not yet determined". With external data
> files, a host cluster offset of 0 becomes valid, though.
>
> Define a constant INV_OFFSET (which is not cluster
On 2/18/19 11:39 AM, Vladimir Sementsov-Ogievskiy wrote:
> 14.02.2019 2:23, John Snow wrote:
>> Currently, enabled means something like "the status of the bitmap
>> is ACTIVE." After this patch, it should mean exclusively: "This
>> bitmap is recording guest writes, and is allowed to do so."
>>
On 2/18/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
> 14.02.2019 2:23, John Snow wrote:
>> These mean the same thing now. Unify them and rename the merged call
>> bdrv_dirty_bitmap_busy to indicate semantically what we are describing,
>> as well as help disambiguate from the various
OVMF places the 64-bit PCI MMIO aperture after the memory hotplug area.
If you specify `-m maxmem=1024G`, then accessing 64-bit MMIO BARs of
PCI(e) devices, allocated from the aperture, will require at least 41
address bits. If you use KVM, and nested paging (EPT on Intel, NPT on
AMD) is enabled,
On 2/18/19 8:57 AM, Vladimir Sementsov-Ogievskiy wrote:
> 14.02.2019 2:23, John Snow wrote:
>> "Frozen" was a good description a long time ago, but it isn't adequate now.
>> Rename the frozen predicate to has_successor to make the semantics of the
>> predicate more clear to outside callers.
>>
On 2/18/19 11:52 AM, Vladimir Sementsov-Ogievskiy wrote:
> 14.02.2019 2:23, John Snow wrote:
>> Instead of implying a locked status, make it explicit.
>
> locked interferes with bitmap mutex, so may be better "qmp_locked state", but
> not sure.
>
I agree that "locked" has too many meanings,
On 2/14/19 1:50 PM, Peter Maydell wrote:
> Convert the debug printing in the PL031 device to use trace events,
> and augment it to cover the interesting parts of device operation.
>
> Signed-off-by: Peter Maydell
> ---
> hw/timer/pl031.c | 55 +++
>
On 2/18/19 4:55 PM, Eric Blake wrote:
> On 2/18/19 3:42 PM, John Snow wrote:
>> When bitmaps are persistent, they may incur a disk read or write when bitmaps
>> are added or removed. For configurations like virtio-dataplane, failing to
>> acquire this lock will abort QEMU when disk IO occurs.
On 2/14/19 1:51 PM, Peter Maydell wrote:
> The pl011 logs when the guest makes a bad access. It prints
> the address offset in hex but confusingly omits the '0x'
> prefix; add it.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/char/pl011.c | 4 ++--
> 1 file
On 2/14/19 1:50 PM, Peter Maydell wrote:
> Create a new include file for the pl011's device struct,
> type macros, etc, so that it can be instantiated using
> the "embedded struct" coding style.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
> ---
>
On 2/18/19 12:39 PM, Vladimir Sementsov-Ogievskiy wrote:
> 14.02.2019 2:23, John Snow wrote:
>> Simply move the big status enum comment block to above the status
>> function, and document it as being deprecated. The whole confusing
>> block can get deleted in three releases time.
>>
>>
On 2/14/19 1:51 PM, Peter Maydell wrote:
> The Musca boards have DAPLink firmware that sets the initial
> secure VTOR value (the location of the vector table) differently
> depending on the boot mode (from flash, from RAM, etc). Export
> the init-svtor as a QOM property of the ARMSSE object so
On 2/17/19 8:51 AM, Marcel Apfelbaum wrote:
>
> Cc:qemu-sta...@nongnu.org
I doubt this is a security issue worth Cc'ing qemu-stable :)
> Thanks,
> Marcel
>
> On 2/14/19 5:40 PM, Marcel Apfelbaum wrote:
>> Configuring QEMU with:
>> configure --target-list="x86_64-softmmu" --cc=clang
On 2/15/19 11:59 AM, Marc-André Lureau wrote:
> Hi
>
> On Thu, Feb 14, 2019 at 9:20 PM Philippe Mathieu-Daudé
> wrote:
>>
>> The right side of the comparison is the return value of can_read():
>> VSCARD_IN_SIZE - card->vscard_in_pos.
>> Since the 'size' argument of chardev::read() is bound to
>>
On 2/18/19 3:42 PM, John Snow wrote:
> When bitmaps are persistent, they may incur a disk read or write when bitmaps
> are added or removed. For configurations like virtio-dataplane, failing to
> acquire this lock will abort QEMU when disk IO occurs.
>
> We used to acquire aio_context as part of
On 2/14/19 1:50 PM, Peter Maydell wrote:
> Create a new include file for the pl031's device struct,
> type macros, etc, so that it can be instantiated using
> the "embedded struct" coding style.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
> ---
>
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