Patch has been included here:
https://git.qemu.org/?p=qemu.git;a=commitdiff;h=5189e30b146ab39f9d
** Changed in: qemu
Status: In Progress => Fix Released
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** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
ioctl SIOCGIFCONF causes qemu-aarch64-static to crash with "received
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
qemu commit 80422b0: tcg.c crash in temp_load
Status in QEMU:
Fix
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
SIE-200 (TrustZone) MPC: BLK_MAX returns an incorrect value
Status in
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
qemu/target/arm/translate-a64.c:2039: bad test ?
Status in QEMU:
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
[alpha] Strange exception address reported
Status in QEMU:
Fix
Commit https://git.qemu.org/?p=qemu.git;a=commitdiff;h=29eb528078683
claims that this has been fixed. Is the problem still reproducible with
QEMU 4.0?
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Paolo, ping?
On 19/03/2019 18:05, Alexey Kardashevskiy wrote:
>
>
> On 11/02/2019 15:56, Alexey Kardashevskiy wrote:
>>
>>
>> On 09/02/2019 04:26, Paolo Bonzini wrote:
>>> On 07/02/19 12:49, Dr. David Alan Gilbert wrote:
//#define DEBUG_UNASSIGNED
@@ -2924,6 +2926,8 @@ struct
*** This bug is a duplicate of bug 823733 ***
https://bugs.launchpad.net/bugs/823733
** This bug has been marked a duplicate of bug 823733
Soloaris can't be poweroff
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** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
qemu fails to compile on gcc 9 "block/nvme.c:209:22: error: taking
Problem has been fixed here:
https://git.qemu.org/?p=qemu.git;a=commitdiff;h=d99e97e6912d90a55e9
** Changed in: qemu
Status: New => Fix Released
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** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
qemu/net/colo-compare.c:288: possible pointless code duplication ?
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
gdbstub memory accesses performed with wrong attributes
Status in
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
aarch64-linux-user master: inconsistent pwrite behaviour
Status in
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
qemu system emulator fails to start if no sound card is present on
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
create_elf_tables() doesn't set AT_PLATFORM for 32bit ARM platforms
>
> On Wed, Apr 24, 2019 at 08:02:17AM +1000, Dave Chinner wrote:
> > On Tue, Apr 23, 2019 at 01:36:12PM +0530, Pankaj Gupta wrote:
> > > Dont support 'MAP_SYNC' with non-DAX files and DAX files
> > > with asynchronous dax_device. Virtio pmem provides
> > > asynchronous host page cache flush
>
> On Tue 23-04-19 13:36:11, Pankaj Gupta wrote:
> > Dont support 'MAP_SYNC' with non-DAX files and DAX files
> > with asynchronous dax_device. Virtio pmem provides
> > asynchronous host page cache flush mechanism. We don't
> > support 'MAP_SYNC' with virtio pmem and ext4.
> >
> >
On Tuesday 23 April 2019 12:23 PM, David Gibson wrote:
> On Mon, Apr 22, 2019 at 12:33:16PM +0530, Aravinda Prasad wrote:
>> Memory error such as bit flips that cannot be corrected
>> by hardware are passed on to the kernel for handling.
>> If the memory address in error belongs to guest then
On Tuesday 23 April 2019 08:08 PM, Fabiano Rosas wrote:
> Aravinda Prasad writes:
>
>> +/*
>> + * Properly set bits in MSR before we invoke the handler.
>> + * SRR0/1, DAR and DSISR are properly set by KVM
>> + */
>> +if (!(*pcc->interrupts_big_endian)(cpu)) {
>> +
>
> On Tue, Apr 23, 2019 at 01:36:12PM +0530, Pankaj Gupta wrote:
> > Dont support 'MAP_SYNC' with non-DAX files and DAX files
> > with asynchronous dax_device. Virtio pmem provides
> > asynchronous host page cache flush mechanism. We don't
> > support 'MAP_SYNC' with virtio pmem and xfs.
> >
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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Title:
QEMU crash
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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Title:
Since c2077e2c "pci: Adjust PCI config limit based on bus topology",
pci_adjust_config_limit() has been used in the config space read and write
paths to only permit access to extended config space on buses which permit
it. Specifically it prevents access on devices below a vanilla-PCI bus via
pci_bus_is_root() currently relies on a method in the PCIBusClass.
But it's always known if a PCI bus is a root bus when we create it, so
using a dynamic method is overkill.
This replaces it with an IS_ROOT bit in a new flags field, which is set on
root buses and otherwise clear. As a bonus this
c2077e2c "pci: Adjust PCI config limit based on bus topology"
introduced checking the availability of extended config space for
PCI-E devices which are in a bus topology that doesn't permit extended
config space access (e.g. under PCI-E to PCI then PCI to PCI-E
bridges).
This caused some problems
These functions have an explicit test for accesses above the device's
config size. But pci_host_config_{read,write}_common() which they're
about to call already have checks against the config space limit and
do the right thing. So, remove the redundant tests.
Signed-off-by: David Gibson
---
On Tue, Apr 23, 2019 at 11:39:39AM +0100, Daniel P. Berrangé wrote:
> On Fri, Apr 19, 2019 at 04:35:04AM -0400, Yan Zhao wrote:
> > device version attribute in mdev sysfs is used by user space software
> > (e.g. libvirt) to query device compatibility for live migration of VFIO
> > mdev devices.
On Tue, Apr 23, 2019 at 11:02:56PM +0800, Alex Williamson wrote:
> On Tue, 23 Apr 2019 01:41:57 -0400
> Yan Zhao wrote:
>
> > On Tue, Apr 23, 2019 at 09:21:00AM +0800, Alex Williamson wrote:
> > > On Mon, 22 Apr 2019 21:01:52 -0400
> > > Yan Zhao wrote:
> > >
> > > > On Mon, Apr 22, 2019 at
On Tue, Apr 23, 2019 at 06:24:19PM +0800, Daniel P. Berrangé wrote:
> On Tue, Apr 23, 2019 at 01:41:57AM -0400, Yan Zhao wrote:
> > On Tue, Apr 23, 2019 at 09:21:00AM +0800, Alex Williamson wrote:
> > > On Mon, 22 Apr 2019 21:01:52 -0400
> > > Yan Zhao wrote:
> > >
> > > > On Mon, Apr 22, 2019 at
On Tue, Apr 23, 2019 at 05:59:32PM +0800, Cornelia Huck wrote:
> On Fri, 19 Apr 2019 04:35:04 -0400
> Yan Zhao wrote:
>
> > device version attribute in mdev sysfs is used by user space software
> > (e.g. libvirt) to query device compatibility for live migration of VFIO
> > mdev devices. This
Hi,
For vhost, *last_avail_idx* is maintained in vhost_virtqueue
but during live migration, *last_avail_idx* is fetched from VirtQueue.
Do you know how these two *last_avail_idx *are synchronized?
virtio_load related code which is called during live migration:
* vdev->vq[i].inuse =
On Tue, Apr 23, 2019 at 07:39:11PM +0800, Cornelia Huck wrote:
> On Fri, 19 Apr 2019 04:35:59 -0400
> Yan Zhao wrote:
>
> > This feature implements the version attribute for Intel's vGPU mdev
> > devices.
> >
> > version attribute is rw. It is queried by userspace software like libvirt
> > to
>From: Stefan Hajnoczi [mailto:stefa...@gmail.com]
>Sent: Tuesday, April 23, 2019 9:57 PM
>On Tue, Apr 23, 2019 at 11:12:40AM +0800, Jie Wang wrote:
>> Does qemu-pr-helper have its own log files?
>
>No, it does not. qemu-pr-helper uses stderr for errors and there is not
>much output during
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Implement the VLLDM instruction for v7M for the FPU present cas.
>
> Signed-off-by: Peter Maydell
> ---
> target/arm/helper.h| 1 +
> target/arm/helper.c| 54 ++
> target/arm/translate.c | 2 +-
> 3
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Enable the FPU by default for the Cortex-M4 and Cortex-M33.
>
> Signed-off-by: Peter Maydell
> ---
> target/arm/cpu.c | 8
> 1 file changed, 8 insertions(+)
Reviewed-by: Richard Henderson
r~
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Implement the VLSTM instruction for v7M for the FPU present case.
>
> Signed-off-by: Peter Maydell
> ---
> target/arm/cpu.h | 2 +
> target/arm/helper.h| 2 +
> target/arm/helper.c| 84 ++
>
On 4/16/19 5:57 AM, Peter Maydell wrote:
> The M-profile architecture floating point system supports
> lazy FP state preservation, where FP registers are not
> pushed to the stack when an exception occurs but are instead
> only saved if and when the first FP instruction in the exception
> handler
On Tue, Apr 23, 2019 at 06:22:45PM -0300, Eduardo Habkost wrote:
> Use SupportStatusInfo to represent deprecation information of
> machine types.
>
> Instead of using a generic "use XXX instead" message for humans,
> encode the suggested alternative in a machine-friendly way at the
>
On 4/16/19 5:57 AM, Peter Maydell wrote:
> In the v7M architecture, if an exception is generated in the process
> of doing the lazy stacking of FP registers, the handling of
> possible escalation to HardFault is treated differently to the normal
> approach: it works based on the saved information
Thomas Huth 于2019年4月24日周三 上午12:29写道:
> On 20/04/2019 12.00, Li Qiang wrote:
> > Signed-off-by: Li Qiang
> > ---
> > tests/fw_cfg-test.c | 19 +++
> > 1 file changed, 19 insertions(+)
> >
> > diff --git a/tests/fw_cfg-test.c b/tests/fw_cfg-test.c
> > index c22503619f..9f75dbb5f4
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Pushing registers to the stack for v7M needs to handle three cases:
> * the "normal" case where we pend exceptions
> * an "ignore faults" case where we set FSR bits but
>do not pend exceptions (this is used when we are
>handling some kinds of
On Tue, Apr 23, 2019 at 10:25:18AM +0100, Stefan Hajnoczi wrote:
[...]
>> +#ifdef CONFIG_LINUX
>> +#include
>> +#else /* !CONFIG_LINUX */
>> +#define MAP_SYNC 0x0
>> +#define MAP_SHARED_VALIDATE 0x0
>> +#endif /* CONFIG_LINUX */
>
>MAP_SHARED_VALIDATE is is from 2017:
>
> commit
Current call flow of save_snapshot is:
save_snapshot
migration_is_blocked
qemu_savevm_state
migration_is_blocked
Since qemu_savevm_state is only called in save_snapshot, this means
migration_is_blocked has been already checked.
Signed-off-by: Wei Yang
---
migration_is_blocked() is used in migrate_prepare() and
save_snapshot(), this is more proper to use this instead of
qemu_savevm_state_blocked() in qemu_loadvm_state().
Signed-off-by: Wei Yang
---
migration/savevm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On source side, we have qemu_savevm_state_header() to send related data,
while on the receiving side those steps are scattered in
qemu_loadvm_state().
This patch wrap those related steps into qemu_loadvm_state_header() to
make it friendly to read.
Signed-off-by: Wei Yang
---
migration/savevm.c
In migration_thread() and qemu_savevm_state(), we savevm_state in
following sequence:
qemu_savevm_state_header(f);
qemu_savevm_state_setup(f);
Then it would be more proper to loadvm_state in the save sequence.
Signed-off-by: Wei Yang
---
migration/savevm.c | 8
1 file
There are several trivial cleanup for savevm.
* remove duplicate check
* more restrict check
* reorder load sequence
* wrap several steps into qemu_loadvm_state_header
Wei Yang (4):
migration/savevm: remove duplicate check of migration_is_blocked
migration/savevm: use
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Add a new helper function which returns the MMU index to use
> for v7M, where the caller specifies all of the security
> state, privilege level and whether the execution priority
> is negative, and reimplement the existing
>
On 4/16/19 5:57 AM, Peter Maydell wrote:
> The M-profile FPCCR.ASPEN bit indicates that automatic floating-point
> context preservation is enabled. Before executing any floating-point
> instruction, if FPCCR.ASPEN is set and the CONTROL FPCA/SFPA bits
> indicate that there is no active floating
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Move the NS TBFLAG down from bit 19 to bit 6, which has not
> been used since commit c1e3781090b9d36c60 in 2015, when we
> started passing the entire MMU index in the TB flags rather
> than just a 'privilege level' bit.
>
> This rearrangement is not
On 4/16/19 5:57 AM, Peter Maydell wrote:
> We are close to running out of TB flags for AArch32; we could
> start using the cs_base word, but before we do that we can
> economise on our usage by sharing the same bits for the VFP
> VECSTRIDE field and the XScale XSCALE_CPAR field. This
> works
On 4/16/19 5:57 AM, Peter Maydell wrote:
> The M-profile FPCCR.S bit indicates the security status of
> the floating point context. In the pseudocode ExecuteFPCheck()
> function it is unconditionally set to match the current
> security state whenever a floating point instruction is
> executed.
>
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Handle floating point registers in exception return.
> This corresponds to pseudocode functions ValidateExceptionReturn(),
> ExceptionReturn(), PopStack() and ConsumeExcStackFrame().
>
> Signed-off-by: Peter Maydell
> ---
> target/arm/helper.c | 142
** Changed in: qemu
Status: New => Confirmed
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Title:
autogen crashes on qemu-sh4-user after 61dedf2af7
Status in QEMU:
Confirmed
Bug
On 4/16/19 5:57 AM, Peter Maydell wrote:
> The magic value pushed onto the callee stack as an integrity
> check is different if floating point is present.
>
> Signed-off-by: Peter Maydell
> ---
> target/arm/helper.c | 22 +++---
> 1 file changed, 19 insertions(+), 3 deletions(-)
On 4/24/19 12:29 AM, Richard Henderson wrote:
> On 4/23/19 3:09 PM, Philippe Mathieu-Daudé wrote:
>> On 4/23/19 8:37 PM, David Hildenbrand wrote:
>>> On 20.04.19 09:34, Richard Henderson wrote:
Remove a function of the same name from target/arm/.
Use a branchless implementation of abs
** Changed in: qemu
Status: New => Confirmed
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Title:
qemu-3.1.0-rc0: mips emulation hangs when executing invalid
instructions
Status
** Tags added: mips
** Tags added: linux-user
** Changed in: qemu
Status: New => Fix Committed
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Title:
"qemu: Unexpected FPU mode"
** Changed in: qemu
Status: New => Fix Committed
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Title:
mips_cpu_handle_mmu_fault renders all accessed pages executable
Status in
On 4/16/19 5:57 AM, Peter Maydell wrote:
> The TailChain() pseudocode specifies that a tail chaining
> exception should sanitize the excReturn all-ones bits and
> (if there is no FPU) the excReturn FType bits; we weren't
> doing this.
>
> Signed-off-by: Peter Maydell
> ---
> target/arm/helper.c
On 4/16/19 5:57 AM, Peter Maydell wrote:
> For v8M floating point support, transitions from Secure
> to Non-secure state via BLNS and BLXNS must clear the
> CONTROL.SFPA bit. (This corresponds to the pseudocode
> BranchToNS() function.)
>
> Signed-off-by: Peter Maydell
> ---
>
Hi Aleksandar,
On 4/23/19 7:35 PM, Aleksandar Markovic wrote:
> From: Daniel Santos
>
> Sanitize interp_info structure in load_elf_binary() and, for mips only,
> init its field fp_abi. This fixes appearances of "Unexpected FPU mode"
> message in some MIPS use cases.
>
Please add:
Fixes:
On 4/23/19 11:22 PM, Eduardo Habkost wrote:
> Use SupportStatusInfo to represent deprecation information of
> machine types.
>
> Instead of using a generic "use XXX instead" message for humans,
> encode the suggested alternative in a machine-friendly way at the
> 'suggested_alternatives' field.
>
On 4/23/19 3:09 PM, Philippe Mathieu-Daudé wrote:
> On 4/23/19 8:37 PM, David Hildenbrand wrote:
>> On 20.04.19 09:34, Richard Henderson wrote:
>>> Remove a function of the same name from target/arm/.
>>> Use a branchless implementation of abs that gcc uses for x86.
>>>
>>> Signed-off-by: Richard
Patchew URL: https://patchew.org/QEMU/20190423222005.246981-1...@google.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190423222005.246981-1...@google.com
Subject: [Qemu-devel] [PATCH] The ioctl(SIOCGIFNAME)
Patch sent to the list. Apologies for the delay.
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https://bugs.launchpad.net/bugs/1814352
Title:
SIOCGIFNAME takes a struct ifreq not an integer
Status in QEMU:
Confirmed
Bug
On 4/23/19 6:06 PM, Thomas Huth wrote:
> We are printing all other help output to stdout already (e.g. "-help",
> "-cpu help" and "-machine help" output). So the "-net nic,model=help"
> output should go to stdout instead of stderr, too. And while we're at
> it, also print the NICs line by line,
Signed-off-by: Erik Kline
Buglink: https://bugs.launchpad.net/qemu/+bug/1814352
---
linux-user/ioctls.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h
index ae8951625f..37501f575c 100644
--- a/linux-user/ioctls.h
+++
Hi Eduardo,
On 4/23/19 11:22 PM, Eduardo Habkost wrote:
> This struct will be used to represent support and deprecation
> status of QEMU features.
Excellent idea!
>
> Signed-off-by: Eduardo Habkost
> ---
> qapi/common.json | 24
> 1 file changed, 24 insertions(+)
>
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Handle floating point registers in exception entry.
> This corresponds to the FP-specific parts of the pseudocode
> functions ActivateException() and PushStack().
>
> We defer the code corresponding to UpdateFPCCR() to a later patch.
>
> Signed-off-by:
On 4/20/19 9:34 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 9 +
> 1 file changed, 1 insertion(+), 8 deletions(-)
>
> diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
> index 65561d2c49..62be8a6f6a 100644
> ---
On 4/20/19 9:34 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/s390x/translate.c | 8 +---
> 1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/target/s390x/translate.c b/target/s390x/translate.c
> index 0afa8f7ca5..030129acbb 100644
> ---
On Wed, Apr 24, 2019 at 08:02:17AM +1000, Dave Chinner wrote:
> On Tue, Apr 23, 2019 at 01:36:12PM +0530, Pankaj Gupta wrote:
> > Dont support 'MAP_SYNC' with non-DAX files and DAX files
> > with asynchronous dax_device. Virtio pmem provides
> > asynchronous host page cache flush mechanism. We
On 4/23/19 8:37 PM, David Hildenbrand wrote:
> On 20.04.19 09:34, Richard Henderson wrote:
>> Remove a function of the same name from target/arm/.
>> Use a branchless implementation of abs that gcc uses for x86.
>>
>> Signed-off-by: Richard Henderson
>> ---
>> tcg/tcg-op.h | 5 +
On Tue, Apr 23, 2019 at 01:36:12PM +0530, Pankaj Gupta wrote:
> Dont support 'MAP_SYNC' with non-DAX files and DAX files
> with asynchronous dax_device. Virtio pmem provides
> asynchronous host page cache flush mechanism. We don't
> support 'MAP_SYNC' with virtio pmem and xfs.
>
> Signed-off-by:
Hi Hervé,
I haven't forgot this series (still 15 months passed...) and it is now
integrated in a bigger one. While retesting the whole previous to post,
I noticed an error...
On 1/6/18 4:37 PM, Hervé Poussineau wrote:
> Remove mc146818rtc instanciated in malta board, to not have it twice.
>
>
On 23.04.19 23:40, Richard Henderson wrote:
> On 4/23/19 2:02 PM, David Hildenbrand wrote:
>> On 23.04.19 21:28, Richard Henderson wrote:
>>> On 4/23/19 12:04 PM, David Hildenbrand wrote:
In order to use this on s390x for VECTOR ELEMENT SHIFT, like
+static DisasJumpType
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Currently the code in v7m_push_stack() which detects a violation
> of the v8M stack limit simply returns early if it does so. This
> is OK for the current integer-only code, but won't work for the
> floating point handling we're about to add. We need to
On 4/23/19 2:02 PM, David Hildenbrand wrote:
> On 23.04.19 21:28, Richard Henderson wrote:
>> On 4/23/19 12:04 PM, David Hildenbrand wrote:
>>> In order to use this on s390x for VECTOR ELEMENT SHIFT, like
>>>
>>> +static DisasJumpType op_vesv(DisasContext *s, DisasOps *o)
>>> +{
>>> +const
On 4/16/19 5:57 AM, Peter Maydell wrote:
> The M-profile CONTROL register has two bits -- SFPA and FPCA --
> which relate to floating-point support, and should be RES0 otherwise.
> Handle them correctly in the MSR/MRS register access code.
> Neither is banked between security states, so they are
Patchew URL: https://patchew.org/QEMU/20190423212246.3542-1-ehabk...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190423212246.3542-1-ehabk...@redhat.com
Subject: [Qemu-devel] [PATCH 0/3] Export machine
On 3/26/2019 6:20 PM, Philippe Mathieu-Daudé wrote:
Please share the SELinux policy files, containerization scripts, etc.
There is probably a home for them in qemu.git, libvirt.git, or elsewhere
upstream.
We need to find a way to make the sandboxing improvements available to
users besides
Use SupportStatusInfo to represent deprecation information of
machine types.
Instead of using a generic "use XXX instead" message for humans,
encode the suggested alternative in a machine-friendly way at the
'suggested_alternatives' field.
Signed-off-by: Eduardo Habkost
---
include/hw/boards.h
Export machine type deprecation information through the
query-machines QMP command. With this, libvirt and management
software will be able to show this information to users and/or
suggest changes to VM configuration to avoid deprecated machines.
Signed-off-by: Eduardo Habkost
---
This struct will be used to represent support and deprecation
status of QEMU features.
Signed-off-by: Eduardo Habkost
---
qapi/common.json | 24
1 file changed, 24 insertions(+)
diff --git a/qapi/common.json b/qapi/common.json
index 99d313ef3b..b59d0dc66b 100644
---
On 18.04.19 13:31, Christian Borntraeger wrote:
> add the enhanced sort facility.
>
> Signed-off-by: Christian Borntraeger
> ---
> target/s390x/cpu_features.c | 10 ++
> target/s390x/cpu_features.h | 1 +
> target/s390x/cpu_features_def.h | 8
>
This series adds machine type deprecation information to the
output of the `query-machines` QMP command. With this, libvirt
and management software will be able to show this information to
users and/or suggest changes to VM configuration to avoid
deprecated machine types.
Eduardo Habkost (3):
On 23.04.19 21:28, Richard Henderson wrote:
> On 4/23/19 12:04 PM, David Hildenbrand wrote:
>> In order to use this on s390x for VECTOR ELEMENT SHIFT, like
>>
>> +static DisasJumpType op_vesv(DisasContext *s, DisasOps *o)
>> +{
>> +const uint8_t es = get_field(s->fields, m4);
>> +const
On 23.04.19 21:21, Richard Henderson wrote:
> On 4/23/19 11:58 AM, David Hildenbrand wrote:
>>> +void tcg_gen_gvec_shls(unsigned vece, uint32_t dofs, uint32_t aofs,
>>> + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
>>> +void tcg_gen_gvec_shrs(unsigned vece, uint32_t
On 4/16/19 5:57 AM, Peter Maydell wrote:
> If the floating point extension is present, then the SG instruction
> must clear the CONTROL_S.SFPA bit. Implement this.
>
> (On a no-FPU system the bit will always be zero, so we don't need
> to make the clearing of the bit conditional on
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of
the QEMU 4.0.0 release. This release contains 3100+ commits from 220
authors.
You can grab the tarball from our download page here:
https://www.qemu.org/download/#source
The full list of changes are available at:
On 23.04.19 22:26, Richard Henderson wrote:
> On 4/23/19 12:15 PM, David Hildenbrand wrote:
>> On 20.04.19 09:34, Richard Henderson wrote:
>>> Based-on: tcg-next, which at present is only tcg_gen_extract2.
>>>
>>> The dupm patches have been on list before, with a larger context
>>> of supporting
On 4/23/19 12:15 PM, David Hildenbrand wrote:
> On 20.04.19 09:34, Richard Henderson wrote:
>> Based-on: tcg-next, which at present is only tcg_gen_extract2.
>>
>> The dupm patches have been on list before, with a larger context
>> of supporting tcg/ppc. The rest of the set was written to support
As of QEMU 4 OpenBIOS can boot Solaris again, and it does properly
allocate multiple CPUs. Of course, it's a whole lot slower on multiple
CPUs which I wasn't really anticipating, but it does work. (And single
CPU is so fast anyway compared to the actual hardware it's emulating!)
So this bug while
Thank you for your response.
On Tue, Apr 23, 2019, 7:22 PM Stefan Hajnoczi wrote:
> On Tue, Apr 23, 2019 at 02:07:03AM +0530, amit kumar rathore wrote:
> > Sir,
> > My proposal is still not review by my mentor. My mentor is JAN KISZKA .I
> already mail him but he not responding me. What I do
Ping. More reviews needed.
I've already got Philippe's reviewed-by, thanks!
- Wainer
On 03/29/2019 06:07 PM, Wainer dos Santos Moschetta wrote:
Hi all!
This series bundles the support to Python3, improvement to image caching, and
miscellaneous changes for the vm-test (`make vm-build-*`).
On 4/23/19 12:04 PM, David Hildenbrand wrote:
> In order to use this on s390x for VECTOR ELEMENT SHIFT, like
>
> +static DisasJumpType op_vesv(DisasContext *s, DisasOps *o)
> +{
> +const uint8_t es = get_field(s->fields, m4);
> +const uint8_t v1 = get_field(s->fields, v1);
> +const
On 4/23/19 11:58 AM, David Hildenbrand wrote:
>> +void tcg_gen_gvec_shls(unsigned vece, uint32_t dofs, uint32_t aofs,
>> + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
>> +void tcg_gen_gvec_shrs(unsigned vece, uint32_t dofs, uint32_t aofs,
>> +
On 20.04.19 09:34, Richard Henderson wrote:
> Based-on: tcg-next, which at present is only tcg_gen_extract2.
>
> The dupm patches have been on list before, with a larger context
> of supporting tcg/ppc. The rest of the set was written to support
> David's s390 vector patches. In particular:
>
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