Hi,
On Thu, Jun 06, 2019 at 03:30:29PM +0200, Marc-André Lureau wrote:
> Hi
>
> On Fri, Apr 26, 2019 at 8:32 AM Tiwei Bie wrote:
> >
> > We need to destroy the host notifiers when cleaning up
> > the backend. Otherwise, some resources are not released
> > after the connection is closed, and it
Hi,
This series gives me several compilation errors.
When compiled with --disable-werror, OSX 10.3 guest on qemu-system-ppc
shows corrupted desktop graphics.
Compiled with:
./configure --target-list="ppc-softmmu" --enable-sdl --enable-gtk && make
-j8
gcc is:
[hsp@fedora30 qemu-master]$ gcc -v
On Fri, Jun 07, 2019 at 12:26:48AM -0300, Eduardo Habkost wrote:
> On Fri, Feb 01, 2019 at 11:10:31AM -0500, Cleber Rosa wrote:
> >
> >
> > On 1/31/19 4:26 PM, Cleber Rosa wrote:
> > >
> > >
> > > On 1/31/19 3:21 PM, Cleber Rosa wrote:
> > >>
> > >>
> > >> On 1/31/19 3:02 PM, Wainer dos Santos
On Fri, Jun 07, 2019 at 01:58:05AM +0200, Aleksandar Markovic wrote:
> On Jun 7, 2019 1:42 AM, "Lucien Murray-Pitts"
> wrote:
> >
> > Altering all comments in target/m68k to match Qemu coding styles so that
> future
> > patches wont fail due to style breaches.
> >
>
> Are you saying that patches
On Fri, Feb 01, 2019 at 11:10:31AM -0500, Cleber Rosa wrote:
>
>
> On 1/31/19 4:26 PM, Cleber Rosa wrote:
> >
> >
> > On 1/31/19 3:21 PM, Cleber Rosa wrote:
> >>
> >>
> >> On 1/31/19 3:02 PM, Wainer dos Santos Moschetta wrote:
> >>>
> >>> On 01/17/2019 04:56 PM, Cleber Rosa wrote:
> Just
On 4/11/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
> Implement reconnect. To achieve this:
>
> 1. add new modes:
>connecting-wait: means, that reconnecting is in progress, and there
> were small number of reconnect attempts, so all requests are
> waiting for the connection.
>
On 4/11/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
> Introduce a function to gracefully wake-up a coroutine, sleeping in
> qemu_co_sleep_ns() sleep.
Maybe:
Introduce a function to gracefully short-circuit the remainder of the
delay for a coroutine sleeping in qemu_co_sleep_ns().
>
>
>
> Also, unless I'm misunderstanding something our implementation of LR/SC is
>
pretty broken. We're just using a CAS to check if the value changed, which
> suffers from the ABA problem that LR/SC is there to fix in the first
> place. I
> might be missing something here, though, as it looks
On 4/11/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
> Reconnect will be implemented in the following commit, so for now,
> in semantics below, disconnect itself is a "serious error".
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> qapi/block-core.json | 12 +++-
>
On 4/11/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
> To implement reconnect we need several states for the client:
> CONNECTED, QUIT and two different CONNECTING states. CONNECTING states
> will be added in the following patches. This patch implements CONNECTED
> and QUIT.
>
> QUIT means,
On 4/11/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
> No reason to use blocking channel for negotiation and we'll benefit in
> further reconnect feature, as qio_channel reads and writes will do
> qemu_coroutine_yield while waiting for io completion.
>
> Signed-off-by: Vladimir
On 4/11/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
> nbd_client_connect is going to be used from connection_co, so, let's
> refactor nbd_client_connect in advance, leaving io channel
> configuration all in nbd_client_connect.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
>
On 6/6/19 1:41 PM, John Snow wrote:
> Similarly to the previous commit, we need to also keep a ledger of the
> additional directory size burden that we've not yet committed so we can
> reject new additions sooner instead of later.
>
> Signed-off-by: John Snow
> ---
> block/qcow2.h| 1 +
On 6/6/19 1:41 PM, John Snow wrote:
> When we check to see if we can store a bitmap, we don't check how many
> we've queued up. This can cause a problem saving bitmaps on close
> instead of when we request them to be added. With the stricter add
> interface, prohibit these bitmaps specifically.
>
On 6/6/19 1:41 PM, John Snow wrote:
> Allow propagating error code information from
> bdrv_remove_persistent_dirty_bitmap as well.
>
> Give it an interface that matches the newly revised
> bdrv_add_persistent_dirty_bitmap, including removing the persistent flag
> when the operation succeeds and
On 6/6/19 1:41 PM, John Snow wrote:
> Instead of bdrv_can_store_new_bitmap, rework this as
> bdrv_add_persistent_dirty_bitmap. This makes a more obvious symmetry
> with bdrv_remove_persistent_dirty_bitmap. Most importantly, we are free
> to modify the driver state because we know we ARE adding a
On 6/6/19 1:41 PM, John Snow wrote:
> This simply makes this function a little more convenient to call, and in
> a forthcoming patch gives us a return code we can report to the
> caller. (Which in turn makes THOSE functions easier to call.)
>
> While we're here, remove the offset+size arguments
I'm Ian Kelling, part of the FSF tech team that maintains the
lists.nongnu.org server.
The server is sending mail using a new ip which is causing a higher than
average number of mail servers telling us to retry and send later as
they hopefully decide we are legitimate. The only big provider doing
On Thu, Jun 06, 2019 at 02:10:48PM +0200, Greg Kurz wrote:
> On Thu, 6 Jun 2019 16:45:30 +0530
> Aravinda Prasad wrote:
>
> > On Thursday 06 June 2019 11:36 AM, Greg Kurz wrote:
> > > On Thu, 6 Jun 2019 13:06:14 +1000
> > > David Gibson wrote:
> > >
> > >> On Wed, May 29, 2019 at 11:10:57AM
On Thu, Jun 06, 2019 at 04:55:18PM +0530, Aravinda Prasad wrote:
>
>
> On Thursday 06 June 2019 08:36 AM, David Gibson wrote:
> > On Wed, May 29, 2019 at 11:10:57AM +0530, Aravinda Prasad wrote:
> >> This patch includes migration support for machine check
> >> handling. Especially this patch
On Thu, Jun 06, 2019 at 07:08:59PM +0200, Greg Kurz wrote:
> If KVM is too old to support XIVE native exploitation mode, we might end
> up using the emulated XIVE after CAS. This is sub-optimal if KVM in-kernel
> XICS is available, which is the case most of the time.
This is intentional. A
On Thu, Jun 06, 2019 at 07:47:32PM +0200, Cédric Le Goater wrote:
> This is a good way to debug the DT creation for current PowerNV
> machines and new ones to come.
>
> Signed-off-by: Cédric Le Goater
Applied, thanks.
> ---
> hw/ppc/pnv.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff
On Thu, Jun 06, 2019 at 07:44:09PM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> It should be generic Hypervisor Virtualization interrupts for HV
> directed rings and traditional External Interrupts for the OS directed
> ring.
>
> Don't generate anything for the user ring as
On Jun 7, 2019 1:06 AM, "Philippe Mathieu-Daudé" wrote:
>
> From: Philippe Mathieu-Daudé
>
> This tests boots a Linux kernel on a Malta machine up to a
> busybox shell on the serial console. Few commands are executed
> before halting the machine (via reboot).
>
> We use the initrd cpio image
On Jun 7, 2019 1:42 AM, "Lucien Murray-Pitts"
wrote:
>
> Altering all comments in target/m68k to match Qemu coding styles so that
future
> patches wont fail due to style breaches.
>
Are you saying that patches fail checkpatch checks even if the new code has
only correct comment format? (Or, in
В сообщении от Thursday 06 June 2019 20:04:07 Alex Bennée написал(а):
>
> Andrew Randrianasulu writes:
>
> > В сообщении от Thursday 06 June 2019 18:43:10 Alex Bennée написал(а):
> >> addr1 = addr & ~((target_ulong)size - 1);
> >
> > yes, this fixes my hang! Thanks!
>
> Can I take that as a:
>
Altering all comments in target/m68k to match Qemu coding styles so that future
patches wont fail due to style breaches.
Signed-off-by: Lucien Murray-Pitts
---
Notes:
v1->v2
- incorrectly made split-single line comments multiple single lines
- added corrections for /** comments as
Hi Eddie,
On 6/4/19 12:09 AM, Eddie James wrote:
> The XDMA engine embedded in the Aspeed SOCs performs PCI DMA operations
> between the SOC (acting as a BMC) and a host processor in a server.
If I got your model correctly, it does no DMA operation but simply
answer correctly to the BMC, and set
On Fri, Jun 07, 2019 at 01:02:32AM +0200, Philippe Mathieu-Daudé wrote:
> From: Philippe Mathieu-Daudé
>
> This tests boots a Linux kernel on a Malta machine up to a
> busybox shell on the serial console. Few commands are executed
> before halting the machine (via reboot).
>
> We use the initrd
Hello,
As a test of the waters, how would the QEMU community feel about
including the RISC-V OpenSBI project as a ROM submodule?
The idea would be to have OpenSBI (similar to ATF for ARM and a BIOS
for x86) included by default to simplify the QEMU RISC-V boot process
for users. This would remove
Hi Alex,
On 6/6/19 10:29 AM, Alex Bennée wrote:
> As I've been reviewing a lot of this recently and I'm going to put
> together a pull request I'd better keep an eye on it.
>
> Signed-off-by: Alex Bennée
> ---
> MAINTAINERS | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff
On 6/5/19 9:15 PM, Lidong Chen wrote:
> The check for poll_fds in g_assert() was incorrect. The correct assertion
> should check "n_poll_fds + w->num <= ARRAY_SIZE(poll_fds)" because the
> subsequent for-loop is doing access to poll_fds[n_poll_fds + i] where i
> is in [0, w->num).
>
>
Hi,
On 6/5/19 9:15 PM, Lidong Chen wrote:
> Due to an off-by-one error, the assert statements allow an
> out-of-bound array access.
I believe this is a "v2 RESEND" patch, since there is no change with the
other v2 posted here:
https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg00634.html
On Fri, Jun 07, 2019 at 12:55:21AM +0200, Philippe Mathieu-Daudé wrote:
> From: Philippe Mathieu-Daudé
>
> Similar to the x86_64/pc test, it boots a Linux kernel on an
> Emcraft board and verify the serial is working.
>
> If ARM is a target being built, "make check-acceptance" will
>
On 6/6/19 5:43 PM, Alex Bennée wrote:
> While size_t is defined to happily access the biggest host object this
> isn't the case when generating masks for 64 bit guests on 32 bit
> hosts. Otherwise we end up truncating the address when we fall back to
> our unaligned helper.
>
> Cc: Andrew
Hi,
I added test guide lines from Subbaraya Sundeep [*] to avoid this
board to bitrot.
v2: Addressed issues reported by Cleber
Regards,
Phil.
[*] https://lists.gnu.org/archive/html/qemu-devel/2017-05/msg03810.html
Philippe Mathieu-Daudé (2):
BootLinuxConsoleTest: Do not log empty lines
On Fri, May 31, 2019 at 3:38 PM Jonathan Behrens wrote:
>
> I've thought some more about this issue, and long term I think there are a
> couple different useful configurations:
>
> For end users, having default firmware that loaded the OS from a block device
> would be easiest
>
> Current
*** This bug is a duplicate of bug 1805256 ***
https://bugs.launchpad.net/bugs/1805256
** This bug has been marked a duplicate of bug 1805256
qemu-img hangs on high core count ARM system
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed
From: Philippe Mathieu-Daudé
Avoid to log empty lines in console debug logs.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Reviewed-by: Cleber Rosa
Tested-by: Cleber Rosa
Acked-by: Aleksandar Markovic
---
v2: no change
---
tests/acceptance/boot_linux_console.py | 6
On Wed, Jun 5, 2019 at 3:59 PM Hesham Almatary
wrote:
>
> On Wed, 5 Jun 2019 at 23:07, Alistair Francis wrote:
> >
> > On Thu, May 30, 2019 at 6:52 AM Hesham Almatary
> > wrote:
> > >
> > > The PMP should be checked when doing a page table walk, and report access
> > > fault exception if the
From: Philippe Mathieu-Daudé
Similar to the x86_64/pc test, it boots a Linux kernel on an
Emcraft board and verify the serial is working.
If ARM is a target being built, "make check-acceptance" will
automatically include this test by the use of the "arch:arm" tags.
Alternatively, this test can
From: Philippe Mathieu-Daudé
This tests boots a Linux kernel on a Malta machine up to a
busybox shell on the serial console. Few commands are executed
before halting the machine (via reboot).
We use the initrd cpio image from the kerneltests project:
https://kerneltests.org/
If MIPS is a
Hi,
It was a rainy week-end here, so I invested it to automatize some
of my MIPS tests.
The BootLinuxSshTest is not Global warming friendly, it is not
meant to run on a CI system but rather on a workstation previous
to post a pull request.
It can surely be improved, but it is a good starting
From: Philippe Mathieu-Daudé
Similar to the x86_64/pc test, it boots a Linux kernel on a Malta
machine and verify the serial is working.
Use the documentation added in commit f7d257cb4a17 to test
nanoMIPS kernels and the I7200 CPU.
This test can be run using:
$ avocado --show=console run -t
On 5/3/19 9:37 PM, Eduardo Habkost wrote:
> Python 2 will reach end of life in January 1 2020. Declare it as
> deprecated.
>
> Signed-off-by: Eduardo Habkost
> ---
> configure| 8
> qemu-deprecated.texi | 8
> 2 files changed, 16 insertions(+)
>
> diff --git
On 6/6/19 5:54 PM, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20190606184159.979-1-js...@redhat.com/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Subject: [Qemu-devel] [PATCH 0/5]
On 6/6/19 7:24 PM, Markus Armbruster wrote:
> Signed-off-by: Markus Armbruster
> ---
> MAINTAINERS | 24 +++-
> 1 file changed, 11 insertions(+), 13 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index bdc82c5735..6dc5b5cb67 100644
> --- a/MAINTAINERS
> +++
On 6/6/19 7:24 PM, Markus Armbruster wrote:
> When scripts/get_maintainer.pl reports something like
>
> John Doe (maintainer:Overall)
>
> the user is left to wonder *which* of our three "Overall" sections
> applies: the one under "Guest CPU cores (TCG)", or the one under
> "Guest CPU Cores
Patchew URL: https://patchew.org/QEMU/20190606184159.979-1-js...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH 0/5] block/dirty-bitmap: check number and size
constraints against queued bitmaps
Type:
On Mon, Jun 03, 2019 at 02:18:19PM -0400, Laine Stump wrote:
> On 6/3/19 2:12 PM, Michael S. Tsirkin wrote:
> > On Mon, Jun 03, 2019 at 02:06:47PM -0400, Laine Stump wrote:
> > > On 5/28/19 10:54 PM, Michael S. Tsirkin wrote:
> > > > On Tue, May 28, 2019 at 05:14:22PM -0700, si-wei liu wrote:
> >
On 6/6/19 1:16 AM, Cédric Le Goater wrote:
Hello Eddie,
On 04/06/2019 00:09, Eddie James wrote:
The XDMA engine embedded in the Aspeed SOCs performs PCI DMA operations
between the SOC (acting as a BMC) and a host processor in a server.
The XDMA engine exists on the AST2400, AST2500, and
This acceptance test, validates that a full blown Linux guest can
successfully boot in QEMU. In this specific case, the guest chosen is
Fedora version 30. It adds two different tests for machine types pc
and q35.
The method for checking the successful boot is based on "cloudinit"
and its "phone
Tests using the avocado.utils.vmimage library make use of qemu-img,
and because it makes sense to use the version matching the rest of the
source code, let's make sure it gets built.
Its selection, instead of a possible qemu-img binary installed system
wide, is already dealt with by the change
An Avocado Test ID[1] is composed by a number of components, but it
starts with the Test Name, usually a file system location that was
given to the loader.
Because the source directory is being given as a prefix to the
"tests/acceptance" directory containing the acceptance tests, the test
names
So that when binaries such as qemu-img are searched for, those in the
build tree will be favored. As a clarification, SRC_ROOT_DIR is
dependent on the location from where tests are executed, so they are
equal to the build directory if one is being used.
The original motivation is that Avocado
This depends on a proposed feature to Avocado, a new module that
"drains" data and processes it. In this case, a drainer for the
console socket file descriptor is used, and the data is sent to the
"console" logger.
This allows for a much better feedback of the test process, showing
boot data
This is related to the the differences in in-tree and out-of-tree
builds in QEMU. For simplification, means my build directory.
Currently, by running a `make check-acceptance` one gets (in
tests/acceptance/avocado_qemu/__init__.py):
SRC_ROOT_DIR: /tests/acceptance/avocado_qemu/../../..
This boots a Fedora 30 guest using edk2.
During the first Fedora 30 boot on aarch64, there's a filesystem
resize operation. The typical output is similar to:
[ 203.798938] EXT4-fs (sda2): resizing filesystem from 999168 to 999675
blocks
[ 203.823032] EXT4-fs (sda2): resized filesystem
This adds an acceptance test that validates that a full blown Linux
guest can successfully boot in QEMU.
Changes from v5:
* Added explicit "--enable-slirp=git" to Travis CI configure line, as
these tests depend on "-netdev user" like networking.
* Bumped Fedora to most
On 6/5/19 3:47 AM, Maxim Levitsky wrote:
> On Mon, 2019-06-03 at 18:25 -0400, John Snow wrote:
>>
>> On 4/17/19 3:53 PM, Maxim Levitsky wrote:
>>> Phase bits are only set by the hardware to indicate new completions
>>> and not by the device driver.
>>>
>>> Signed-off-by: Maxim Levitsky
>>> ---
On Thu, Jun 06, 2019 at 07:01:49PM +0200, Markus Armbruster wrote:
Stafford Horne writes:
On Mon, Jun 03, 2019 at 10:45:14AM +0200, Philippe Mathieu-Daudé wrote:
On 5/31/19 5:36 AM, Stafford Horne wrote:
> On Wed, May 29, 2019 at 05:08:52PM +0200, Markus Armbruster wrote:
>> When
On 6/6/19 5:15 AM, Stefan Brankovic wrote:
> +/*
> + * We use this macro if one instruction is realized with direct
> + * translation, and second one with helper.
> + */
> +#define GEN_VXFORM_TRANS_DUAL(name0, flg0, flg2_0, name1, flg1, flg2_1)\
> +static void glue(gen_,
On 6/6/19 5:15 AM, Stefan Brankovic wrote:
> Optimize Altivec instruction vclzh (Vector Count Leading Zeros Halfword).
> This instruction counts the number of leading zeros of each halfword element
> in source register and places result in the appropriate halfword element of
> destination
On 06/06/2019 20:24, Laurent Vivier wrote:
> On 05/06/2019 09:43, Laurent Vivier wrote:
>> On 05/06/2019 08:32, Mark Cave-Ayland wrote:
>>> On 04/06/2019 22:23, Laurent Vivier wrote:
>>>
This patch breaks something in the libcrypto.
I've been able to reproduce the problem with
From: Sarah Harris
Signed-off-by: Michael Rolnik
---
MAINTAINERS | 6 ++
arch_init.c | 2 ++
configure | 6 ++
default-configs/avr-softmmu.mak | 5 +
include/disas/dis-asm.h | 6 ++
This series of patches adds 8bit AVR cores to QEMU.
All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested
yet.
However I was able to execute simple code with functions. e.g fibonacci
calculation.
This series of patches include a non real, sample board.
No fuses support
This includes:
- encoding of all 16 bit instructions
- encoding of all 32 bit instructions
Signed-off-by: Michael Rolnik
---
target/avr/insn.decode | 176 +
1 file changed, 176 insertions(+)
create mode 100644 target/avr/insn.decode
diff --git
From: Sarah Harris
Stubs for unimplemented instructions and helpers for instructions that need to
interact with QEMU.
SPM and WDR are unimplemented because they require emulation of complex
peripherals.
The implementation of SLEEP is very limited due to the lack of peripherals to
generate
From: Sarah Harris
These were designed to facilitate testing but should provide enough function to
be useful in other contexts.
Only a subset of the functions of each peripheral is implemented, mainly due to
the lack of a standard way to handle electrical connections (like GPIO pins).
On 05/06/2019 09:43, Laurent Vivier wrote:
> On 05/06/2019 08:32, Mark Cave-Ayland wrote:
>> On 04/06/2019 22:23, Laurent Vivier wrote:
>>
>>> This patch breaks something in the libcrypto.
>>>
>>> I've been able to reproduce the problem with Fedora 29:
>>>
>>> dnf install 'dnf-command(download)'
From: Sarah Harris
A simple board setup that configures an AVR CPU to run a given firmware image.
This is all that's useful to implement without peripheral emulation as AVR CPUs
include a lot of on-board peripherals.
Signed-off-by: Michael Rolnik
---
hw/Kconfig | 1 +
From: Sarah Harris
This includes:
- CPU data structures
- object model classes and functions
- migration functions
- GDB hooks
Signed-off-by: Michael Rolnik
---
target/avr/cpu-qom.h | 83 +++
target/avr/cpu.c | 558 +++
target/avr/cpu.h |
From: Sarah Harris
This includes:
- TCG translations for each instruction
Signed-off-by: Michael Rolnik
---
target/avr/translate.c | 2937
1 file changed, 2937 insertions(+)
create mode 100644 target/avr/translate.c
diff --git
Similarly to the previous commit, we need to also keep a ledger of the
additional directory size burden that we've not yet committed so we can
reject new additions sooner instead of later.
Signed-off-by: John Snow
---
block/qcow2.h| 1 +
block/qcow2-bitmap.c | 13 -
2 files
This simply makes this function a little more convenient to call, and in
a forthcoming patch gives us a return code we can report to the
caller. (Which in turn makes THOSE functions easier to call.)
While we're here, remove the offset+size arguments which are only ever
called with the same values
When we check to see if we can store a bitmap, we don't check how many
we've queued up. This can cause a problem saving bitmaps on close
instead of when we request them to be added. With the stricter add
interface, prohibit these bitmaps specifically.
To match, make the remove interface more
Allow propagating error code information from
bdrv_remove_persistent_dirty_bitmap as well.
Give it an interface that matches the newly revised
bdrv_add_persistent_dirty_bitmap, including removing the persistent flag
when the operation succeeds and refusing to operate on bitmaps that are
not
When adding new persistent dirty bitmaps, we only check constraints
against currently stored bitmaps, and ignore the pending number and size
of any bitmaps yet to be stored.
Rework the "can_store" and "remove" interface to explicit "add" and "remove",
and begin keeping track of the queued burden
On Fri, May 17, 2019 at 3:12 PM Alistair Francis
wrote:
>
> This should be the last series bringing the patches from the RISC-V fork
> into mainline QEMU.
>
> Dayeol Lee (1):
> target/riscv: Fix PMP range boundary address bug
>
> Michael Clark (3):
> disas/riscv: Disassemble reserved
On Thu, Jun 6, 2019 at 5:55 AM Bin Meng wrote:
>
> On Thu, May 30, 2019 at 11:36 AM Bin Meng wrote:
> >
> > Hi Alistair,
> >
> > On Thu, May 30, 2019 at 11:14 AM Alistair Francis
> > wrote:
> > >
> > > On Wed, May 29, 2019 at 1:52 AM Bin Meng wrote:
> > > >
> > > > The largest pci bus number
On Thu, 6 Jun 2019 19:47:32 +0200
Cédric Le Goater wrote:
> This is a good way to debug the DT creation for current PowerNV
> machines and new ones to come.
>
> Signed-off-by: Cédric Le Goater
> ---
Reviewed-by: Greg Kurz
> hw/ppc/pnv.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff
Instead of bdrv_can_store_new_bitmap, rework this as
bdrv_add_persistent_dirty_bitmap. This makes a more obvious symmetry
with bdrv_remove_persistent_dirty_bitmap. Most importantly, we are free
to modify the driver state because we know we ARE adding a bitmap
instead of simply being asked if we
On 6/6/19 5:15 AM, Stefan Brankovic wrote:
> +for (i = 0; i < 2; i++) {
> +if (i == 0) {
> +/* Get high doubleword element of vB in avr. */
> +get_avr64(avr, VB, true);
> +} else {
> +/* Get low doubleword element of vB in avr. */
> +
On Wed, Jun 05, 2019 at 05:43:23PM -0300, Eduardo Habkost wrote:
> On Wed, Jun 05, 2019 at 12:06:59PM -0400, Cleber Rosa wrote:
> > On Tue, May 21, 2019 at 12:06:35AM +0200, Philippe Mathieu-Daudé wrote:
> > > Similar to the x86_64/pc test, it boots a Linux kernel on an
> > > Emcraft board and
On 6/6/19 5:15 AM, Stefan Brankovic wrote:
> Optimize Altivec instruction vclzd (Vector Count Leading Zeros Doubleword).
> This instruction counts the number of leading zeros of each doubleword element
> in source register and places result in the appropriate doubleword element of
> destination
On Thursday, 6 June 2019 13:12:32 CEST Daniel P. Berrangé wrote:
> On Wed, Jun 05, 2019 at 11:36:54PM +0200, Pino Toscano wrote:
> > Rewrite the implementation of the ssh block driver to use libssh instead
> > of libssh2. The libssh library has various advantages over libssh2:
> > - easier API
On Thu, Jun 06, 2019 at 06:19:43PM +0200, Kashyap Chamarthy wrote:
> Hi folks,
>
> Today I learnt about some obscure PCIe-related properties, in context of
> the adding PCIe root ports to a guest, namely:
>
> io-reserve
> mem-reserve
> bus-reserve
> pref32-reserve
>
Convert the float-to-integer VCVT instructions to decodetree.
Since these are the last unconverted instructions, we can
delete the old decoder structure entirely now.
Signed-off-by: Peter Maydell
---
target/arm/translate-vfp.inc.c | 72 ++
target/arm/translate.c | 241
Convert the VFP VMOV (immediate) instruction to decodetree.
Signed-off-by: Peter Maydell
---
target/arm/translate-vfp.inc.c | 129 +
target/arm/translate.c | 27 +--
target/arm/vfp.decode | 5 ++
3 files changed, 136 insertions(+), 25
This is a good way to debug the DT creation for current PowerNV
machines and new ones to come.
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 046f0a83c8e5..ed6892466793 100644
--- a/hw/ppc/pnv.c
+++
On 6/6/19 5:15 AM, Stefan Brankovic wrote:
> Optimize altivec instruction vgbbd (Vector Gather Bits by Bytes by Doubleword)
> All ith bits (i in range 1 to 8) of each byte of doubleword element in
> source register are concatenated and placed into ith byte of appropriate
> doubleword element in
Signed-off-by: Peter Maydell
---
target/arm/translate-vfp.inc.c | 10 ++
target/arm/translate.c | 8 +---
target/arm/vfp.decode | 5 +
3 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/target/arm/translate-vfp.inc.c
Convert the "single-precision" register moves to decodetree:
* VMSR
* VMRS
* VMOV between general purpose register and single precision
Note that the VMSR/VMRS conversions make our handling of
the "should this UNDEF?" checks consistent between the two
instructions:
* VMSR to MVFR0, MVFR1,
Convert the VFP VMLA instruction to decodetree.
This is the first of the VFP 3-operand data processing instructions,
so we include in this patch the code which loops over the elements
for an old-style VFP vector operation. The existing code to do this
looping uses the deprecated
Convert the VFP fused multiply-add instructions (VFNMA, VFNMS,
VFMA, VFMS) to decodetree.
Note that in the old decode structure we were implementing
these to honour the VFP vector stride/length. These instructions
were introduced in VFPv4, and in the v7A architecture they
are UNPREDICTABLE if the
For VFP short vectors, the VFP registers are divided into a
series of banks: for single-precision these are s0-s7, s8-s15,
s16-s23 and s24-s31; for double-precision they are d0-d3,
d4-d7, ... d28-d31. Some banks are "scalar" meaning that
use of a register within them triggers a pure-scalar or
Convert the VJCVT instruction to decodetree.
Signed-off-by: Peter Maydell
---
target/arm/translate-vfp.inc.c | 24
target/arm/translate.c | 12 +---
target/arm/vfp.decode | 4
3 files changed, 29 insertions(+), 11 deletions(-)
diff --git
Convert the VCVTT and VCVTB instructions which convert from
f32 and f64 to f16 to decodetree.
Since we're no longer constrained to the old decoder's style
using cpu_F0s and cpu_F0d we can perform a direct 16 bit
store of the right half of the input single-precision register
rather than doing a
Convert the VSEL instructions to decodetree.
We leave trans_VSEL() in translate.c for now as this allows
the patch to show just the changes from the old handle_vsel().
In the old code the check for "do D16-D31 exist" was hidden in
the VFP_DREG macro, and assumed that VFPv3 always implied that
Convert the VFP comparison instructions to decodetree.
Note that comparison instructions should not honour the VFP
short-vector length and stride information: they are scalar-only
operations. This applies to all the 2-operand instructions except
for VMOV, VABS, VNEG and VSQRT. (In the old
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