[PATCH] tests: fixes test-vmstate.c compile error on msys2

../tests/test-vmstate.c: In function 'int_cmp': ../tests/test-vmstate.c:884:5: error: unknown type name 'uint'; did you mean 'uInt'? 884 | uint ua = GPOINTER_TO_UINT(a); | ^~~~ | uInt ../tests/test-vmstate.c:885:5: error: unknown type name 'uint'; did you mean 'uInt'?

[PATCH v5 09/11] meson: Fixes qapi tests.

The error are: +@end table + +@end deftypefn + make: *** [Makefile.mtest:63: check-qapi-schema] Error 1 Signed-off-by: Yonggang Luo --- tests/qapi-schema/meson.build | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/qapi-schema/meson.build b/tests/qapi-schema/meson.buil

[PATCH v5 07/11] block: get file-win32.c handle locking option consistence with file-posix.c

Signed-off-by: Yonggang Luo --- block/file-win32.c | 23 +-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/block/file-win32.c b/block/file-win32.c index ab69bd811a..14e5f5c3b5 100644 --- a/block/file-win32.c +++ b/block/file-win32.c @@ -299,6 +299,11 @@ static

[PATCH v5 11/11] ci: Enable Github actions.

Signed-off-by: Yonggang Luo --- .github/workflows/main.yml| 31 +++ scripts/ci/windows/msys2-download.bat | 4 2 files changed, 35 insertions(+) create mode 100644 .github/workflows/main.yml create mode 100644 scripts/ci/windows/msys2-download.bat diff

[PATCH v5 10/11] docker: Add win32/msys2/mingw64 docker

Signed-off-by: Yonggang Luo --- tests/docker/dockerfiles/msys2.docker | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 tests/docker/dockerfiles/msys2.docker diff --git a/tests/docker/dockerfiles/msys2.docker b/tests/docker/dockerfiles/msys2.docker new file mode 100644 inde

[PATCH v5 05/11] ci: Enable msys2 ci in cirrus

Install msys2 in a proper way refer to https://github.com/cirruslabs/cirrus-ci-docs/issues/699 The https://wiki.qemu.org/Hosts/W32#Native_builds_with_MSYS2 need to be updated. There is no need of --cross-prefix, open mingw64.exe instead of msys2.exe then we don't need the --cross-prefix, besides

[PATCH v5 08/11] osdep: These function are only available on Non-Win32 system.

int qemu_lock_fd(int fd, int64_t start, int64_t len, bool exclusive); int qemu_unlock_fd(int fd, int64_t start, int64_t len); int qemu_lock_fd_test(int fd, int64_t start, int64_t len, bool exclusive); bool qemu_has_ofd_lock(void); Signed-off-by: Yonggang Luo --- include/qemu/osdep.h | 2 +- 1 fi

[PATCH v5 02/11] block: Fixes nfs on msys2/mingw

Signed-off-by: Yonggang Luo --- block/nfs.c | 26 +- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/block/nfs.c b/block/nfs.c index 61a249a9fc..34b2cd5708 100644 --- a/block/nfs.c +++ b/block/nfs.c @@ -24,7 +24,9 @@ #include "qemu/osdep.h" +#if !define

[PATCH v5 06/11] tests: Trying fixes test-replication.c on msys2.

Signed-off-by: Yonggang Luo --- tests/test-replication.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/tests/test-replication.c b/tests/test-replication.c index 9ab3666a90..d0e06f8d77 100644 --- a/tests/test-replication.c +++ b/tests/test-replication.c @@

[PATCH v5 01/11] Revert "configure: add --ninja option"

This reverts commit 48328880fddf0145bdccc499160fb24dfabfbd41. Signed-off-by: Yonggang Luo --- configure | 16 +--- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/configure b/configure index d3495e107f..5d8bf4d8bb 100755 --- a/configure +++ b/configure @@ -517,7 +517,6

[PATCH v5 03/11] ci: fixes msys2 build by upgrading capstone to 4.0.2

Signed-off-by: Yonggang Luo --- capstone | 2 +- configure | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/capstone b/capstone index 22ead3e0bf..1d23053284 16 --- a/capstone +++ b/capstone @@ -1 +1 @@ -Subproject commit 22ead3e0bfdb87516656453336160e0a37b066bf +Subproj

[PATCH v5 04/11] meson: upgrade meson for execute custom ninjatool under msys2 properly

The ninja options now have no need anymore. Signed-off-by: Yonggang Luo --- meson | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meson b/meson index 68ed748f84..492afe50a4 16 --- a/meson +++ b/meson @@ -1 +1 @@ -Subproject commit 68ed748f84f14c2d4e62dcbd123816e5898eb04c

[PATCH v5 00/11] Green the msys2 CI make

Also it's fixes issues about make check Yonggang Luo (11): Revert "configure: add --ninja option" block: Fixes nfs on msys2/mingw ci: fixes msys2 build by upgrading capstone to 4.0.2 meson: upgrade meson for execute custom ninjatool under msys2 properly ci: Enable msys2 ci in cirrus te

Re: make -i check resut for msys2

On Fri, Sep 4, 2020 at 4:51 PM Kevin Wolf wrote: > Am 04.09.2020 um 08:03 hat Thomas Huth geschrieben: > > On 04/09/2020 00.53, 罗勇刚(Yonggang Luo) wrote: > > > > > > > > > On Thu, Sep 3, 2020 at 10:33 PM Thomas Huth > > > wrote: > > > > > > On 03/09/2020 11.18, 罗勇刚(Yo

Re: [PATCH] stubs: Move qemu_timer_notify_cb() and remove qemu_notify_event() stub

On Wed, Sep 2, 2020 at 6:33 PM Paolo Bonzini wrote: > On 02/09/20 12:24, Thomas Huth wrote: > > When cross-compiling with MinGW, there are sometimes some weird linker > > errors like: > > > > ibqemuutil.a(util_main-loop.c.obj): In function `qemu_notify_event': > > /builds/huth/qemu/build/../util/

Re: [PATCH] configure: the error info not consistence with option.

On Fri, Sep 4, 2020 at 3:54 PM Paolo Bonzini wrote: > On 04/09/20 05:54, 罗勇刚(Yonggang Luo) wrote: > > > > test "$vhost_net_user" = "" && vhost_net_user=$vhost_user > > if test "$vhost_net_user" = "yes" && test "$vhost_user" = "no"; > > then > > - error_exit "--e

Re: [PATCH v2] tests: Trying fixes test-replication.c on msys2.

On Fri, Sep 4, 2020 at 9:07 PM Thomas Huth wrote: > On 04/09/2020 00.06, Yonggang Luo wrote: > > Signed-off-by: Yonggang Luo > > --- > > tests/test-replication.c | 17 + > > 1 file changed, 13 insertions(+), 4 deletions(-) > > > > diff --git a/tests/test-replication.c b/tests/te

Re: [PATCH 3/3] pci: Let pci_dma_write() propagate MemTxResult

Philippe Mathieu-Daudé 于2020年9月5日周六 上午12:26写道： > > pci_dma_rw() returns a MemTxResult type. > Do not discard it, return it to the caller. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Li Qiang > --- > include/hw/pci/pci.h | 16 ++-- > 1 file changed, 14 insertions(+), 2 d

Re: [PATCH 2/3] pci: Let pci_dma_read() propagate MemTxResult

Philippe Mathieu-Daudé 于2020年9月5日周六 上午12:27写道： > > pci_dma_rw() returns a MemTxResult type. > Do not discard it, return it to the caller. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Li Qiang > --- > include/hw/pci/pci.h | 16 ++-- > 1 file changed, 14 insertions(+), 2 d

Re: [PATCH 1/3] pci: Let pci_dma_rw() propagate MemTxResult

Philippe Mathieu-Daudé 于2020年9月5日周六 上午12:26写道： > > dma_memory_rw() returns a MemTxResult type. > Do not discard it, return it to the caller. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/pci/pci.h | 18 -- > 1 file changed, 16 insertions(+), 2 deletions(-) > > diff

Re: [RFC PATCH 00/12] hw: Forbid DMA write accesses to MMIO regions

Philippe Mathieu-Daudé 于2020年9月3日周四 下午7:09写道： > > Hi, > > I'm not suppose to work on this but I couldn't sleep so kept > wondering about this problem the whole night and eventually > woke up to write this quickly, so comments are scarce, sorry. > > The first part is obvious anyway, simply pass Mem

Re: hw/clock: What clock rate for virt machines?

On Fri, 04 Sep 2020 10:52:06 PDT (-0700), alistai...@gmail.com wrote: On Wed, Sep 2, 2020 at 12:48 PM Philippe Mathieu-Daudé wrote: On 9/2/20 8:18 PM, Peter Maydell wrote: > On Wed, 2 Sep 2020 at 18:03, Philippe Mathieu-Daudé wrote: >> >> On 9/2/20 6:49 PM, Peter Maydell wrote: >>> On Wed, 2

Re: [PATCH 2/2] hw/net/e1000e: Remove duplicated write handler for FLSWDATA register

Philippe Mathieu-Daudé 于2020年9月4日周五 下午9:14写道： > > The FLSWDATA register writeop handler is initialized twice: > > 3067 #define e1000e_putreg(x)[x] = e1000e_mac_writereg > 3068 typedef void (*writeops)(E1000ECore *, int, uint32_t); > 3069 static const writeops e1000e_macreg_writeops[] = {

Re: [PATCH 1/2] hw/net/e1000e: Remove overwritten read handler for STATUS register

Philippe Mathieu-Daudé 于2020年9月4日周五 下午9:14写道： > > The STATUS register readop handler is initialized first with > the generic e1000e_mac_readreg() handler: > > 2861 #define e1000e_getreg(x)[x] = e1000e_mac_readreg > 2862 typedef uint32_t (*readops)(E1000ECore *, int); > 2863 static const

Re: [PATCH] net/filter-rewriter: destroy g_hash_table in colo_rewriter_cleanup

Pan Nengyuan 于2020年9月4日周五 下午3:23写道： > > s->connection_track_table forgot to destroy in colo_rewriter_cleanup. Fix it. > > Reported-by: Euler Robot > Signed-off-by: Pan Nengyuan Reviewed-by: Li Qiang > --- > net/filter-rewriter.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/net/

QEMU | Pipeline #186015836 has failed for master | 1133ce5e

Your pipeline has failed. Project: QEMU ( https://gitlab.com/qemu-project/qemu ) Branch: master ( https://gitlab.com/qemu-project/qemu/-/commits/master ) Commit: 1133ce5e ( https://gitlab.com/qemu-project/qemu/-/commit/1133ce5ec9674d594a84fad2696adc30d292a234 ) Commit Message: Merge remote-tr

Re: [PATCH v5 1/4] Add the NVMM vcpu API

Ping? On 11.08.2020 15:01, Kamil Rytarowski wrote: > From: Maxime Villard > > Adds support for the NetBSD Virtual Machine Monitor (NVMM) stubs and > introduces the nvmm.h sysemu API for managing the vcpu scheduling and > management. > > Signed-off-by: Maxime Villard > Signed-off-by: Kamil Ryta

[REPORT] Nightly Performance Tests - Friday, September 4, 2020

Host CPU : Intel(R) Core(TM) i7-8750H CPU @ 2.20GHz Host Memory : 15.49 GB Start Time (UTC) : 2020-09-04 22:30:01 End Time (UTC) : 2020-09-04 23:02:43 Execution Time : 0:32:41.137532 Status : SUCCESS Note: Changes denoted by '-' are less than 0.01%. -

Re: [PATCH v8 02/14] hw/misc: Add NPCM7xx Clock Controller device model

On Fri, Sep 4, 2020 at 3:02 PM Havard Skinnemoen wrote: > > On Fri, Sep 4, 2020 at 2:32 AM Philippe Mathieu-Daudé wrote: > > > > On 8/25/20 2:16 AM, Havard Skinnemoen via wrote: > > > Enough functionality to boot the Linux kernel has been implemented. This > > > includes: > > > > > > - Correct

Re: [PULL 0/9] Linux user for 5.2 patches

On Thu, 3 Sep 2020 at 00:28, Laurent Vivier wrote: > > The following changes since commit 887adde81d1f1f3897f1688d37ec6851b4fdad86: > > Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' int= > o staging (2020-09-01 22:50:23 +0100) > > are available in the Git repository at:

Re: [PATCH v8 02/14] hw/misc: Add NPCM7xx Clock Controller device model

On Fri, Sep 4, 2020 at 2:32 AM Philippe Mathieu-Daudé wrote: > > On 8/25/20 2:16 AM, Havard Skinnemoen via wrote: > > Enough functionality to boot the Linux kernel has been implemented. This > > includes: > > > > - Correct power-on reset values so the various clock rates can be > > accuratel

Re: [PATCH v3 14/15] tests: bump avocado version

On Wed, Sep 02, 2020 at 11:17:08AM +0300, Pavel Dovgalyuk wrote: > From: Pavel Dovgalyuk > > Reverse debugging test uses gdb remote client of avocado framework. > This client was fixed since the currently used version 76. > Therefore this patch bumps the version to 81 and fixes command > line ver

Re: [PATCH 08/17] hw/block/nvme: refactor aio submission

On Sep 4 14:15, Keith Busch wrote: > On Fri, Sep 04, 2020 at 10:38:39PM +0200, Klaus Jensen wrote: > > On Sep 4 12:47, Keith Busch wrote: > > > On Fri, Sep 04, 2020 at 04:19:47PM +0200, Klaus Jensen wrote: > > > > diff --git a/hw/block/nvme.c b/hw/block/nvme.c > > > > index bfac3385cb64..3e32f39c

Re: [PATCH 08/17] hw/block/nvme: refactor aio submission

On Fri, Sep 04, 2020 at 10:38:39PM +0200, Klaus Jensen wrote: > On Sep 4 12:47, Keith Busch wrote: > > On Fri, Sep 04, 2020 at 04:19:47PM +0200, Klaus Jensen wrote: > > > diff --git a/hw/block/nvme.c b/hw/block/nvme.c > > > index bfac3385cb64..3e32f39c7c1d 100644 > > > --- a/hw/block/nvme.c > > >

Re: [PATCH v3 00/16] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support

On Mon, Aug 31, 2020 at 6:40 PM Bin Meng wrote: > > From: Bin Meng > > This adds support for Microchip PolarFire SoC Icicle Kit board. > The Icicle Kit board integrates a PolarFire SoC, with one SiFive's > E51 plus four U54 cores and many on-chip peripherals and an FPGA. > > For more details abou

Re: [PATCH 08/17] hw/block/nvme: refactor aio submission

On Sep 4 12:47, Keith Busch wrote: > On Fri, Sep 04, 2020 at 04:19:47PM +0200, Klaus Jensen wrote: > > diff --git a/hw/block/nvme.c b/hw/block/nvme.c > > index bfac3385cb64..3e32f39c7c1d 100644 > > --- a/hw/block/nvme.c > > +++ b/hw/block/nvme.c > > @@ -110,6 +110,7 @@ static const uint32_t nvme_f

Re: [PATCH v3 09/16] hw/dma: Add SiFive platform DMA controller emulation

On Mon, Aug 31, 2020 at 6:48 PM Bin Meng wrote: > > From: Bin Meng > > Microchip PolarFire SoC integrates a DMA engine that supports: > * Independent concurrent DMA transfers using 4 DMA channels > * Generation of interrupts on various conditions during execution > which is actually an IP reused

Re: [PATCH v2 0/7] CTU CAN FD core support - patchew problem

On 04/09/20 19:31, Pavel Pisa wrote: > Hello everybody, > > On Thursday 03 of September 2020 23:37:17 p...@cmp.felk.cvut.cz wrote: >> From: Pavel Pisa >> >> CTU CAN FD is an open source soft core written in VHDL. >> It originated in 2015 as Ondrej Ille's project at the >> Department of Measuremen

Re: [PATCH v3 16/16] hw/riscv: sifive_u: Connect a DMA controller

On Mon, Aug 31, 2020 at 6:46 PM Bin Meng wrote: > > From: Bin Meng > > SiFive FU540 SoC integrates a platform DMA controller with 4 DMA > channels. This connects the exsiting SiFive PDMA model to the SoC, > and adds its device tree data as well. > > Signed-off-by: Bin Meng Reviewed-by: Alistair

Re: [PATCH 08/17] hw/block/nvme: refactor aio submission

On Fri, Sep 04, 2020 at 04:19:47PM +0200, Klaus Jensen wrote: > diff --git a/hw/block/nvme.c b/hw/block/nvme.c > index bfac3385cb64..3e32f39c7c1d 100644 > --- a/hw/block/nvme.c > +++ b/hw/block/nvme.c > @@ -110,6 +110,7 @@ static const uint32_t nvme_feature_cap[NVME_FID_MAX] = { > }; > > static

Re: [PATCH v3 11/16] hw/net: cadence_gem: Add a new 'phy-addr' property

On Mon, Aug 31, 2020 at 6:42 PM Bin Meng wrote: > > From: Bin Meng > > At present the PHY address of the PHY connected to GEM is hard-coded > to either 23 (BOARD_PHY_ADDRESS) or 0. This might not be the case for > all boards. Add a new 'phy-addr' property so that board can specify > the PHY addre

Re: [PATCH v3 10/16] hw/riscv: microchip_pfsoc: Connect a DMA controller

On Mon, Aug 31, 2020 at 6:49 PM Bin Meng wrote: > > From: Bin Meng > > On the Icicle Kit board, the HSS firmware utilizes the on-chip DMA > controller to move the 2nd stage bootloader in the system memory. > Let's connect a DMA controller to Microchip PolarFire SoC. > > Signed-off-by: Bin Meng

Re: [PATCH v3 07/16] hw/sd: Add Cadence SDHCI emulation

On Mon, Aug 31, 2020 at 6:45 PM Bin Meng wrote: > > From: Bin Meng > > Cadence SD/SDIO/eMMC Host Controller (SD4HC) is an SDHCI compatible > controller. The SDHCI compatible registers start from offset 0x200, > which are called Slot Register Set (SRS) in its datasheet. > > This creates a Cadence

Re: [PATCH v3 08/16] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card

On Mon, Aug 31, 2020 at 6:47 PM Bin Meng wrote: > > From: Bin Meng > > Microchip PolarFire SoC integrates one Cadence SDHCI controller. > On the Icicle Kit board, one eMMC chip and an external SD card > connect to this controller depending on different configuration. > > As QEMU does not support

[PATCH v3 16/19] target/microblaze: Move mmu parameters to MicroBlazeCPUConfig

The final 4 fields in MicroBlazeMMU are configuration constants. Move them into MicroBlazeCPUConfig where they belong. Remove the leading "c_" from the member names, as that presumably implied "config", and that should not be explicit in the location. Signed-off-by: Richard Henderson --- target

[PATCH v3 19/19] configure: Do not set TARGET_ABI32 for microblaze

In 19f27b6c2493 TARGET_ABI_LONG was reduced to 32 bits for CONFIG_USER_ONLY. There is no need to set this by hand; it will now be set automatically by include/exec/user/abitypes.h. Reported-by: Peter Maydell Signed-off-by: Richard Henderson --- configure | 1 - 1 file changed, 1 deletion(-) d

[PATCH v3 17/19] target/microblaze: Fill in VMStateDescription for cpu

Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 4 ++ target/microblaze/cpu.c | 8 +-- target/microblaze/machine.c | 106 ++ target/microblaze/meson.build | 5 +- 4 files changed, 115 insertions(+), 8 deletions(-) create mode 100

[PATCH v3 12/19] target/microblaze: Split out MicroBlazeCPUConfig

This struct was previously unnamed, and defined in MicroBlazeCPU. Pull it out to its own typedef so that we can reuse it. Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 55 ++--- 1 file changed, 29 insertions(+), 26 deletions(-) diff --git a/t

[PATCH v3 13/19] target/microblaze: Reorg MicroBlazeCPUConfig to minimize holes

Sort the elements by type and size, removing a number of holes and reducing the size of the entire struct. Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 15 ++- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/target/microblaze/cpu.h b/target/microblaze

[PATCH v3 11/19] target/microblaze: Diagnose invalid insns in delay slots

These cases result in undefined and undocumented behaviour but the behaviour is deterministic, i.e cores will not lock-up or expose security issues. However, RTL will not raise exceptions either. Therefore, log a GUEST_ERROR and treat these cases as nops, to avoid corner cases which could put qem

[PATCH v3 18/19] target/microblaze: Put MicroBlazeCPUConfig into DisasContext

The bulk of the translator should not have access to the complete cpu state, to avoid the temptation to examine bits that are in run time, but not translation time context. We do need access to the constant cpu configuration, and that is sufficient, so put that into DisasContext. Signed-off-by: R

[PATCH v3 14/19] target/microblaze: Move pvr regs to MicroBlazeCPUConfig

These values are constant, and are derived from the other configuration knobs. Move them into MicroBlazeCPUConfig to emphasize that they are not variable. Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 5 +- hw/microblaze/petalogix_ml605_mmu.c | 6 +- target/microb

[PATCH v3 08/19] target/microblaze: Handle DISAS_EXIT_NEXT in delay slot

It is legal to put an mts instruction into a delay slot. We should continue to return to the main loop in that case so that we recognize any pending interrupts. Reviewed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 34 +

[PATCH v3 15/19] target/microblaze: Treat pvr_regs as constant

Do not allow gdb to set the values, and don't bother dumping unchanging values with -d cpu. Signed-off-by: Richard Henderson --- target/microblaze/gdbstub.c | 4 target/microblaze/translate.c | 5 - 2 files changed, 9 deletions(-) diff --git a/target/microblaze/gdbstub.c b/target/mic

[PATCH v3 09/19] target/microblaze: Force rtid, rted, rtbd to exit

These return-from-exception type instructions have modified MSR to re-enable various forms of interrupt. Force a return to the main loop. Consolidate the cleanup of tb_flags into mb_tr_translate_insn. Reviewed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias Signed-off-by: Richard Henderson

[PATCH v3 06/19] target/microblaze: Introduce DISAS_EXIT_NEXT, DISAS_EXIT_JUMP

Like DISAS_EXIT, except we need to update cpu_pc, either to pc_next or to btarget respectively. Reviewed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 29 + 1 file changed, 21 insertions(+), 8

[PATCH v3 04/19] target/microblaze: Rename mmu structs

Introduce typedefs and follow CODING_STYLE for naming. Rename struct microblaze_mmu to MicroBlazeMMU. Rename struct microblaze_mmu_lookup to MicroBlazeMMULookup. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/cpu.h|

[PATCH v3 07/19] target/microblaze: Replace cpustate_changed with DISAS_EXIT_NEXT

Rather than look for the combination of DISAS_NEXT with a separate variable, go ahead and set is_jmp to the desired state. Reviewed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 34 ++ 1 f

[PATCH v3 05/19] target/microblaze: Rename DISAS_UPDATE to DISAS_EXIT

The name "update" suggests that something needs updating, but this is not the case. Use "exit" to emphasize that nothing needs doing except to exit. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/mic

[PATCH v3 10/19] target/microblaze: Use tcg_gen_lookup_and_goto_ptr

Normal indirect jumps, or page-crossing direct jumps, can use tcg_gen_lookup_and_goto_ptr to avoid returning to the main loop simply to find an existing TB for the next pc. Reviewed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/transl

[PATCH v3 00/19] target/microblaze improvements

Version 3: * Splits out MicroBlazeCPUConfig, and moves some values out of CPUMBState (env) that are constant configuration parameters, or derived from configuration parameters. * Do not save configuration parameters with vmstate. * Pass around MicroBlazeCPUConfig in the translator. * Do

[PATCH v3 02/19] target/microblaze: Renumber D_FLAG

ESS[DS] is bit 19 in the manual, but the manual uses big-endian bit numbering. This corresponds to bit 12 in little-endian numbering. Let the comment about matching the ESR be true by renumbering it. Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 2 +- 1 file changed, 1 insertio

[PATCH v3 03/19] target/microblaze: Cleanup mb_cpu_do_interrupt

Reindent; remove dead/commented code. Use D_FLAG to set ESS[DS]. Sink MSR adjustment for kernel entry, iflags and res_addr clear. Improve CPU_LOG_INT formatting; report pc and msr before and after. Signed-off-by: Richard Henderson --- target/microblaze/helper.c | 209

[PATCH v3 01/19] target/microblaze: Collected fixes for env->iflags

There are several problems here that can result in soft lockup, depending on exactly where an interrupt or exception is delivered: Include BIMM_FLAG in IFLAGS_TB_MASK, since it needs to follow D_FLAG. Ensure that iflags is 0 when entering an interrupt/exception handler. Add mb_cpu_synchronize_from

Re: [PATCH 4/5] intel_iommu: Skip page walking on device iotlb invalidations

On Thu, Sep 03, 2020 at 06:14:45PM +0200, Eugenio Pérez wrote: > Although they didn't reach the notifier because of the filtering in > memory_region_notify_iommu_one, the vt-d was still splitting huge > memory invalidations in chunks. Skipping it. > > This improves performance in case of netperf w

[Bug 1838390] Re: vmx_write_mem: mmu_gva_to_gpa failed when using hvf

I think I was able to fix this crash by specifying the exact host model for the cpu argument. 1. Determine the CPU type of the host machine. $ sysctl -a | grep machdep.cpu.brand_string machdep.cpu.brand_string: Intel(R) Core(TM) i5-4690 CPU @ 3.50GHz 2. Find the matching CPU model supported by Q

Re: [PATCH 0/6] qom: Use typedefs instead of struct names on instance_size/class_size

On Mon, Aug 24, 2020 at 05:59:30PM -0400, Eduardo Habkost wrote: > This changes existing QOM boilerplate to use existing typedef > names when setting instance_size and class_size on TypeInfo > variables. This makes the code more consistent and will make > future conversion to QOM type declaration

Re: [PATCH 49/63] stm32f205: Rename STM32F2XXTIMER to STM32F2XX_TIMER

On Wed, Sep 2, 2020 at 4:04 PM Eduardo Habkost wrote: > > Make the type checking macro name consistent with the TYPE_* > constant. > > Signed-off-by: Eduardo Habkost Reviewed-by: Alistair Francis Alistair > --- > Cc: Alistair Francis > Cc: Peter Maydell > Cc: qemu-...@nongnu.org > Cc: qemu-

Re: hw/clock: What clock rate for virt machines?

On Wed, Sep 2, 2020 at 12:48 PM Philippe Mathieu-Daudé wrote: > > On 9/2/20 8:18 PM, Peter Maydell wrote: > > On Wed, 2 Sep 2020 at 18:03, Philippe Mathieu-Daudé wrote: > >> > >> On 9/2/20 6:49 PM, Peter Maydell wrote: > >>> On Wed, 2 Sep 2020 at 17:35, Philippe Mathieu-Daudé > >>> wrote: > >>>

Re: [PATCH v3 05/16] hw/char: Add Microchip PolarFire SoC MMUART emulation

On Mon, Aug 31, 2020 at 6:44 PM Bin Meng wrote: > > From: Bin Meng > > Microchip PolarFire SoC MMUART is ns16550 compatible, with some > additional registers. Create a simple MMUART model built on top > of the existing ns16550 model. > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis A

Re: [PATCH 12/12] hw/riscv: Sort the Kconfig options in alphabetical order

On Thu, Sep 3, 2020 at 3:43 AM Bin Meng wrote: > > From: Bin Meng > > At present the Kconfig file is in disorder. Let's sort the options. > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Alistair > > --- > > hw/riscv/Kconfig | 58 > -

Re: [PATCH 11/12] hw/riscv: Drop CONFIG_SIFIVE

On Thu, Sep 3, 2020 at 3:49 AM Bin Meng wrote: > > From: Bin Meng > > The name SIFIVE is too vague to convey the required component of > MSI_NONBROKEN. Let's drop the option, and select MSI_NONBROKEN in > each machine instead. > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Alistair

Re: [PATCH 10/12] hw/riscv: Always build riscv_hart.c

On Thu, Sep 3, 2020 at 3:42 AM Bin Meng wrote: > > From: Bin Meng > > Every RISC-V machine needs riscv_hart hence there is no need to > have a dedicated Kconfig option for it. Drop the Kconfig option > and always build riscv_hart.c. > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Al

Re: [PATCH 09/12] hw/riscv: Move sifive_test model to hw/misc

On Thu, Sep 3, 2020 at 3:46 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move sifive_test model to hw/misc directory. > > Signed-off-by: Bin Meng Review

[PATCH] qom: Remove ParentClassType argument from OBJECT_DECLARE_SIMPLE_TYPE

The requirement to specify the parent class type makes the macro harder to use and easy to misuse (by indicating the wrong parent class type). Simplify the macro by just not declaring any class struct, allowing us to remove the class_size field from the TypeInfo variables for those types. Signed-

Re: [PATCH 08/12] hw/riscv: Move sifive_uart model to hw/char

On Thu, Sep 3, 2020 at 3:48 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move sifive_uart model to hw/char directory. > > Signed-off-by: Bin Meng Review

Re: [PATCH 07/12] hw/riscv: Move riscv_htif model to hw/char

On Thu, Sep 3, 2020 at 3:48 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move riscv_htif model to hw/char directory. > > Signed-off-by: Bin Meng Reviewe

Re: [PATCH 06/12] hw/riscv: Move sifive_plic model to hw/intc

On Thu, Sep 3, 2020 at 3:44 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move sifive_plic model to hw/intc directory. > > Signed-off-by: Bin Meng Review

Re: [PATCH 05/12] hw/riscv: Move sifive_clint model to hw/intc

On Thu, Sep 3, 2020 at 3:45 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move sifive_clint model to hw/intc directory. > > Signed-off-by: Bin Meng Revie

Re: [PATCH 04/12] hw/riscv: Move sifive_gpio model to hw/gpio

On Thu, Sep 3, 2020 at 3:43 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move sifive_gpio model to hw/gpio directory. > > Note this also removes the trace

Re: [PATCH 03/12] hw/riscv: Move sifive_u_otp model to hw/misc

On Thu, Sep 3, 2020 at 3:44 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move sifive_u_otp model to hw/misc directory. > > Signed-off-by: Bin Meng Revie

Re: [PATCH 02/12] hw/riscv: Move sifive_u_prci model to hw/misc

On Thu, Sep 3, 2020 at 3:41 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move sifive_u_prci model to hw/misc directory. > > Signed-off-by: Bin Meng Revi

Re: [PATCH 01/12] hw/riscv: Move sifive_e_prci model to hw/misc

On Thu, Sep 3, 2020 at 3:42 AM Bin Meng wrote: > > From: Bin Meng > > This is an effort to clean up the hw/riscv directory. Ideally it > should only contain the RISC-V SoC / machine codes plus generic > codes. Let's move sifive_e_prci model to hw/misc directory. > > Signed-off-by: Bin Meng Revi

Re: [PATCH v2 0/7] CTU CAN FD core support - patchew problem

Hello everybody, On Thursday 03 of September 2020 23:37:17 p...@cmp.felk.cvut.cz wrote: > From: Pavel Pisa > > CTU CAN FD is an open source soft core written in VHDL. > It originated in 2015 as Ondrej Ille's project at the > Department of Measurement of FEE at CTU. It seems that there has been p

Re: [PATCH v7 00/16] QEMU cpus.c refactoring part2

Il ven 4 set 2020, 18:08 Claudio Fontana ha scritto: > btw not sure whose queues should these go through? > I can take this; the dust from the meson merge should settle soon. Paolo > Thanks, > > Claudio > > On 9/3/20 12:55 PM, Claudio Fontana wrote: > > Motivation and higher level steps: > >

[PATCH v6 3/3] spapr_numa: use spapr_numa_get_vcpu_assoc() in home_node hcall

The current implementation of h_home_node_associativity hard codes the values of associativity domains of the vcpus. Let's make it consider the values already initialized in spapr->numa_assoc_array, via the spapr_numa_get_vcpu_assoc() helper. We want to set it and forget it, and for that we also n

[PATCH v6 1/3] spapr: move h_home_node_associativity to spapr_numa.c

The implementation of this hypercall will be modified to use spapr->numa_assoc_arrays input. Moving it to spapr_numa.c makes make more sense. Reviewed-by: Greg Kurz Signed-off-by: Daniel Henrique Barboza --- hw/ppc/spapr_hcall.c | 40 --- hw/ppc/spapr_numa.c

[PATCH v6 2/3] spapr_numa: create a vcpu associativity helper

The work to be done in h_home_node_associativity() intersects with what is already done in spapr_numa_fixup_cpu_dt(). This patch creates a new helper, spapr_numa_get_vcpu_assoc(), to be used for both spapr_numa_fixup_cpu_dt() and h_home_node_associativity(). While we're at it, use memcpy() instead

[PATCH v6 0/3] pseries NUMA distance rework

changes from v5, all suggested by Greg: - patch 2: * changed g_malloc() to g_new() * removed the unneeded g_assert() - all patches: added Greg's R-b v5 link: https://lists.gnu.org/archive/html/qemu-devel/2020-09/msg01978.html Daniel Henrique Barboza (3): spapr: move h_home_node_associat

Re: [RFC PATCH] docs/system/deprecated: mark ppc64abi32-linux-user for deprecation

On Fri, 4 Sep 2020 at 17:52, Alex Bennée wrote: > > It's buggy and we are not sure anyone uses it. > +``ppc64abi32`` CPUs (since 5.2.0) > +' > + > +The ``ppc64abi32`` architecture has a number of issues which regularly > +trip up our CI testing and is suspected to

Re: [PATCH 00/17] hw/block/nvme: multiple namespaces support

On Sep 4 18:12, Philippe Mathieu-Daudé wrote: > Hi Klaus, > > On 9/4/20 4:19 PM, Klaus Jensen wrote: > > From: Klaus Jensen > > > > This is the next round of my patches for the nvme device. > > > > This includes a bit of cleanup and three new features: > > > > * refactored aio submission >

Re: [RFC PATCH] docs/system/deprecated: mark ppc64abi32-linux-user for deprecation

Alex Bennée writes: > It's buggy and we are not sure anyone uses it. > > Cc: David Gibson > Cc: Richard Henderson > Signed-off-by: Alex Bennée A more aggressive follow-up patch which would also solve the CI failures across the board: --8<---cut here---start-

Re: [PATCH 1/7] scripts/ci/gitlab-pipeline-status: make branch name configurable

On 9/4/20 6:42 PM, Cleber Rosa wrote: > With the utility function `get_local_staging_branch_commit()`, the > name of the branch is hard coded (including in the function name). > > For extensibility reasons, let's make that configurable. > > Signed-off-by: Cleber Rosa Reviewed-by: Philippe Mathi

Re: [PATCH 3/7] scripts/ci/gitlab-pipeline-status: give early feedback on running pipelines

On 9/4/20 6:42 PM, Cleber Rosa wrote: > When waiting for a pipeline to run and finish, it's better to give > early feedback, and then sleep and wait, than the other wait around. > > Specially for the first iteration, it's frustrating to see nothing > while the script is sleeping. > > Signed-off-b

Re: [PATCH-for-4.2] hw/mips: Deprecate the r4k machine

Hi, On 12/17/19 7:43 PM, Aleksandar Markovic wrote: > From: Thomas Huth > Sent: Tuesday, December 17, 2019 7:10 PM > To: Philippe Mathieu-Daudé; qemu-devel@nongnu.org > Cc: libvir-l...@redhat.com; Hervé Poussineau; Aleksandar Markovic; Aleksandar > Rikalo; Aurelien Jarno > Subject: [EXTERNAL]Re:

Re: [PATCH 2/7] scripts/ci/gitlab-pipeline-status: improve message regarding timeout

On 9/4/20 6:42 PM, Cleber Rosa wrote: > The script has its own timeout, which is about how long the script > will wait (when called with --wait) for the pipeline to complete, and > not necessarily for the pipeline to complete. > > Hopefully this will new wording will be clearer. too many wills?

[RFC PATCH] docs/system/deprecated: mark ppc64abi32-linux-user for deprecation

It's buggy and we are not sure anyone uses it. Cc: David Gibson Cc: Richard Henderson Signed-off-by: Alex Bennée --- docs/system/deprecated.rst | 9 + 1 file changed, 9 insertions(+) diff --git a/docs/system/deprecated.rst b/docs/system/deprecated.rst index 851dbdeb8ab..11c763383d9 10

[PATCH 5/7] scripts/ci/gitlab-pipeline-status: handle keyboard interrupts

So that exits based on user requests are handled more gracefully. Signed-off-by: Cleber Rosa --- scripts/ci/gitlab-pipeline-status | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/scripts/ci/gitlab-pipeline-status b/scripts/ci/gitlab-pipeline-status index 8355b6a427..ce

[PATCH 7/7] scripts/ci/gitlab-pipeline-status: wait for pipeline creation

When called in wait mode, this script will also wait for the pipeline to be get to a "running" state. Because many more status may be seen until a pipeline gets to "running", and those need to be handle too. Reference: https://docs.gitlab.com/ee/api/pipelines.html#list-project-pipelines Signed-of

[PATCH 6/7] scripts/ci/gitlab-pipeline-status: use more descriptive exceptions

For two very different error conditions. Signed-off-by: Cleber Rosa --- scripts/ci/gitlab-pipeline-status | 12 ++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/scripts/ci/gitlab-pipeline-status b/scripts/ci/gitlab-pipeline-status index ced488f27c..628150ce0b 100755 -

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