> Let's query the maximum number of DMA mappings by querying the available
> mappings when creating the container.
>
> In addition, count the number of DMA mappings and warn when we would
> exceed it. This is a preparation for RamDiscardMgr which might
> create quite some DMA mappings over time,
I have just noticed that the error does not appear when mounting the
VFat drive in the installed instance of Arch Linux. The reported error
messages occurred when using the "LiveUSB".
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Ping.
It seems no one handle this patch.
> -Original Message-
> From: Pankaj Gupta [mailto:pankaj.gupta.li...@gmail.com]
> Sent: Wednesday, December 09, 2020 10:21 PM
> To: tuguoyi (Cloud)
> Cc: Juan Quintela ; Dr. David Alan Gilbert
> ; vsement...@virtuozzo.com;
>
On 2020/12/17 下午1:41, Bin Meng wrote:
Hi Jason,
On Fri, Dec 11, 2020 at 5:35 PM Bin Meng wrote:
From: Markus Carlstedt
To calculate the TCP/UDP checksum we need the whole datagram. Unless
the hardware has some logic to collect all fragments before sending
the whole datagram first, it can
John Snow writes:
> On 12/16/20 3:26 AM, Markus Armbruster wrote:
>> John Snow writes:
>>
>>> We already assert this in end_if, but that's opaque to mypy. Do it in
>>> _wrap_ifcond instead. Same effect at runtime, but mypy can now infer
>>> the type in _wrap_ifcond's body.
>>>
>>>
Fix typos, and make the example work out of the box.
Signed-off-by: Markus Armbruster
---
docs/devel/migration.rst | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/docs/devel/migration.rst b/docs/devel/migration.rst
index 49112bb27a..ad381b89b2 100644
---
"Dr. David Alan Gilbert" writes:
> * Markus Armbruster (arm...@redhat.com) wrote:
>> Commit 8118f0950f "migration: Append JSON description of migration
>> stream" needs a JSON writer. The existing qobject_to_json() wasn't a
>> good fit, because it requires building a QObject to convert.
John Snow writes:
> On 12/16/20 2:51 AM, Markus Armbruster wrote:
>> Is it too late to delay the introduction of type hints until after
>> the
>> data structure cleanups?
>> If yes, I have to spend more time replying below.
>>
>
> No, I re-ordered the series again to delay typing until the end,
Eduardo Habkost writes:
> On Wed, Dec 16, 2020 at 08:51:10AM +0100, Markus Armbruster wrote:
> [...]
>> You guys clearly struggled with the tree data structure. Documentation
>> would have helped[*]. Since you're going to replace it (PATCH 09),
>> adding it now makes little sense.
>>
>> *My*
On Thu, Dec 17, 2020 at 2:22 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Bin Meng
> Reviewed-by: Richard Henderson
> Reviewed-by: Palmer Dabbelt
> Acked-by: Palmer Dabbelt
> ---
> target/riscv/cpu.c | 19 ++-
> 1 file changed, 10
On Thu, Dec 17, 2020 at 2:23 AM Alistair Francis
wrote:
>
> Instead of using string compares to determine if a RISC-V machine is
> using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids
> us having to maintain a list of CPU names to compare against.
>
> This commit also fixes the
On Thu, Dec 17, 2020 at 2:23 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Bin Meng
> Reviewed-by: Palmer Dabbelt
> Acked-by: Palmer Dabbelt
> ---
> target/riscv/cpu_bits.h | 4 +-
> target/riscv/csr.c | 176 +---
> 2
On Thu, Dec 17, 2020 at 2:23 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Richard Henderson
> Reviewed-by: Palmer Dabbelt
> Acked-by: Palmer Dabbelt
> ---
> target/riscv/cpu_helper.c | 12 +++-
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
On Thu, Dec 17, 2020 at 2:22 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Palmer Dabbelt
> Acked-by: Palmer Dabbelt
> ---
> hw/riscv/sifive_u.c | 55 -
> 1 file changed, 30 insertions(+), 25 deletions(-)
>
Tested
Public bug reported:
I've noticed that after upgrading from Ubuntu 18.04 to 20.04 that nested
virtualization isn't working anymore.
I have a simple repro where I create a Windows 10 2004 guest and enable
Hyper-V in it. This worked fine in 18.04 and specifically qemu <4.2 (I
specifically tested
On Tue, Dec 08, 2020 at 01:43:08PM +0100, Cornelia Huck wrote:
> On Tue, 8 Dec 2020 13:57:28 +1100
> David Gibson wrote:
>
> > On Fri, Dec 04, 2020 at 02:12:29PM +0100, Cornelia Huck wrote:
> > > On Fri, 4 Dec 2020 13:07:27 +
> > > "Dr. David Alan Gilbert" wrote:
> > >
> > > > * Cornelia
On 17/12/2020 00.01, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20201216172949.57380-1-th...@redhat.com/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Type: series
> Message-id:
On Mon, Dec 14, 2020 at 06:22:40PM +0100, Cornelia Huck wrote:
> On Fri, 4 Dec 2020 16:44:13 +1100
> David Gibson wrote:
>
> > We haven't yet implemented the fairly involved handshaking that will be
> > needed to migrate PEF protected guests. For now, just use a migration
> > blocker so we get
On Tue, Dec 15, 2020 at 12:45:26PM +0100, Cornelia Huck wrote:
> On Fri, 4 Dec 2020 16:44:15 +1100
> David Gibson wrote:
>
> > At least some s390 cpu models support "Protected Virtualization" (PV),
> > a mechanism to protect guests from eavesdropping by a compromised
> > hypervisor.
> >
> >
On Mon, Dec 14, 2020 at 06:00:36PM +0100, Cornelia Huck wrote:
> On Fri, 4 Dec 2020 16:44:10 +1100
> David Gibson wrote:
>
> > The platform specific details of mechanisms for implementing securable
> > guest memory may require setup at various points during initialization.
> > Thus, it's not
On Tue, Dec 08, 2020 at 01:50:05PM +0100, Cornelia Huck wrote:
> On Tue, 8 Dec 2020 11:28:29 +0100
> Halil Pasic wrote:
>
> > On Tue, 8 Dec 2020 12:54:03 +1100
> > David Gibson wrote:
> >
> > > > > >>> + * Virtio devices can't count on directly accessing guest
> > > > > >>> + *
Hi Jason,
On Fri, Dec 11, 2020 at 5:35 PM Bin Meng wrote:
>
> From: Markus Carlstedt
>
> To calculate the TCP/UDP checksum we need the whole datagram. Unless
> the hardware has some logic to collect all fragments before sending
> the whole datagram first, it can only be done by the network
From: Bin Meng
For the ECSPIx_CONREG register BURST_LENGTH field, the manual says:
0x020 A SPI burst contains the 1 LSB in first word and all 32 bits in second
word.
0x021 A SPI burst contains the 2 LSB in first word and all 32 bits in second
word.
Current logic uses either s->burst_length
From: Bin Meng
The endianness of data exchange between tx and rx fifo is incorrect.
Earlier bytes are supposed to show up on MSB and later bytes on LSB,
ie: in big endian. The manual does not explicitly say this, but the
U-Boot and Linux driver codes have a swap on the data transferred
to tx
My team is working on sysemu support for Hexagon. We've made some good
progress so far and we'll work on upstreaming after Taylor’s hexagon linux-user
patch series lands.
The only use case we have focused on with sysemu is booting/running elf
programs. Both "-device loader,file=..." or
kindly ping
>v1 -> v2:
>Changed the "From:" and "Signed-off-by:" lines from "zhouyang (T)"
>to my real name "zhouyang".
>
>I found some style problems while check the code using checkpatch.pl
>and fixed them, please review.
>
>zhouyang (5):
> contrib: Don't use '#' flag of printf format
>
在 2020/12/17 上午2:17, Philippe Mathieu-Daudé 写道:
Test the PMON firmware. As the firmware is not redistributable,
it has to be downloaded manually first. Then it can be used by
providing its path via the PMON_PATH environment variable:
We have a PMON port for loongson3-virt machine[1] and
QAPIGenC and QAPIGenH in particular depend on fname being defined, but
we have a usage of QAPIGenCCode that isn't intended to be associated
with a particular file.
No problem, move the write method down to the class that actually needs
it, and keep QAPIGenCCode more abstract.
Signed-off-by: John
We use None to represent an object that has no source information
because it's a builtin. This complicates interface typing, since many
interfaces expect that there is an info object available to print errors
with.
Introduce a special QAPISourceInfo that represents these built-ins so
that if an
A forthcoming patch is going to allow the empty string as a name for the
builtin module, and quotes will help us see that in test output. Without
this, git will be upset about trailing empty spaces in test output, so
the quotes are necessary.
Signed-off-by: John Snow
---
Instead of using None as the built-in module filename, use an empty
string instead. This allows us to clarify the type of various interfaces
dealing with module names as always taking a string, which saves us from
having to use Optional[str] everywhere.
Signed-off-by: John Snow
---
Many places assume they can access these fields without checking them
first to ensure they are defined. Eliminating the _genc and _genh fields
and replacing them with functional properties that check for correct
state can ease the typing overhead by eliminating the Optional[T] return
type.
Use this in preference to 'None', which helps remove some edge cases in
the typing.
Signed-off-by: John Snow
---
scripts/qapi/gen.py | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/scripts/qapi/gen.py b/scripts/qapi/gen.py
index
Signed-off-by: John Snow
---
The event_enum_members change might become irrelevant after a
forthcoming (?) patch by Markus, but didn't have it in-hand at time of
publishing.
Signed-off-by: John Snow
---
scripts/qapi/events.py | 2 +-
scripts/qapi/schema.py | 25 ++---
We already assert this in end_if, but that's opaque to mypy. Do it in
_wrap_ifcond instead. Same effect at runtime, but mypy can now infer
the type in _wrap_ifcond's body.
Signed-off-by: John Snow
---
scripts/qapi/gen.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi, this patchset enables strict optional checking in mypy for
everything we have typed so far.
In general, this patchset seeks to eliminate Optional[T] in favor of T
wherever possible. Optional types used for object properties,
function/method parameters and return values where we expect, in
Mypy cannot understand that this match can never be None, so help it
along.
Signed-off-by: John Snow
---
scripts/qapi/main.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/scripts/qapi/main.py b/scripts/qapi/main.py
index 42517210b80..703e7ed1ed5 100644
--- a/scripts/qapi/main.py
+++
Actually, the arg_type can indeed be Optional.
Signed-off-by: John Snow
---
scripts/qapi/events.py | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/scripts/qapi/events.py b/scripts/qapi/events.py
index 599f3d1f564..9851653b9d1 100644
--- a/scripts/qapi/events.py
when boxed is true, expr.py asserts that we must have
arguments. Ultimately, this should mean that if boxed is True, that
arg_type should be defined. Mypy cannot infer this, and does not support
'stateful' type inference, e.g.:
```
if x:
assert y is not None
...
if x:
y.etc()
```
does
Subjective, but I find getting rid of the comprehensions helps. Also,
divide the sections into scalar and non-scalar sections, and remove
old-style string formatting.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 33 ++---
1 file changed, 18
Signed-off-by: John Snow
Reviewed-by: Cleber Rosa
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/scripts/qapi/introspect.py b/scripts/qapi/introspect.py
index 428397a6954..8d5b8513fc8 100644
---
The types will be used in forthcoming patches to add typing. These types
describe the layout and structure of the objects passed to
_tree_to_qlit, but lack the power to describe annotations until the next
commit.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 30
Presently, we use a tuple to attach a dict containing annotations
(comments and compile-time conditionals) to a tree node. This is
undesirable because dicts are difficult to strongly type; promoting it
to a real class allows us to name the values and types of the
annotations we are expecting.
In
Add some aliases that declare intent for some of the "dictly-typed"
objects we pass around in introspect.py.
Signed-off-by: John Snow
---
This patch is optional, it can be dropped if desired.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 48 --
Trivial; make the error message just a pinch more explicit in case we
trip this by accident in the future.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/scripts/qapi/introspect.py b/scripts/qapi/introspect.py
index
Returning two different types conditionally can be complicated to
type. Return one type for consistency.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/scripts/qapi/introspect.py b/scripts/qapi/introspect.py
index
In the modules that we are checking so far, we can be stricter about the
difference between Optional[T] and T types. Enable that check.
Enabling it now will assist review on further typing and cleanup work.
Signed-off-by: John Snow
---
scripts/qapi/mypy.ini | 1 -
1 file changed, 1 deletion(-)
This is only used to pass in a dictionary with a comment already set, so
skip the runaround and just accept the comment.
This works because _tree_to_qlit() treats 'if': None; 'comment': None
exactly like absent 'if'; 'comment'.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 18
_make_tree might receive a dict (a SchemaInfo object) or some other type
(usually, a string) for its obj parameter. Adding features information
should arguably be performed by the caller at such a time when we know
the type of the object and don't have to re-interrogate it.
Signed-off-by: John
_tree_to_qlit is called recursively on dict values alone; at such a
point in generating output it is too late to apply an ifcond. Similarly,
comments do not necessarily have a "tidy" place they can be printed in
such a circumstance.
Forbid this usage.
Signed-off-by: John Snow
---
At present, we open-code this in _make_tree itself; but if the structure
of the tree changes, this is brittle. Use an explicit recursive call to
_make_tree when appropriate to help keep the interior node typing
consistent.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 4 +++-
1 file
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 114 ++---
scripts/qapi/mypy.ini | 5 --
scripts/qapi/schema.py | 2 +-
3 files changed, 81 insertions(+), 40 deletions(-)
diff --git a/scripts/qapi/introspect.py b/scripts/qapi/introspect.py
Hi, this series adds static type hints to the QAPI module.
This is part two, and covers introspect.py.
Part 2: https://gitlab.com/jsnow/qemu/-/tree/python-qapi-cleanup-pt2
Everything: https://gitlab.com/jsnow/qemu/-/tree/python-qapi-cleanup-pt6
- Requires Python 3.6+
- Requires mypy 0.770 or
The introspect visitor is stateful, but expects that it will have a
schema to refer to. Add assertions that state this.
Signed-off-by: John Snow
---
scripts/qapi/introspect.py | 5 +
1 file changed, 5 insertions(+)
diff --git a/scripts/qapi/introspect.py b/scripts/qapi/introspect.py
index
When handle dirty log, we face qemu_real_host_page_size and
TARGET_PAGE_SIZE. The first one is the granule of KVM dirty
bitmap, and the second one is the granule of QEMU dirty bitmap.
As qemu_real_host_page_size >= TARGET_PAGE_SIZE (kvm_init()
enforced it), misuse TARGET_PAGE_SIZE to init kvmslot
The parameters start and size are transfered from QEMU memory
emulation layer. It can promise that they are TARGET_PAGE_SIZE
aligned. However, KVM needs they are qemu_real_page_size aligned.
Though no caller breaks this aligned requirement currently, we'd
better add an explicit assert to avoid
Hi all,
This series fixes memory waste and adds alignment check for unmatched
qemu_real_host_page_size and TARGET_PAGE_SIZE.
Thanks.
Keqian Zhu (2):
accel: kvm: Fix memory waste under mismatch page size
accel: kvm: Add aligment assert for kvm_log_clear_one_slot
accel/kvm/kvm-all.c | 13
On Wed, 16 Dec 2020 at 18:23, Steven Price wrote:
>
> On 16/12/2020 07:31, Haibo Xu wrote:
> [...]
> > Hi Steve,
>
> Hi Haibo
>
> > I have finished verifying the POC on a FVP setup, and the MTE test case can
> > be migrated from one VM to another successfully. Since the test case is very
> >
On 12/16/20 2:51 AM, Markus Armbruster wrote:
Is it too late to delay the introduction of type hints until after the
data structure cleanups?
If yes, I have to spend more time replying below.
No, I re-ordered the series again to delay typing until the end, or
close to it.
Though I
On 12/16/20 2:08 AM, Markus Armbruster wrote:
We all have our phobias. I find "isinstance(x,
extremely_common_stdlib_type)" to be extremely fragile and likely to
frustrate.
You're applying programming-in-the-large reasoning to a
programming-in-the-small case.
"Surely, they won't use my proof
On Thu, Dec 17, 2020 at 2:05 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> The alias is intended to indicate that the bswap is for the
> entire target_long. This should avoid ifdefs on some targets.
>
> Signed-off-by: Richard Henderson
> ---
> include/tcg/tcg-op.h | 2 ++
> 1
On 2020/12/17 4:48, Peter Xu wrote:
> On Wed, Dec 16, 2020 at 04:21:17PM +0800, Keqian Zhu wrote:
>> One more thing, we should consider whether @start and @size is psize aligned
>> (my second
>> patch). Do you agree to add assert on them directly?
>
> Yes I think the 2nd patch is okay, but
This patch makes NPCM7XX Timer to use a the timer clock generated by the
CLK module instead of the magic number TIMER_REF_HZ.
Reviewed-by: Havard Skinnemoen
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx.c | 5 +
hw/timer/npcm7xx_timer.c | 25
We add a qtest for the PWM in the previous patch. It proves it works as
expected.
Reviewed-by: Havard Skinnemoen
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
tests/qtest/meson.build| 1 +
tests/qtest/npcm7xx_pwm-test.c | 490 +
2 files changed,
This patch allows NPCM7XX CLK module to compute clocks that are used by
other NPCM7XX modules.
Add a new struct NPCM7xxClockConverterState which represents a
single converter. Each clock converter in CLK module represents one
converter in NPCM7XX CLK Module(PLL, SEL or Divider). Each converter
A device shouldn't access its parent object which is QOM internal.
Instead it should use type cast for this purporse. This patch fixes this
issue for all NPCM7XX Devices.
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx_boards.c | 2 +-
hw/mem/npcm7xx_mc.c | 2 +-
hw/misc/npcm7xx_clk.c | 2 +-
The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
identical PWM modules. Each module contains 4 PWM entries. Each PWM has
two outputs: frequency and duty_cycle. Both are computed using inputs
from software side.
This module does not model detail pulse signals since it is
The ADC is part of NPCM7XX Module. Its behavior is controled by the
ADC_CON register. It converts one of the eight analog inputs into a
digital input and stores it in the ADC_DATA register when enabled.
Users can alter input value by using qom-set QMP command.
Reviewed-by: Havard Skinnemoen
This patch series include a few more NPCM7XX devices including
- Analog Digital Converter (ADC)
- Pulse Width Modulation (PWM)
We also modified the CLK module to generate clock values using qdev_clock.
These clocks are used to determine various clocks in NPCM7XX devices.
Thank you for your
Sent in a patch for this.
https://lists.gnu.org/archive/html/qemu-devel/2020-12/msg04658.html
DTR controls the socket.
DCD reflects the state of the socket.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
On 12/16/20 5:34 PM, Philippe Mathieu-Daudé wrote:
> On 12/16/20 4:16 PM, Jiaxun Yang wrote:
>> 在 2020/12/16 21:43, Philippe Mathieu-Daudé 写道:
>>> Use the single ISA_MIPS32R2 definition to check if the Release 2
>>> ISA is supported, whether the CPU support 32/64-bit.
>>>
>>> For now we keep '32'
On 12/16/20 8:08 PM, Richard Henderson wrote:
> On 12/16/20 10:27 AM, Philippe Mathieu-Daudé wrote:
>> MIPS 64-bit ISA is introduced with MIPS3.
>> No need for another bit/definition to check for 64-bit.
>>
>> Suggested-by: Jiaxun Yang
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>>
Minimized Reproducer:
cat << EOF | ./qemu-system-i386 -M pc-q35-5.0 \
-accel qtest -monitor none \
-serial none -nographic -qtest stdio
outl 0xcf8 0x80001010
outl 0xcfc 0xe102
outl 0xcf8 0x80001004
outw 0xcfc 0x7
write 0x25 0x1 0x86
write 0x26 0x1 0xdd
write 0x4f 0x1 0x2b
write 0xe1020030 0x4
Patchew URL: https://patchew.org/QEMU/20201216172949.57380-1-th...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201216172949.57380-1-th...@redhat.com
Subject: [PULL 00/12] Compile QEMU with
This patch adds a 'modemctl' option to "-chardev socket" to enable control
of the socket via the guest serial port.
The default state of the option is disabled.
1. disconnect a connected socket when DTR transitions to low, also reject
new connections while DTR is low.
2. provide socket connection
On 12/16/20 11:12 PM, Richard Henderson wrote:
> The interface for object_property_add_bool is simpler,
> making the code easier to understand.
>
> Reviewed-by: Andrew Jones
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu64.c | 24 ++--
> 1 file changed, 10
Public bug reported:
@@ -165,7 +165,7 @@ static void ide_identify(IDEState *s)
put_le16(p + 76, (1 << 8));
}
put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
- put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
+ put_le16(p + 80, ((1 << 6) | (1 << 5) (1 << 4) (1 << 3));
On 10/26/20 2:35 PM, Peter Maydell wrote:
> Anyway, I tried to rebase it on current master, but it
> fails 'make check':
>
> MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}
> QTEST_QEMU_IMG=./qemu-img
>
The crypto overhead of emulating pauth can be significant for
some workloads. Add two boolean properties that allows the
feature to be turned off, on with the architected algorithm,
or on with an implementation defined algorithm.
We need two intermediate booleans to control the state while
The interface for object_property_add_bool is simpler,
making the code easier to understand.
Reviewed-by: Andrew Jones
Signed-off-by: Richard Henderson
---
target/arm/cpu64.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/target/arm/cpu64.c
The architected pauth algorithm is quite slow without
hardware support, and boot times for kernels that enable
use of the feature have been significantly impacted.
Version 1 blurb at
https://lists.nongnu.org/archive/html/qemu-devel/2020-08/msg02172.html
which contains larger study of the
Without hardware acceleration, a cryptographically strong
algorithm is too expensive for pauth_computepac.
Even with hardware accel, we are not currently expecting
to link the linux-user binaries to any crypto libraries,
and doing so would generally make the --static build fail.
So choose XXH64
On 12/10/20 2:14 PM, Peter Maydell wrote:
> Now that we have implemented all the features needed by the v8.1M
> architecture, we can add the model of the Cortex-M55. This is the
> configuration without MVE support; we'll add MVE later.
>
> Signed-off-by: Peter Maydell
> ---
>
On 12/10/20 2:14 PM, Peter Maydell wrote:
> Implement the v8.1M FPCXT_NS floating-point system register. This is
> a little more complicated than FPCXT_S, because it has specific
> handling for "current FP state is inactive", and it only wants to do
> PreserveFPState(), not the full set of
On 12/10/20 2:14 PM, Peter Maydell wrote:
> In commit 64f863baeedc8659 we implemented the v8.1M FPCXT_S register,
> but we got the write behaviour wrong. On read, this register reads
> bits [27:0] of FPSCR plus the CONTROL.SFPA bit. On write, it doesn't
> just write back those bits -- it writes a
Here's qemu's own strace log:
farino ~ # /usr/bin/qemu-riscv32 -strace /chroot/riscv-ilp32/tmp/wait-test-short
10123 brk(NULL) = 0x00073000
10123 brk(0x00073880) = 0x00073880
10123 uname(0x407ffed8) = 0
10123 readlinkat(AT_FDCWD,"/proc/self/exe",0x407feff0,4096) = 39
10123 brk(0x00094880) =
Hi all,
It seems a qemu-system-ppc from current master no longer boots into
openbios, but into to the compat monitor.
Command line to reproduce:
/home/hsp/src/qemu-master/build/qemu-system-ppc \
-L pc-bios \
-M mac99,via=pmu -m 1024 -boot c \
-drive
On 12/10/20 2:14 PM, Peter Maydell wrote:
> The CCR is a register most of whose bits are banked between security
> states but where BFHFNMIGN is not, and we keep it in the non-secure
> entry of the v7m.ccr[] array. The logic which tries to handle this
> bit fails to implement the "RAZ/WI from
Here's the (abbreviated) output of strace'ing qemu:
farino ~ # strace -f /usr/bin/qemu-riscv32
/chroot/riscv-ilp32/tmp/wait-test-short
execve("/usr/bin/qemu-riscv32", ["/usr/bin/qemu-riscv32",
"/chroot/riscv-ilp32/tmp/wait-tes"...], 0x7ffd95fb1330 /* 40 vars */) = 0
[...]
[pid 16569]
On Tue, Dec 15, 2020 at 10:53:13PM +0300, Andrey Gruzdev wrote:
> First are series of runs without scan-rate-limiting.patch.
> Windows 10:
>
> msecs : count distribution
> 0 -> 1 : 131913 ||
> 2 -> 3
On Thu, Nov 19, 2020 at 11:32:21AM +0100, Vitaly Kuznetsov wrote:
> Enabling Hyper-V emulation for a Windows VM is a tiring experience as it
> requires listing all currently supported enlightenments ("hv_*" CPU
> features) explicitly. We do have a 'hv_passthrough' mode enabling
> everything but it
On the pc-i440fx machine, the floppy drive relies on the i8257 DMA
controller. Add this device to the floppy fuzzer config, and silence the
warning about a missing format specifier for the null-co:// drive.
Signed-off-by: Alexander Bulekov
---
tests/qtest/fuzz/generic_fuzz_configs.h | 4 ++--
1
On Wed, Dec 16, 2020 at 04:21:17PM +0800, Keqian Zhu wrote:
> One more thing, we should consider whether @start and @size is psize aligned
> (my second
> patch). Do you agree to add assert on them directly?
Yes I think the 2nd patch is okay, but please address Drew's comments.
Returning -EINVAL
On Sat, 12 Dec 2020 16:55:07 +0100, Claudio Fontana wrote:
> The series has been split into two separate parts,
> and this is PART 1.
>
> v11 -> v12:
>
> * "cpu: Move synchronize_from_tb() to tcg_ops":
> removed review tags, as there is currently a bunch of conflicting
> requirements
On Mon, Dec 14, 2020 at 05:24:00PM -0500, Eduardo Habkost wrote:
> On Mon, Dec 14, 2020 at 10:56:13PM +0100, Philippe Mathieu-Daudé wrote:
> > Hi Claudio, Eduardo.
> >
> > On 12/14/20 8:10 PM, Eduardo Habkost wrote:
> > > On Sat, Dec 12, 2020 at 04:55:23PM +0100, Claudio Fontana wrote:
> > >>
On Thu, Dec 17, 2020 at 06:40:02AM +0800, Cathy Zhang wrote:
> AVX512 Half-precision floating point (FP16) has better performance
> compared to FP32 if the presicion or magnitude requirements are met.
> It's defined as CPUID.(EAX=7,ECX=0):EDX[bit 23].
>
> Refer to
>
On 12/14/20 9:30 AM, Alex Bennée wrote:
> If you kill the inferior from GDB we end up leaving our socket lying
> around. Fix this by calling gdb_exit() first.
>
> Signed-off-by: Alex Bennée
> ---
> gdbstub.c | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Richard Henderson
r~
On 12/14/20 9:30 AM, Alex Bennée wrote:
> Despite it's name it didn't actually clean-up so let us document
> gdb_exit() better and use that.
>
> Signed-off-by: Alex Bennée
> ---
> include/exec/gdbstub.h | 14 +++---
> gdbstub.c | 7 ---
> softmmu/vl.c | 2 +-
Thanks for the review. We can add a patch in this patchset to fix this
issue.
On Wed, Dec 16, 2020 at 11:02 AM Peter Maydell
wrote:
> On Tue, 15 Dec 2020 at 00:13, Hao Wu wrote:
> >
> > The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
> > identical PWM modules. Each module
On 12/14/20 9:30 AM, Alex Bennée wrote:
> gdb_exit() has never needed anything from env and I doubt we are going
> to start now.
>
> Signed-off-by: Alex Bennée
> ---
> include/exec/gdbstub.h| 2 +-
> bsd-user/syscall.c| 6 +++---
> gdbstub.c | 2 +-
>
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