Thanks for the quick reply Daniel. I've looked at the qemu man page many
times but somehow never noticed that it can take one non-option argument
alongside any other options. That does explain what is going on here. In
that case I'm not going to push for a potentially breaking change.
Perhaps it w
On 12/01/2021 13.23, Cornelia Huck wrote:
On Tue, 12 Jan 2021 11:32:44 +
Alex Bennée wrote:
Cornelia Huck writes:
On Fri, 8 Jan 2021 19:56:45 +0100
Thomas Huth wrote:
There was a race condition in the first test where there was already the
"crw" output in the dmesg, but the "0.0.4
On 11/30/2020 9:00 PM, Peter Maydell wrote:
On Mon, 9 Nov 2020 at 03:05, Ying Fang wrote:
Add the CPUCacheInfo structure to hold cpu cache information for ARM cpus.
A classic three level cache topology is used here. The default cache
capacity is given and userspace can overwrite these value
On 26.10.20 18:18, Vladimir Sementsov-Ogievskiy wrote:
This brings async request handling and block-status driven chunk sizes
to backup out of the box, which improves backup performance.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/backup.c | 187 -
On Tue, Jan 12, 2021 at 9:19 PM Peter Maydell wrote:
>
> On Tue, 12 Jan 2021 at 12:54, Bin Meng wrote:
> >
> > On Tue, Jan 12, 2021 at 6:49 PM Peter Maydell
> > wrote:
> > >
> > > On Sun, 10 Jan 2021 at 08:15, Bin Meng wrote:
> > > >
> > > > From: Bin Meng
> > > >
> > > > Usually the approach
On 1/12/21 1:47 PM, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Commit 1c0c2163aa08 ("hw/block/nvme: verify msix_init_exclusive_bar()
> return value") had the unintended effect of breaking support on
> several platforms not supporting MSI-X.
>
> Still check for errors, but only report that MSI-
On Tue, 12 Jan 2021 at 12:54, Bin Meng wrote:
>
> On Tue, Jan 12, 2021 at 6:49 PM Peter Maydell
> wrote:
> >
> > On Sun, 10 Jan 2021 at 08:15, Bin Meng wrote:
> > >
> > > From: Bin Meng
> > >
> > > Usually the approach is that the device on the other end of the line
> > > is going to reset its
On 1/6/21 5:59 AM, Bharata B Rao wrote:
If KVM_CAP_RPT_INVALIDATE KVM capability is enabled, then
- indicate the availability of H_RPT_INVALIDATE hcall to the guest via
ibm,hypertas-functions property.
- Enable the hcall
Both the above are done only if the new sPAPR machine capability
cap
virtio-fs qualifies as a bootable device minimally under OVMF, but
currently the necessary "bootindex" property is missing. Add the property.
Expose the property only in the PCI device, for now. There is no boot
support for virtiofs on s390x (ccw) for the time being [1] [2], so leave
the CCW devic
On Tue, Jan 12, 2021 at 02:15:59PM +0200, Adrian Catangiu wrote:
> - Background and problem
>
> The System Generation ID feature is required in virtualized or
> containerized environments by applications that work with local copies
> or caches of world-unique data such as random values, uuids,
> m
On 12/01/21 13:29, Daniel P. Berrangé wrote:
The -O0 might come from a pkg-config file
$BUILD_DIR/meson-logs/meson-log.txt
might show where it comes from.
It's added by Meson for compiler checks. It's useful for example for
functions that are declared as const or pure, and would be optimize
On Tue, Jan 12, 2021 at 02:15:59PM +0200, Adrian Catangiu wrote:
> +``read()``:
> + Read is meant to provide the *new* system generation counter when a
> + generation change takes place. The read operation blocks until the
> + associated counter is no longer up to date, at which point the new
>
If QEMU receives an argument that isn't an option flag, then it
considers it to be the path to a disk. The block code treats the empty
string as indicating that no backing file should be opened for the
device. This only makes sense for devices that support removable media
(ie CDROM, floppy), hence
在 2021/1/10 上午4:16, BALATON Zoltan 写道:
The base address of the SMBus io ports and its enabled status is set
by registers in the PCI config space but this was not correctly
emulated. Instead the SMBus registers were mapped on realize to the
base address set by a property to the address expected by
On Tue, Jan 12, 2021 at 6:49 PM Peter Maydell wrote:
>
> On Sun, 10 Jan 2021 at 08:15, Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > Usually the approach is that the device on the other end of the line
> > is going to reset its state anyway, so there's no need to actively
> > signal an irq line
From: Klaus Jensen
Commit 1c0c2163aa08 ("hw/block/nvme: verify msix_init_exclusive_bar()
return value") had the unintended effect of breaking support on
several platforms not supporting MSI-X.
Still check for errors, but only report that MSI-X is unsupported
instead of bailing out.
Reported-by:
On 26.10.20 18:18, Vladimir Sementsov-Ogievskiy wrote:
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/backup.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
Reviewed-by: Max Reitz
On Tue, Jan 12, 2021 at 6:46 PM Peter Maydell wrote:
>
> On Sun, 10 Jan 2021 at 08:15, Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > The endianness of data exchange between tx and rx fifo is incorrect.
> > Earlier bytes are supposed to show up on MSB and later bytes on LSB,
> > ie: in big endia
On Tue, Jan 12, 2021 at 02:15:58PM +0200, Adrian Catangiu wrote:
> This feature is aimed at virtualized or containerized environments
> where VM or container snapshotting duplicates memory state, which is a
> challenge for applications that want to generate unique data such as
> request IDs, UUIDs,
On 26.10.20 18:18, Vladimir Sementsov-Ogievskiy wrote:
We are going to stop use of this callback in the following commit.
Still the callback handling code will be dropped in a separate commit.
So, for now let's make it optional.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/block-copy
Public bug reported:
QEMU emulator version 4.2.1 (qemu-4.2.1-1.fc32) on Fedora 32.
When writing a script to start qemu automatically, I ran into a very
confusing error message due to a bug in my script and had trouble
understanding it. I isolated the problem to the following:
$ qemu-system-x86_6
On 26.10.20 18:18, Vladimir Sementsov-Ogievskiy wrote:
The further change of moving backup to be a one block-copy call will
make copying chunk-size and cluster-size two separate things. So, even
with 64k cluster sized qcow2 image, default chunk would be 1M.
Test 219 depends on specified chunk-siz
On Tue, Jan 12, 2021 at 01:26:00PM +0100, Christian Schoenebeck via wrote:
> On Dienstag, 12. Januar 2021 10:51:10 CET Olaf Hering wrote:
> > Depending on the build environment, the meson test to find a suitable
> > libattr fails. Something appends -O0 to CFLAGS.
> >
> > I see no "-O0" in qemu.git
On Dienstag, 12. Januar 2021 10:51:10 CET Olaf Hering wrote:
> Depending on the build environment, the meson test to find a suitable
> libattr fails. Something appends -O0 to CFLAGS.
>
> I see no "-O0" in qemu.git. This is a regression, it worked in
> 553032db17440f8de011390e5a1cfddd13751b0b.
>
>
On Tue, 12 Jan 2021 11:32:44 +
Alex Bennée wrote:
> Cornelia Huck writes:
>
> > On Fri, 8 Jan 2021 19:56:45 +0100
> > Thomas Huth wrote:
> >
> >> There was a race condition in the first test where there was already the
> >> "crw" output in the dmesg, but the "0.0.4711" entry has not bee
On 12/01/2021 12.29, Philippe Mathieu-Daudé wrote:
Replace fprintf() calls by qemu_log_mask(LOG_GUEST_ERROR).
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/ahci.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 4b675b9cfd8..6
On 1/12/21 12:27 PM, Gan Qixin wrote:
> When running device-introspect-test, a memory leak occurred in the
> mos6522_init
> function, this patch use timer_free() in the finalize function to fix it.
>
> ASAN shows memory leak stack:
>
> Direct leak of 96 byte(s) in 2 object(s) allocated from:
>
- Background
The VM Generation ID is a feature defined by Microsoft (paper:
http://go.microsoft.com/fwlink/?LinkId=260709) and supported by
multiple hypervisor vendors.
The feature can be used to drive the `sysgenid` mechanism required in
virtualized environments by software that works with local
- Background and problem
The System Generation ID feature is required in virtualized or
containerized environments by applications that work with local copies
or caches of world-unique data such as random values, uuids,
monotonically increasing counters, etc.
Such applications can be negatively af
This feature is aimed at virtualized or containerized environments
where VM or container snapshotting duplicates memory state, which is a
challenge for applications that want to generate unique data such as
request IDs, UUIDs, and cryptographic nonces.
The patch set introduces a mechanism that pro
On 26.10.20 18:18, Vladimir Sementsov-Ogievskiy wrote:
After introducing parallel async copy requests instead of plain
cluster-by-cluster copying loop, backup job may finish earlier than
final assertion in do_test_stop. Let's require slow backup explicitly
by specifying speed parameter.
Signed-o
Taylor Simpson writes:
> Modify tests/tcg/configure.sh
> Add reference files to tests/tcg/hexagon
> Add Hexagon-specific tests
>
> Signed-off-by: Taylor Simpson
> ---
> tests/tcg/hexagon/atomics.c| 122 ++
> tests/tcg/hexagon/clrtnew.c| 56 +++
> tests/tcg/hexagon/dual_st
Hi Bin,
On Tue, Jan 5, 2021 at 7:27 AM Bin Meng wrote:
>
> +Alistair Francis
>
> On Sat, Dec 19, 2020 at 8:24 AM Vitaly Wool wrote:
> >
> > Add command line parameter to microchip_pfsoc machine to be able
> > to specify XIP kernel image file. To pass over XIP image file, it
> > will be enough to
nary.
Alex, would it be OK to add this test without the UNTRUSTED tag
(amending the links in the commit description)?
[1] https://github.com/loongson-community/pmon/
[2]
https://github.com/loongson-community/pmon/blob/master/.github/workflows/compile.yml
[3] https://github.com/loongson-community/pm
On 26.10.20 18:18, Vladimir Sementsov-Ogievskiy wrote:
After introducing parallel async copy requests instead of plain
cluster-by-cluster copying loop, we'll have to wait for paused status,
as we need to wait for several parallel request. So, let's gently wait
instead of just asserting that job a
Taylor Simpson writes:
> From: Alessandro Di Federico
>
> Signed-off-by: Alessandro Di Federico
Queued to testing/next, thanks.
--
Alex Bennée
On 26.10.20 18:18, Vladimir Sementsov-Ogievskiy wrote:
Add new parameters to configure future backup features. The patch
doesn't introduce aio backup requests (so we actually have only one
worker) neither requests larger than one cluster. Still, formally we
satisfy these maximums anyway, so add t
Hi Joelle,
On 1/5/21 3:20 AM, Joelle van Dyne wrote:
> This introduces support for building for iOS hosts. When the correct Xcode
> toolchain is used, iOS host will be detected automatically.
>
> * block: disable features not supported by iOS sandbox
> * slirp: disable SMB features for iOS
> * os
On Wed, 23 Dec 2020 at 06:09, Richard Henderson
wrote:
>
> This eliminates the target-specific function target_parse_constraint
> and folds it into the single caller, process_op_defs. Since this is
> done directly into the switch statement, duplicates are compilation
> errors rather than silently
Taylor Simpson writes:
> From: Alessandro Di Federico
>
> Signed-off-by: Alessandro Di Federico
> ---
> tests/docker/docker.py | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/tests/docker/docker.py b/tests/docker/docker.py
> index 36b7868..d473566 100755
> --
On Tue, Jan 12, 2021 at 12:36:07PM +0100, Cornelia Huck wrote:
> On Tue, 12 Jan 2021 09:15:26 +0100
> Christian Borntraeger wrote:
>
> > On 12.01.21 05:45, David Gibson wrote:
> > > At least some s390 cpu models support "Protected Virtualization" (PV),
> > > a mechanism to protect guests from eav
On Wed, 23 Dec 2020 at 06:20, Richard Henderson
wrote:
>
> This exports the constraint sets from tcg_target_op_def to
> a place we will be able to manipulate more in future.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/i386/tcg-target-conset.h | 44
> tcg/i386/tcg-target.h|
Cornelia Huck writes:
> On Fri, 8 Jan 2021 19:56:45 +0100
> Thomas Huth wrote:
>
>> There was a race condition in the first test where there was already the
>> "crw" output in the dmesg, but the "0.0.4711" entry has not been created
>> in the /sys fs yet. Fix it by waiting until it is there.
Hi Joelle,
On 1/5/21 3:20 AM, Joelle van Dyne wrote:
> A future libslirp update will use libresolv on Darwin systems, so we add the
> flags in QEMU build now.
>
> Reviewed-by: Stefan Hajnoczi
> Signed-off-by: Joelle van Dyne
> ---
> meson.build | 2 ++
> 1 file changed, 2 insertions(+)
>
> di
And ahci_port_write(AHCI_PORT_REG_CMD) doesn't check
ahci_cond_start_engines() return value, calling
ahci_init_d2h() even if former failed.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1911075
Title
Having a quick look, the problem might be in ahci_cond_start_engines()
which calls ahci_map_clb_address(), then ahci_map_fis_address() fails
and we return without calling ahci_unmap_clb_address().
** Changed in: qemu
Status: New => Confirmed
--
You received this bug notification because y
On 1/5/21 3:20 AM, Joelle van Dyne wrote:
> Signed-off-by: Joelle van Dyne
> ---
> configure | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/configure b/configure
> index 09dd22ebad..79dc9811e8 100755
> --- a/configure
> +++ b/configure
> @@ -7033,9 +7033,12 @@ if te
On 12.01.21 12:36, Cornelia Huck wrote:
> On Tue, 12 Jan 2021 09:15:26 +0100
> Christian Borntraeger wrote:
>
>> On 12.01.21 05:45, David Gibson wrote:
>>> At least some s390 cpu models support "Protected Virtualization" (PV),
>>> a mechanism to protect guests from eavesdropping by a compromis
On Tue, 12 Jan 2021 15:45:06 +1100
David Gibson wrote:
> We haven't yet implemented the fairly involved handshaking that will be
> needed to migrate PEF protected guests. For now, just use a migration
> blocker so we get a meaningful error if someone attempts this (this is the
> same approach us
On Fri, 8 Jan 2021 at 22:20, Peter Maydell wrote:
>
> On Fri, 8 Jan 2021 at 21:47, Roman Bolshakov wrote:
> >
> > On Fri, Jan 08, 2021 at 03:05:55PM +, Peter Maydell wrote:
> > > This menu bar breakage appears to be caused by this patch. I have
> > > no idea why, because the patch looks prett
Replace fprintf() calls by qemu_log_mask(LOG_GUEST_ERROR).
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/ahci.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 4b675b9cfd8..6d50482b8d1 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci
On Tue, 12 Jan 2021 15:45:07 +1100
David Gibson wrote:
> The default behaviour for virtio devices is not to use the platforms normal
> DMA paths, but instead to use the fact that it's running in a hypervisor
> to directly access guest memory. That doesn't work if the guest's memory
> is protecte
v2->v3:
Changes suggested by Peter Maydell:
timer_free() already contains timer_del()(commit 5f8e93c3e262ab),
so delete unnecessary timer_del() function.
v1->v2:
patch1:
Delete the modification of unrelated whitespace.
patch2:
Add David Gibson acked tag.
patch3:
Has been applied, so del
When running device-introspect-test, a memory leak occurred in the mos6522_init
function, this patch use timer_free() in the finalize function to fix it.
ASAN shows memory leak stack:
Direct leak of 96 byte(s) in 2 object(s) allocated from:
#0 0xfffd5fe9e1f0 in __interceptor_calloc (/lib64/li
On Tue, 12 Jan 2021 15:45:05 +1100
David Gibson wrote:
> Some upcoming POWER machines have a system called PEF (Protected
> Execution Facility) which uses a small ultravisor to allow guests to
> run in a way that they can't be eavesdropped by the hypervisor. The
> effect is roughly similar to AM
On Fri, 8 Jan 2021 at 19:10, Hao Wu wrote:
>
> The ADC is part of NPCM7XX Module. Its behavior is controled by the
> ADC_CON register. It converts one of the eight analog inputs into a
> digital input and stores it in the ADC_DATA register when enabled.
>
> Users can alter input value by using qom
On 26.10.20 18:17, Vladimir Sementsov-Ogievskiy wrote:
Add function to cancel running async block-copy call. It will be used
in backup.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block-copy.h | 13 +
block/block-copy.c | 24 +++-
2
On Tue, 12 Jan 2021 09:15:26 +0100
Christian Borntraeger wrote:
> On 12.01.21 05:45, David Gibson wrote:
> > At least some s390 cpu models support "Protected Virtualization" (PV),
> > a mechanism to protect guests from eavesdropping by a compromised
> > hypervisor.
> >
> > This is similar in fun
When running device-introspect-test, a memory leak occurred in the pl031_init
function, this patch use timer_free() in the finalize function to fix it.
ASAN shows memory leak stack:
Direct leak of 48 byte(s) in 1 object(s) allocated from:
#0 0xab97e1f0 in __interceptor_calloc (/lib64/liba
On Mon, Jan 11, 2021 at 12:05:53AM -0500, Jagannathan Raman wrote:
> @@ -112,20 +132,36 @@ int qio_channel_readv_all_eof(QIOChannel *ioc,
> qio_channel_wait(ioc, G_IO_IN);
> }
> continue;
> -} else if (len < 0) {
> -goto cleanup;
> -
On Fri, 8 Jan 2021 at 19:10, Hao Wu wrote:
>
> This patch series include a few more NPCM7XX devices including
>
> - Analog Digital Converter (ADC)
> - Pulse Width Modulation (PWM)
>
> We also modified the CLK module to generate clock values using qdev_clock.
> These clocks are used to determine va
On Fri, 8 Jan 2021 at 21:38, Roman Bolshakov wrote:
>
> QEMU documentation can't be opened if QEMU is run from build tree
> because executables are placed in the top of build tree after conversion
> to meson.
>
> Signed-off-by: Roman Bolshakov
> ---
> ui/cocoa.m | 2 +-
> 1 file changed, 1 inser
On Tue, 12 Jan 2021 15:45:00 +1100
David Gibson wrote:
> Currently the "memory-encryption" property is only looked at once we
> get to kvm_init(). Although protection of guest memory from the
> hypervisor isn't something that could really ever work with TCG, it's
> not conceptually tied to the K
Am 05.01.2021 um 11:04 hat Alex Bennée geschrieben:
> The "auto" documentation states:
>
> That means they should run with every QEMU binary (also non-x86)
>
> which is not the case as the check-system-fedora build which only
> includes a rag tag group of rare and deprecated targets doesn't
>
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Tuesday, January 12, 2021 6:22 PM
> To: ganqixin
> Cc: QEMU Developers ; QEMU Trivial
> ; David Gibson ;
> Chenqun (kuhn) ; Zhanghailiang
> ; Euler Robot
> Subject: Re: [PATCH v2 1/2] pl031: Use timer_fre
On Mon, Jan 11, 2021 at 12:05:45AM -0500, Jagannathan Raman wrote:
> [PATCH v16 08/20] io: add qio_channel_readv_full_all_eof &
> qio_channel_readv_full_all helpers
> - Added two variants of readv - _full_all_eof & _full_all based on feedback
> - Dropped errno return value
>
On 26.10.20 18:17, Vladimir Sementsov-Ogievskiy wrote:
We are going to directly use one async block-copy operation for backup
job, so we need rate limiter.
We want to maintain current backup behavior: only background copying is
limited and copy-before-write operations only participate in limit
c
On Mon, 11 Jan 2021 17:38:40 +0100
David Hildenbrand wrote:
> This series fixes booting current upstream Linux kernel compiled by
> clang-11 and clang-12 under TCG.
>
> Latest version of the patches available at:
> g...@github.com:davidhildenbrand/qemu.git clang
>
> v2 -> v3:
> - Add 'tests/tcg
Patchew URL:
https://patchew.org/QEMU/20210112093950.17530-1-frank.ch...@sifive.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210112093950.17530-1-frank.ch...@sifive.com
Subject: [PATCH v6 00/72] support vector
On Sun, 10 Jan 2021 at 08:15, Bin Meng wrote:
>
> From: Bin Meng
>
> The endianness of data exchange between tx and rx fifo is incorrect.
> Earlier bytes are supposed to show up on MSB and later bytes on LSB,
> ie: in big endian. The manual does not explicitly say this, but the
> U-Boot and Linux
On Tue, 5 Jan 2021 at 02:23, Joelle van Dyne wrote:
>
> Based-on: 20201214140314.18544-1-richard.hender...@linaro.org
> ([PATCH v4 00/43] Mirror map JIT memory for TCG)
>
> These set of changes brings QEMU TCG to iOS devices and future Apple Silicon
> devices. They were originally developed last y
On Tue, 12 Jan 2021 15:44:59 +1100
David Gibson wrote:
> When the "memory-encryption" property is set, we also disable KSM
> merging for the guest, since it won't accomplish anything.
>
> We want that, but doing it in the property set function itself is
> thereoretically incorrect, in the unlike
On Mon, Jan 11, 2021 at 04:20:18PM +0100, Philippe Mathieu-Daudé wrote:
> Trivial prototype change to clarify the use of the 'running'
> argument of VMChangeStateHandler.
>
> Green CI:
> https://gitlab.com/philmd/qemu/-/pipelines/239497352
>
> Philippe Mathieu-Daudé (2):
> sysemu/runstate: Let
On Fri, 8 Jan 2021 19:56:45 +0100
Thomas Huth wrote:
> There was a race condition in the first test where there was already the
> "crw" output in the dmesg, but the "0.0.4711" entry has not been created
> in the /sys fs yet. Fix it by waiting until it is there.
>
> The second test has even more
On Sun, 10 Jan 2021 at 08:15, Bin Meng wrote:
>
> From: Bin Meng
>
> Usually the approach is that the device on the other end of the line
> is going to reset its state anyway, so there's no need to actively
> signal an irq line change during the reset hook.
>
> Move imx_spi_update_irq() out of im
On Tue, 12 Jan 2021 at 10:20, Gan Qixin wrote:
>
> When running device-introspect-test, a memory leak occurred in the pl031_init
> function, this patch use timer_free() in the finalize function to fix it.
>
> ASAN shows memory leak stack:
>
> Direct leak of 48 byte(s) in 1 object(s) allocated from
v1->v2:
patch1:
Delete the modification of unrelated whitespace.
patch2:
Add David Gibson acked tag.
patch3:
Has been applied, so delete it.
Gan Qixin (2):
pl031: Use timer_free() in the finalize function to avoid memleaks
misc/mos6522: Use timer_free() in the finalize function to avoid
On Tue, Jan 12, 2021 at 08:49:55AM +0100, Thomas Huth wrote:
> On 11/01/2021 12.51, Daniel P. Berrangé wrote:
> > On Mon, Jan 11, 2021 at 11:50:12AM +, Stefan Hajnoczi wrote:
> > > Use the GitLab repo URL as the main repo location in order to reduce
> > > load on qemu.org.
> > >
> > > Signed-o
On Fri, 8 Jan 2021 at 16:14, Peter Maydell wrote:
>
> Changes from v1 up top since they're minor:
> * rebase to account for two new manpages
> * patch 1 fixes the accidental omission of one of the
>new manpages from the meson.build list
> * patch 2 has been reviewed already
I'm applying th
On Tue, Jan 12, 2021 at 03:45:05PM +1100, David Gibson wrote:
> Some upcoming POWER machines have a system called PEF (Protected
> Execution Facility) which uses a small ultravisor to allow guests to
> run in a way that they can't be eavesdropped by the hypervisor. The
> effect is roughly similar
On Tue, Jan 12, 2021 at 03:45:08PM +1100, David Gibson wrote:
> At least some s390 cpu models support "Protected Virtualization" (PV),
> a mechanism to protect guests from eavesdropping by a compromised
> hypervisor.
>
> This is similar in function to other mechanisms like AMD's SEV and
> POWER's
When running device-introspect-test, a memory leak occurred in the mos6522_init
function, this patch use timer_free() in the finalize function to fix it.
ASAN shows memory leak stack:
Direct leak of 96 byte(s) in 2 object(s) allocated from:
#0 0xfffd5fe9e1f0 in __interceptor_calloc (/lib64/li
When running device-introspect-test, a memory leak occurred in the pl031_init
function, this patch use timer_free() in the finalize function to fix it.
ASAN shows memory leak stack:
Direct leak of 48 byte(s) in 1 object(s) allocated from:
#0 0xab97e1f0 in __interceptor_calloc (/lib64/liba
On Fri, 8 Jan 2021 at 18:51, Leif Lindholm wrote:
>
> First, fix a typo in ID_AA64PFR1 (SBSS -> SSBS).
>
> Second, turn clidr in the ARMCPU struct 64-bit, to support all fields defined
> by the ARM ARM.
>
> Third, add field definitions for CLIDR (excepting the Ttype fields, since
> I was unsure of
On Tue, Jan 12, 2021 at 03:44:57PM +1100, David Gibson wrote:
> Several architectures have mechanisms which are designed to protect guest
> memory from interference or eavesdropping by a compromised hypervisor. AMD
> SEV does this with in-chip memory encryption and Intel's MKTME can do
> similar t
On Jan 12 15:49, zhenwei pi wrote:
> There is a very low probability that hitting physical NVMe disk
> hardware critical warning case, it's hard to write & test a monitor
> agent service.
>
> For debugging purposes, add a new 'smart_critical_warning' property
> to emulate this situation.
>
> The
On 12.01.21 09:16, Thomas Huth wrote:
> On 12/01/2021 08.47, David Hildenbrand wrote:
>>
>>> Am 12.01.2021 um 08:41 schrieb Thomas Huth :
>>>
>>> On 11/01/2021 17.38, David Hildenbrand wrote:
The current EXRL tests crash on real machines: we must not use r0 as a base
register for trt/trt
On Fri, 8 Jan 2021 at 09:08, wrote:
>
> From: Rémi Denis-Courmont
>
> Signed-off-by: Rémi Denis-Courmont
> ---
> target/arm/cpu64.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 7cf9fc4bc6..da24f94baa 100644
> --- a/target/arm/cpu64.c
>
On Tue, 12 Jan 2021 at 00:04, Richard Henderson
wrote:
>
> On 12/18/20 12:37 AM, remi.denis.courm...@huawei.com wrote:
> > From: Rémi Denis-Courmont
> >
> > With the ARMv8.4-SEL2 extension, EL2 is a legal exception level in
> > secure mode, though it can only be AArch64.
> >
> > This patch adds t
From: Hsiangkai Wang
Signed-off-by: Hsiangkai Wang
Acked-by: Richard Henderson
Signed-off-by: Frank Chang
---
gdb-xml/riscv-32bit-csr.xml | 11 ++-
gdb-xml/riscv-64bit-csr.xml | 11 ++-
target/riscv/gdbstub.c | 4 ++--
3 files changed, 14 insertions(+), 12 deletions(-)
On Tue, Jan 12, 2021 at 03:45:05PM +1100, David Gibson wrote:
> Some upcoming POWER machines have a system called PEF (Protected
> Execution Facility) which uses a small ultravisor to allow guests to
> run in a way that they can't be eavesdropped by the hypervisor. The
> effect is roughly similar
Looks good to me. Igor, want to ack before I apply this?
On Tue, Jan 12, 2021 at 06:19:03PM +0800, Jiahui Cen wrote:
> Kindly ping...
>
> Thanks,
> Jiahui
>
> On 2021/1/7 19:40, Jiahui Cen wrote:
> > This patch series adds some fixes for ARM virt machine pxb support.
> > 1. Pass addr offset for
From: Frank Chang
Signed-off-by: Frank Chang
--
Signed-off-by: Frank Chang
---
target/riscv/cpu.h | 2 +-
target/riscv/insn_trans/trans_rvv.c.inc | 4 ++--
target/riscv/vector_helper.c| 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/targ
Depending on the build environment, the meson test to find a suitable libattr
fails. Something appends -O0 to CFLAGS.
I see no "-O0" in qemu.git. This is a regression, it worked in
553032db17440f8de011390e5a1cfddd13751b0b.
Does anyone happen to know what is causing this?
Olaf
./configure --ho
From: Frank Chang
Signed-off-by: Frank Chang
---
target/riscv/helper.h | 22 +-
target/riscv/insn32.decode | 15 ---
target/riscv/insn_trans/trans_rvv.c.inc | 58 +
target/riscv/vector_helper.c| 45 ++
Kindly ping...
Thanks,
Jiahui
On 2021/1/7 19:40, Jiahui Cen wrote:
> This patch series adds some fixes for ARM virt machine pxb support.
> 1. Pass addr offset for IO, MMIO and bus number when builing crs, because
> the addr_trans is needed to describe an addr resource. [1]
> 2. Inform guest os no
From: Frank Chang
Signed-off-by: Frank Chang
---
target/riscv/csr.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 176010674e8..3baf5c2cf33 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -217,7 +217,7 @@ stati
From: Frank Chang
Add the following instructions:
* vfcvt.rtz.xu.f.v
* vfcvt.rtz.x.f.v
Also adjust GEN_OPFV_TRANS() to accept multiple floating-point rounding
modes.
Signed-off-by: Frank Chang
---
target/riscv/insn32.decode | 11 ++--
target/riscv/insn_trans/trans_rvv.c.inc | 83
From: Frank Chang
Signed-off-by: Frank Chang
Reviewed-by: Richard Henderson
---
target/riscv/insn32.decode | 1 -
target/riscv/insn_trans/trans_rvv.c.inc | 23 ---
2 files changed, 24 deletions(-)
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.
From: Frank Chang
Implement the floating-point reciprocal square-root estimate to 7 bits
instruction.
Signed-off-by: Frank Chang
---
target/riscv/helper.h | 4 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvv.c.inc | 1 +
target/riscv/v
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