MemoryRegion names is cached on first call to memory_region_name(),
so displaying the name is trace events is cheap. Add it for read /
write ops.
Signed-off-by: Philippe Mathieu-Daudé
---
softmmu/memory.c | 12
softmmu/trace-events | 4 ++--
2 files changed, 10 insertions(+), 6
On 3/4/21 2:00 PM, Laurent Vivier wrote:
Laurent Vivier (5):
char: add goldfish-tty
intc: add goldfish-pic
m68k: add an interrupt controller
m68k: add a system controller
m68k: add Virtual M68k Machine
Reviewed-by: Richard Henderson
r~
On 3/5/21 5:26 AM, Bastian Koppelmann wrote:
case OPC2_32_RRPW_EXTR:
+if (width == 0) {
+tcg_gen_movi_tl(cpu_gpr_d[r3], 0);
+break;
+}
+
if (pos + width <= 32) {
-/* optimize special cases */
+/* o
On 3/5/21 5:26 AM, Bastian Koppelmann wrote:
@@ -6989,6 +6989,7 @@ static void decode_rrpw_extract_insert(DisasContext *ctx)
uint32_t op2;
int r1, r2, r3;
int32_t pos, width;
+TCGv temp;
op2 = MASK_OP_RRPW_OP2(ctx->opcode);
r1 = MASK_OP_RRPW_S1(ctx->opcode);
Flushing out the report to something that compiles,
the test case works for me using qemu 5.2.
** Attachment added: "z.c"
https://bugs.launchpad.net/qemu/+bug/1918026/+attachment/5474131/+files/z.c
** Changed in: qemu
Status: New => Fix Released
--
You received this bug notification b
Not as simple as _tl vs _i32. That suffix should be taking
care of the sign-extension to _tl that happens after the
operation. The size of the operation should be in the MO_TESL,
which specifies target-endian signed "long" (32-bit).
Will investigate further.
--
You received this bug notificati
From: Taylor Simpson
Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros")
Eliminate the following Coverity CIDs (Bad bit shift operation)
325227
325292
325425
325526
325561
325564
325578
325637
325736
325748
325786
325815
325837
Signed-off-by
From: Philippe Mathieu-Daudé
Fix a trivial incorrect usage of variable argument macros detected
by Coverity (missing_va_end: va_end was not called for ap).
Fixes: Coverity CID 1446720 (VARARGS)
Fixes: e3c00c2ed75 ("Hexagon (target/hexagon) opcode data structures")
Signed-off-by: Philippe Mathieu
From: Philippe Mathieu-Daudé
Commit 3e7a84eeccc ("Hexagon build infrastructure") added Hexagon
definitions that should be poisoned on target independent device
code, but forgot to update "exec/poison.h". Do it now.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Taylor Simpson
Message-Id: <
The following changes since commit 91e92cad67caca3bc4b8e920ddb5c8ca64aac9e1:
Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210305' into
staging (2021-03-05 19:04:47 +)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-he
From: Alex Bennée
We don't really deal in cf_mask most of the time. The one time it's
relevant is when we want to remove an invalidated TB from the QHT
lookup. Everywhere else we should be looking up things without
CF_INVALID set.
Signed-off-by: Alex Bennée
Message-Id: <20210224165811.11567-4-a
From: Alex Bennée
There is nothing special about this compile flag that doesn't mean we
can't just compute it with curr_cflags() which we should be using when
building a new set.
Signed-off-by: Alex Bennée
Message-Id: <20210224165811.11567-3-alex.ben...@linaro.org>
Signed-off-by: Richard Hender
The primary motivation is to remove a dozen insns along
the fast-path in tb_lookup. As a byproduct, this allows
us to completely remove parallel_cpus.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-accel-ops.h | 1 +
include/exec/exec-all.h | 7 +---
From: Alex Bennée
Lets make sure all the flags we compare when looking up blocks are
together in the same place.
Signed-off-by: Alex Bennée
Message-Id: <20210224165811.11567-5-alex.ben...@linaro.org>
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 11 ---
1 file changed
This includes bswap16 and bswap32.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 73f639d23a..66f2962d6e 100644
--- a/tcg/tci.c
+++ b/tcg/t
This includes add, sub, mul, and, or, xor.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 83 +--
1 file changed, 25 insertions(+), 58 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 9efe69d05f..d0b
Use explicit casts for ext32u opcodes, and allow truncation
to happen for other users.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 122 --
1 file changed, 54 insertions(+), 68 deletions(-)
diff --git a
From: Alex Bennée
Having a function return either and valid TB and some system state
seems excessive. It will make the subsequent re-factoring easier if we
lookup the current state where we are.
Signed-off-by: Alex Bennée
Message-Id: <20210224165811.11567-2-alex.ben...@linaro.org>
Signed-off-by
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 29 +
1 file changed, 5 insertions(+), 24 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 66f2962d6e..3ccd30c39c 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -387,7 +387,7 @@ uint
In all cases restricted to 64-bit hosts, tcg_read_r is
identical. We retain the 64-bit symbol for the single
case of INDEX_op_qemu_st_i64.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 93 +--
1 file cha
This includes ext8s, ext8u, ext16s, ext16u.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 44
1 file changed, 8 insertions(+), 36 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index d0bf810781..73f639d23a 100
Use explicit casts for ext8u opcodes, and allow truncation
to happen with the store for st8 opcodes.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 23 +--
1 file changed, 5 insertions(+), 18 deletions(-)
diff --git a/tcg/tci.c b/tcg/tc
Use explicit casts for ext32s opcodes.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 20 ++--
1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index a5aaa763f8..cef12f263d 100644
--- a/tcg/tci.c
+++ b/tcg
Use explicit casts for ext16s opcodes.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 26 --
1 file changed, 4 insertions(+), 22 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 2440da1746..8b91e6efc3 100644
--- a/tcg/tci.c
+++
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
cases that are identical between 32-bit and 64-bit hosts.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20210217202036.1724901-5-richard.hender...@linaro.org>
[PMD: Split patch as 3/5]
Signed-off-by: Philip
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
cases that are identical between 32-bit and 64-bit hosts.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20210217202036.1724901-5-richard.hender...@linaro.org>
[PMD: Split patch as 5/5]
Signed-off-by: Philip
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
cases that are identical between 32-bit and 64-bit hosts.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20210217202036.1724901-5-richard.hender...@linaro.org>
[PMD: Split patch as 4/5]
Signed-off-by: Philip
Use the provided cpu_ldst.h interfaces. This fixes the build vs
the unconverted uses of g2h(), adds missed memory trace events,
and correctly recognizes when a SIGSEGV belongs to the guest via
set_helper_retaddr().
Fixes: 3e8f1628e864
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hend
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
cases that are identical between 32-bit and 64-bit hosts.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20210217202036.1724901-5-richard.hender...@linaro.org>
[PMD: Split patch as 2/5]
Signed-off-by: Philip
Use explicit casts for ext16u opcodes, and allow truncation
to happen with the store for st16 opcodes, and with the call
for bswap16 opcodes.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 28 +++-
1 file changed, 7 insertions(+), 21
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
cases that are identical between 32-bit and 64-bit hosts.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20210217202036.1724901-5-richard.hender...@linaro.org>
[PMD: Split patch as 1/5]
Signed-off-by: Philip
Allow other places in tcg to restart with a smaller tb.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 63a12b197b..bbe3dcee03 100644
--- a/tcg/tcg.c
+++ b
The use in tcg_tb_lookup is given a random pc that comes from the pc
of a signal handler. Do not assert that the pointer is already within
the code gen buffer at all, much less the writable mirror of it.
Fixes: db0c51a3803
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 20 ++--
For some vector operations, "1D" is not a valid type, and there
are separate instructions for the 64-bit scalar operation.
Tested-by: Stefan Weil
Buglink: https://bugs.launchpad.net/qemu/+bug/1916112
Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations")
Signed-off-by: Richard Henderson
---
The following changes since commit 91e92cad67caca3bc4b8e920ddb5c8ca64aac9e1:
Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210305' into
staging (2021-03-05 19:04:47 +)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tc
An hppa guest executing
0xe05c: ldil L%1,r4
0xe060: ldo 0(r4),r4
0xe064: sub r3,r4,sp
produces
e064 e068
sub2_i32 tmp0,tmp4,r3,$0x1,$0x1,$0x0
after folding and constant propagation. Then we hit
tcg-target.c.inc:640:
Fix a typo in the encodeing of the cmle (zero) instruction.
Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations")
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/t
Use explicit casts for ext8s opcodes.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tci.c | 25 -
1 file changed, 4 insertions(+), 21 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 4ade0ccaf9..7325c8bfd0 100644
--- a/tcg/tci.c
+++ b
Public bug reported:
Version: qemu-riscv64 version 4.2.1 (Debian 1:4.2-3ubuntu6.14)
test:
amomaxu.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value); // FAIL, saw -11
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value); // FAIL, raw -11
EXPECT_
Hello,
Doug Evans, le ven. 05 mars 2021 17:00:13 -0800, a ecrit:
> Is it possible for QEMU to lazily determine the guest's IPv6
> address? I.e., postpone the ""->guest address mapping until it's
> needed and then, say, take the first entry in the NDP table?
That would probably be possible, yes, b
Peter Maydell writes:
> ILP32 for AArch64 is a zombie target -- it is kinda-sorta
> supported in some toolchains but has no support in eg
> the Linux syscall ABI. The semihosting ABI does not implement
> any kind of ILP32 variant -- you can have A32/T32 (AArch32)
> semihosting, where register and
We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_SCI selector for the SH4 serial controller.
Add the missing MAINTAINERS entries.
Suggested-by: Peter Maydell
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Ma
As replaced the generic CONFIG_SH4 by more fine-grained
selectors, we can remove this now unused config variable.
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Acked-by: Paolo Bonzini
Message-Id: <20210222141514.2646278-9-f4...@amsat.org>
---
r2d_init() calls sh7750_init() so depends on SH7750.Harmless
at the moment because nothing actually uses CONFIG_SH7750
(hw/sh4/meson.build always compiles sh7750.c and sh7750_regnames.c
unconditionally).
Fixes: 7ab58d4c841 ("sh4-softmmu.mak: express dependencies with Kconfig")
Reported-by: Peter M
We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_TIMER selector for the SH4 timer control unit.
Add the missing MAINTAINERS entries.
Suggested-by: Peter Maydell
Reviewed-by: Peter Maydell
Signed-off-by: Philippe
We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_PCI selector for the SH4 PCI controller.
Move the file with the other PCI host devices in hw/pci-host
and add its missing MAINTAINERS entries.
Suggested-by: Peter Ma
Remove these confusing and unused definitions.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20210127232151.3523581-6-f4...@amsat.org>
---
target/sh4/cpu.h | 11 ---
1 file changed, 11 deletions(-)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
ind
This code was introduced in commit 27c7ca7e775,
("SHIX board emulation (Samuel Tardieu)"). Use
the same license.
Cc: Samuel Tardieu
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Acked-by: Paolo Bonzini
Message-Id: <20210222141514.2646278-2-f4...@amsat.org>
---
include/h
This file is borrowed from the RTEMS source code, which comes
with a GPL-2.0-or-later license with a header exception.
Expand the GPL-2.0-or-later license in place to not be dependent
on a 3rd party website. This also fix the misleading comment "The
license and distribution terms for this file may
We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_INTC selector for the SH4 interrupt controller.
Suggested-by: Peter Maydell
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard
get_mmu_address() and get_physical_address() don't use their
'int access_type' argument: remove it along with ACCESS_INT
in superh_cpu_tlb_fill().
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/sh4/helper.c | 15 +++
We are going to move this code, fix its style first.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20210127232151.3523581-2-f4...@amsat.org>
---
target/sh4/helper.c | 82 ++---
1 file changed, 41 insertions(+), 41 delet
Add more fine-grained selection by adding a CONFIG_TC58128
selector for the TC58128 eeprom.
As this device is only used by the Shix machine, add an entry
to the proper section in MAINTAINERS.
Suggested-by: Peter Maydell
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-
superh_cpu_tlb_fill() already provides a access_type variable of
type MMUAccessType, and it is passed along, but casted as integer
and renamed 'rw'.
Simply replace 'int rw' by 'MMUAccessType access_type'.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <202101272
Replace the 0/1/2 magic values by the corresponding MMUAccessType.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20210127232151.3523581-3-f4...@amsat.org>
---
target/sh4/helper.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --g
:47 +)
are available in the Git repository at:
https://gitlab.com/philmd/qemu.git tags/renesas-20210306
for you to fetch changes up to ef95ca038295bdf6749cbce426b281c21a08971e:
hw/sh4/sh7750_regs: Replace link to license by its full content (2021-03-06
KVM requires the target cpu to be at least ARMv8 architecture
(support on ARMv7 has been dropped in commit 82bf7ae84ce:
"target/arm: Remove KVM support for 32-bit Arm hosts").
A KVM-only build won't be able to run TCG cpus, move the
v7A CPU definitions to cpu_tcg.c.
Reported-by: Peter Maydell
Re
On 3/5/21 3:38 PM, Peter Maydell wrote:
> On Sun, 21 Feb 2021 at 22:26, Philippe Mathieu-Daudé wrote:
>>
>> KVM requires the target cpu to be at least ARMv8 architecture.
>>
>> Restrict the last ARMv7 CPUs (A-profile) to TCG.
>>
>> Series almost fully reviewed (missing review is trivial code style
On 2/22/21 7:56 PM, Philippe Mathieu-Daudé wrote:
> This file is borrowed from the RTEMS source code, which comes
> with a GPL-2.0-or-later license with a header exception.
>
> Expand the GPL-2.0-or-later license in place to not be dependent
> on a 3rd party website. This also fix the misleading c
On Fri, 5 Mar 2021 at 23:54, Keith Packard wrote:
>
> Peter Maydell writes:
>
> > For semihosting for Arm what matters is "what state is the core
> > in at the point where it makes the semihosting SVC/HLT/etc insn?".
>
> Ok, that means we *aren't* talking about -mabi=ilp32, which is good --
> in
-20210304' into staging (2021-03-05
10:47:46 +)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20210306
for you to fetch changes up to d2d837d68f7c493e4bc306a237d7f72db88a0201:
hw/arm/mps2: Update old infocenter.arm.com
On Fri, 5 Mar 2021 at 16:55, Kevin Wolf wrote:
>
> The following changes since commit 9a7beaad3dbba982f7a461d676b55a5c3851d312:
>
> Merge remote-tracking branch
> 'remotes/alistair/tags/pull-riscv-to-apply-20210304' into staging (2021-03-05
> 10:47:46 +)
>
> are available in the Git reposi
Patchew URL:
https://patchew.org/QEMU/20210306105419.110503-1-pbonz...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210306105419.110503-1-pbonz...@redhat.com
Subject: [PULL 00/23] Misc patches for 2021-
After reading the dependency file, ninja just deletes it, in the name
of cleanliness I guess. However this complicates debugging unnecessarily
compared to good old "-include *.d". Use the keepdepfile debugging
option to make it easier to see what is going on.
Signed-off-by: Paolo Bonzini
Messag
Adjust the timeouts for the benchmarks (Meson 0.57 allows 0 to mean
infinite) and for the longest running tests. These are the
times that I measured and the corresponding timeouts. For generic
qtests, the target that reported the longest runtime is included.
unit tests:
test-crypto-tlscredsx
From: Hannes Reinecke
Currently sg_io_sense_from_errno() converts the two input parameters
'errno' and 'io_hdr' into sense code and SCSI status. Having
split the function off into scsi_sense_from_errno() and
scsi_sense_from_host_status(), both of which are available generically,
we now inline the
The "delay" option was a hack that was introduced to allow writing "nodelay".
We are adding a "nodelay" option to be used as "nodelay=on", so recommend it
instead of "delay".
This is quite ugly, but a proper deprecation of "delay"
cannot be done if QEMU starts suggesting it. Since it's the
only c
If a READ CAPACITY command would fail, for example s->qdev.blocksize would be
set to zero and cause a division by zero on the next use.
Signed-off-by: Paolo Bonzini
---
hw/scsi/scsi-generic.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/scsi/scsi-generic.c b/hw/scsi
From: Daniele Buono
For CFI, we need to compile slirp as a static library together with qemu.
This is because we register slirp functions as callbacks for QEMU Timers.
When using a system-wide shared libslirp, the type information for the
callback is missing and the timer call produces a false po
From: Hannes Reinecke
We really should make a distinction between legitimate sense codes
(ie if one is running against an emulated block device or for
pass-through sense codes), and the intermediate errors generated
during processing of the command, which really are not sense codes
but refer to s
From: David Edmondson
When loading the PVH start address from a 32 bit ELF note, extract
only the appropriate number of bytes.
Fixes: ab969087da65 ("pvh: Boot uncompressed kernel using direct boot ABI")
Signed-off-by: David Edmondson
Reviewed-by: Stefano Garzarella
Message-Id: <20210302090315.
When the "simple" backend is not active but the "log" backend is,
both "-trace file=" and "-D" will result in a call to
qemu_set_log_filename. Unfortunately, QEMU was also calling
qemu_set_log_filename if "-D" was not passed, so the "-trace
file=" option had no effect and the tracepoints went back
Because trace_opt_parse always deletes the options it has parsed,
trace_init_file's call to qemu_find_opts_singleton always
creates an empty -trace option group. Therefore, the subsequent
qemu_opt_get(opts, "file") always returns NULL.
To fix this, save the last "-trace file=..." option in a glob
From: Peng Liang
PCI_DEVICE has overwritten DeviceState::unrealize (pci_qdev_unrealize).
However, LSI53C895A, which is a subclass of PCI_DEVICE, overwrites it
again and doesn't save the parent's implementation so the PCI_DEVICE's
implementation of DeviceState::unrealize will never be called when
From: David Edmondson
Because sizeof(struct elf64_note) == sizeof(struct elf32_note),
attempting to use the size of the currently defined struct elf_note as
a discriminator for whether the object being loaded is 64 bit in
load_elf() fails.
Instead, take advantage of the existing glue parameter S
From: Hannes Reinecke
Some SCSI drivers like virtio have an internal mapping for the
host_status. This patch moves the host_status translation into
the SCSI drivers to allow those drivers to set up the correct
values.
Signed-off-by: Hannes Reinecke .
[Added default handling to avoid touching all
From: Keqian Zhu
The parameters start and size are transfered from QEMU memory
emulation layer. It can promise that they are TARGET_PAGE_SIZE
aligned. However, KVM needs they are qemu_real_page_size aligned.
Though no caller breaks this aligned requirement currently, we'd
better add an explicit
From: Hannes Reinecke
As we don't have a driver-specific mapping (yet) we should provide
for a detailed mapping from host_status to SCSI sense codes.
Signed-off-by: Hannes Reinecke
Message-Id: <20201116184041.60465-6-h...@suse.de>
Signed-off-by: Paolo Bonzini
---
include/scsi/utils.h | 1 +
From: Kostiantyn Kostiuk
The current GLib version implements the DllMain function. DllMain is also
present in the provider.cpp code. So in the case of static linking, the
DllMain redefinition error occurs. For now, just switch to dynamic linking
and revert this patch when the issue will be solved
This enables some simplification of vl.c via error_fatal, and improves
error messages. Before:
$ ./qemu-system-x86_64 -readconfig .
qemu-system-x86_64: error reading file
qemu-system-x86_64: -readconfig .: read config .: Invalid argument
$ /usr/libexec/qemu-kvm -readconfig foo
qemu-kvm:
From: Keqian Zhu
When handle dirty log, we face qemu_real_host_page_size and
TARGET_PAGE_SIZE. The first one is the granule of KVM dirty
bitmap, and the second one is the granule of QEMU dirty bitmap.
As qemu_real_host_page_size >= TARGET_PAGE_SIZE (kvm_init()
enforced it), misuse TARGET_PAGE_SI
From: Daniel Henrique Barboza
Commit v5.2.0-190-g0546c0609c ("vl: split various early command line
options to a separate function") moved the trace backend init code to
the qemu_process_early_options(). Which is now being called before
os_daemonize() via qemu_maybe_daemonize().
Turns out that th
If kvm_arch_remove_sw_breakpoint finds that a software breakpoint does not
have an INT3 instruction, it fails. This can happen if one sets a
software breakpoint in a kernel module and then reloads it. gdb then
thinks the breakpoint cannot be deleted and there is no way to add it
back.
Suggested-
The userspace local APIC is basically untested and does not support many
features such as TSC deadline timer, x2APIC or PV spinlocks. On the
other hand, the PIT and IOAPIC are okay as they are not tied to
the processor and are tested with -M kernel-irqchip=split.
Therefore, deprecate the local AP
The "delay" option was introduced as a way to enable Nagle's algorithm
with ",nodelay". Since the short form for boolean options has now been
deprecated, introduce a more properly named "nodelay" option. The "delay"
option remains as an undocumented option.
"delay" and "nodelay" are mutually exc
From: Kevin Wolf
Most code paths for creating a user creatable object go through
QemuOpts, which ensures that the provided 'id' option is actually a
valid identifier.
However, there are some code paths that don't go through QemuOpts:
qemu-storage-daemon --object (since commit 8db1efd3) and QMP o
The following changes since commit e586edcb410543768ef009eaa22a2d9dd4a53846:
virtiofs: drop remapped security.capability xattr as needed (2021-03-04
10:26:16 +)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to
On 02/03/21 18:16, Kevin Wolf wrote:
Most code paths for creating a user creatable object go through
QemuOpts, which ensures that the provided 'id' option is actually a
valid identifier.
However, there are some code paths that don't go through QemuOpts:
qemu-storage-daemon --object (since commit
If a READ CAPACITY command would fail, for example s->qdev.blocksize would be
set to zero and cause a division by zero on the next use.
Signed-off-by: Paolo Bonzini
---
hw/scsi/scsi-generic.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/scsi/scsi-generic.c b/hw/scsi
While pgd_find_hole_fallback returns the beginning of the
hole found, pgb_find_hole returns guest_base, which
is somewhat different as the binary qemu-user is loading
usually have non-zero load address.
Failing to take that into account leads to random crashes
if the hole is "just big enough", but
Reviewed-by: Chuan Zheng
On 2021/2/9 18:42, Hao Wang wrote:
> If any error happens during multifd send thread creating (e.g. channel broke
> because new domain is destroyed by the dst), multifd_tls_handshake_thread
> may exit silently, leaving main migration thread hanging (ram_save_setup ->
> mu
Reviewed-by: Chuan Zheng
On 2021/2/9 18:42, Hao Wang wrote:
> Function multifd_channel_connect() return "true" to indicate failure,
> which is rather confusing. Fix that.
>
> Signed-off-by: Hao Wang
> ---
> migration/multifd.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
On 2021/2/4 18:18, Dr. David Alan Gilbert wrote:
> * Chuan Zheng (zhengch...@huawei.com) wrote:
>> Signed-off-by: Zhimin Feng
>> Signed-off-by: Chuan Zheng
>> ---
>> migration/rdma.c | 65
>>
>> 1 file changed, 61 insertions(+), 4 dele
On 2021/2/4 2:59, Dr. David Alan Gilbert wrote:
> * Chuan Zheng (zhengch...@huawei.com) wrote:
>> We still don't transmit anything through them, and we only build
>> the RDMA connections.
>>
>> Signed-off-by: Zhimin Feng
>> Signed-off-by: Chuan Zheng
>> ---
>> migration/rdma.c | 69
>> ++
On 2021/2/4 18:32, Dr. David Alan Gilbert wrote:
> * Chuan Zheng (zhengch...@huawei.com) wrote:
>> Signed-off-by: Chuan Zheng
>> ---
>> migration/multifd.c | 6 ++
>> migration/multifd.h | 1 +
>> migration/rdma.c| 16 +++-
>> 3 files changed, 22 insertions(+), 1 deletion
On 2021/2/4 4:12, Dr. David Alan Gilbert wrote:
> * Chuan Zheng (zhengch...@huawei.com) wrote:
>> Signed-off-by: Zhimin Feng
>> Signed-off-by: Chuan Zheng
>
> This could do with a description in the commit message of the sequence;
> I think you're waiting for the semaphore; doing the registra
On 2021/2/4 2:10, Dr. David Alan Gilbert wrote:
> This patch needs to explain why the sync isn't needed for RDMA.
>
> Dave
>
OK. the multifd with tcp will send pages if it has pages to send by the record
of multifd_send_state->pages->used while
RDMA is using rdma_write_hooks.
> * Chuan Zheng
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