On 3/28/21 7:11 PM, Richard Henderson wrote:
> On 3/26/21 1:36 PM, Claudio Fontana wrote:
>> @@ -638,24 +638,21 @@ static int cpu_pre_save(void *opaque)
>>
>> if (tcg_enabled()) {
>> pmu_op_start(&cpu->env);
>> +if (!write_cpustate_to_list(cpu, false)) {
>> +/
On Fri, Mar 26, 2021 at 4:29 PM Jason Wang wrote:
>
>
> 在 2021/3/25 下午3:15, Cindy Lu 写道:
>
> +enum virtio_config_status {
> +VIRTIO_CONFIG_SUPPORT,
> +VIRTIO_CONFIG_WORK,
> +VIRTIO_CONFIG_STOP,
> +VIRTIO_CONFIG_STATUS_UNKNOWN,
>
> Any reason for this extra state? I think we can kno
According to the last comment, the problem seems to be fixed since QEMU
4.2, right? ... so I'm closing this ticket now. If there is still
something left to do, please open again.
** Changed in: qemu
Status: New => Fix Released
--
You received this bug notification because you are a member
Hi,
> > and realize
> > already calls qemu_console_resize(), so how can adding a
> > call to resize here in reset cause the console surface to
> > be created any earlier than it already is ?
> >
> > I also don't understand how the GUI timer can call us before
> > the device is realized, given t
On Tue, Mar 23, 2021 at 02:06:36PM +0100, Igor Mammedov wrote:
> On Tue, 23 Mar 2021 14:33:28 +1100
> David Gibson wrote:
>
> > On Mon, Mar 22, 2021 at 01:06:53PM +0100, Paolo Bonzini wrote:
> > > On 22/03/21 07:39, David Gibson wrote:
> > > > > QEMU doesn't really keep track of "in flight" unp
** No longer affects: qemu
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1920784
Title:
qemu-system-ppc64le fails with kvm acceleration
Status in The Ubuntu-power-systems project:
In Progress
St
On Mon, Mar 29, 2021 at 09:49:06AM +0530, Ravi Bangoria wrote:
> As per the PAPR, bit 0 of byte 64 in pa-features property indicates
> availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
> DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability to
> find whether kvm supports
On Thu, Mar 25, 2021 at 02:50:39PM +0100, BALATON Zoltan wrote:
> Hello,
>
> This is adding a new PPC board called pegasos2. More info on it can be
> found at:
>
> https://osdn.net/projects/qmiga/wiki/SubprojectPegasos2
>
> Currently it needs a firmware ROM image that I cannot include due to
> o
On Thu, Mar 25, 2021 at 09:56:04AM +0100, Cédric Le Goater wrote:
> On 3/25/21 3:10 AM, David Gibson wrote:
> > On Tue, Mar 23, 2021 at 02:21:33PM -0300, Daniel Henrique Barboza wrote:
> >>
> >>
> >> On 3/22/21 10:03 PM, David Gibson wrote:
> >>> On Fri, Mar 19, 2021 at 03:34:52PM -0300, Daniel Hen
On Fri, Mar 26, 2021 at 01:27:25AM +0100, Philippe Mathieu-Daudé wrote:
> The previous commit removed the mapping code from TYPE_PFLASH_CFI02.
> pflash_cfi02_register() doesn't use the 'nb_mappings' argument
> anymore. Simply remove it to simplify.
>
> Signed-off-by: Philippe Mathieu-Daudé
Revie
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros and variables used by Qemu.
One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel
uapi header and thus not changed in kernel as well as Qemu.
Signed-off-by: Ravi Bangoria
---
incl
On Fri, Mar 26, 2021 at 01:27:24AM +0100, Philippe Mathieu-Daudé wrote:
> All boards calling pflash_cfi02_register() use nb_mappings=1,
> which does not do any mapping:
>
> $ git grep -wl pflash_cfi02_register hw/
> hw/arm/xilinx_zynq.c
> hw/block/pflash_cfi02.c
> hw/lm32/lm32_boards.c
>
Update against Linux 5.12-rc3
Signed-off-by: Ravi Bangoria
---
include/standard-headers/drm/drm_fourcc.h | 23 ++-
include/standard-headers/linux/input.h | 2 +-
include/standard-headers/rdma/vmw_pvrdma-abi.h | 7 ++
linux-headers/asm-generic/unistd.h | 4 +-
linu
As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability to
find whether kvm supports 2nd DAWR or not. If it's supported, allow
user to set the pa-feature bi
This series enables 2nd DAWR support on p10 qemu guest. 2nd
DAWR is new watchpoint added in Power10 processor. Kernel/kvm
patches are already in[1].
Patches apply fine on qemu/master branch (9e2e9fe3df9f).
v1:
https://lore.kernel.org/r/20200723104220.314671-1-ravi.bango...@linux.ibm.com
[Apologi
在 2021/3/29 上午11:03, Brad Smith 写道:
It very much is correct. We don't care about such releases anymore.
So is there a doc/wiki to say Qemu doesn't support those OpenBSD release?
Thanks
On March 28, 2021 10:24:51 p.m. Jason Wang wrote:
在 2021/3/27 上午7:49, Brad Smith 写道:
OpenBSD added
在 2021/3/27 上午5:16, Dongli Zhang 写道:
Hi Jason,
On 3/26/21 12:24 AM, Jason Wang wrote:
在 2021/3/26 下午1:44, Dongli Zhang 写道:
The virtio device/driver (e.g., vhost-scsi or vhost-net) may hang due to
the loss of doorbell kick, e.g.,
https://urldefense.com/v3/__https://lists.gnu.org/archive/html
Use target_ulong to instead of uint64_t on reset vector address
to adapt on both 32/64 machine.
Signed-off-by: Dylan Jhong
Signed-off-by: Ruinland ChuanTzu Tsai
---
target/riscv/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
ind
On 25/03/2021 15:40, Alexey Kardashevskiy wrote:
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and the hypervisor.
Since the beginning, the runtime compon
Use target_ulong to instead of uint64_t on reset vector address
to adapt on both 32/64 machine.
Signed-off-by: Dylan Jhong
Signed-off-by: Ruinland ChuanTzu Tsai
---
target/riscv/cpu.c | 5 +++--
target/riscv/cpu.h | 2 +-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/ris
Add some more regression tests for the esp device.
(Prasad's Patch)
Based-on: <161657108250.32717.5311086901810004029.mal...@soybean.canonical.com>
(Mark's v2 Patchset)
Based-on: <20210317230223.24854-1-mark.cave-ayl...@ilande.co.uk>
Signed-off-by: Alexander Bulekov
---
Hi Mark,
Hopefully these
It very much is correct. We don't care about such releases anymore.
On March 28, 2021 10:24:51 p.m. Jason Wang wrote:
在 2021/3/27 上午7:49, Brad Smith 写道:
OpenBSD added support for tap(4) 10 releases ago.
Remove the special casing for older releases.
Signed-off-by: Brad Smith
diff --git a/
On Mon, Mar 29, 2021 at 10:20 AM Jason Wang wrote:
>
> Commit 969e50b61a28 ("net: Pad short frames to minimum size before
> sending from SLiRP/TAP") tries to pad frames but try to recyle the
> local array that is used for padding to tap thread. This patch fixes
> this by recyling the original buff
在 2021/3/27 上午7:49, Brad Smith 写道:
OpenBSD added support for tap(4) 10 releases ago.
Remove the special casing for older releases.
Signed-off-by: Brad Smith
diff --git a/net/tap-bsd.c b/net/tap-bsd.c
index 77aaf674b1..59dfcdfae0 100644
--- a/net/tap-bsd.c
+++ b/net/tap-bsd.c
@@ -35,10 +35,
Commit 969e50b61a28 ("net: Pad short frames to minimum size before
sending from SLiRP/TAP") tries to pad frames but try to recyle the
local array that is used for padding to tap thread. This patch fixes
this by recyling the original buffer.
Fixes: 969e50b61a28 ("net: Pad short frames to minimum si
> -Original Message-
> From: Dr. David Alan Gilbert
> Sent: Wednesday, March 24, 2021 7:02 PM
> To: Zhang, Chen
> Cc: Jason Wang ; qemu-dev de...@nongnu.org>; Eric Blake ; Markus Armbruster
> ; Li Zhijian ; Zhang Chen
> ; Lukas Straub
> Subject: Re: [PATCH V4 5/7] net/colo-compare: M
Patchew URL:
https://patchew.org/QEMU/20210328205726.1330291-1-vinc...@bernat.ch/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210328205726.1330291-1-vinc...@bernat.ch
Subject: [RFC v1] hw/smbios: support for type
Type 41 defines the attributes of devices that are onboard. The
original intent was to imply the BIOS had some level of control over
the enablement of the associated devices.
If network devices are present in this table, by default, udev will
name the corresponding interfaces enoX, X being the ins
On 3/26/21 1:35 PM, Claudio Fontana wrote:
Here a new version of the series that enables kvm-only builds.
The goal here is to enable the KVM-only build, but there is
some additional cleanup too.
In this iteration I mostly fixed existing issues, and added an attempt
to put more content in cpu-sv
On 3/26/21 1:37 PM, Claudio Fontana wrote:
+#ifdef CONFIG_TCG
if (arm_feature(env, ARM_FEATURE_M)) {
return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure);
}
+#endif /* CONFIG_TCG */
Better done with tcg_enabled.
r~
On 3/26/21 1:37 PM, Claudio Fontana wrote:
modules under tcg/ are only built for CONFIG_TCG anyway.
Signed-off-by: Claudio Fontana
---
target/arm/tcg/vfp_helper.c | 6 --
1 file changed, 6 deletions(-)
Reviewed-by: Richard Henderson
r~
On 3/28/21 1:12 PM, Richard Henderson wrote:
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+++ b/target/arm/monitor.c
@@ -184,9 +184,11 @@ CpuModelExpansionInfo
*qmp_query_cpu_model_expansion(CpuModelExpansionType type,
if (!err) {
visit_check_struct(visitor, &err);
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+++ b/target/arm/monitor.c
@@ -184,9 +184,11 @@ CpuModelExpansionInfo
*qmp_query_cpu_model_expansion(CpuModelExpansionType type,
if (!err) {
visit_check_struct(visitor, &err);
}
+#ifdef TARGET_AARCH64
if (!err
On 3/26/21 1:36 PM, Claudio Fontana wrote:
use a canonical module prefix followed by the get_zcr_len_for_el()
method name. Also rename the static internal auxiliary function,
where the module prefix is not necessary.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sve.h | 2 +-
target/a
On 3/26/21 1:36 PM, Claudio Fontana wrote:
Pointer Authentication is an AARCH64-only ARMv8.3 optional
extension, whose cpu properties can be separated out in its own module.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h | 3 --
target/arm/tcg/cpu-pauth.h | 34
On 3/26/21 1:36 PM, Claudio Fontana wrote:
now that we handled the dependency between HELPER(), cpregs defs
and functions in tcg/,
we can make sve_zcr_len_for_el TARGET_AARCH64-only,
and move it to the cpu-sve module.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sve.h| 3 +++
targe
On 3/28/21 12:34 PM, Richard Henderson wrote:
On 3/26/21 1:36 PM, Claudio Fontana wrote:
@@ -1084,6 +1084,8 @@ static uint32_t rebuild_hflags_a32(CPUARMState *env,
int fp_el,
return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
}
+#ifdef TARGET_AARCH64
+
static uint32_t rebuil
Patchew URL:
https://patchew.org/QEMU/20210328184533.752840-1-marcandre.lur...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210328184533.752840-1-marcandre.lur...@redhat.com
Subject: [PULL 00/10] For 6.
On 3/26/21 1:36 PM, Claudio Fontana wrote:
make them canonical for the module name.
Signed-off-by: Claudio Fontana
---
target/arm/tcg/tcg-sve.h | 4 ++--
linux-user/syscall.c | 2 +-
target/arm/cpu-exceptions-aa64.c | 2 +-
target/arm/tcg/cpregs.c | 2 +-
targe
From: Lukas Straub
Add tests for yank with the chardev-change case.
Signed-off-by: Lukas Straub
Reviewed-by: Marc-André Lureau
Tested-by: Li Zhang
Message-Id:
<7c2f1ddcaa1c97462cb0b834d5aa7368283aa67d.1616794852.git.lukasstra...@web.de>
---
tests/unit/test-yank.c | 200 +
From: Lukas Straub
Always pass the id to chardev_new, since it is needed to register
the yank instance for the chardev. Also, after checking that
nothing calls chardev_new with id=NULL, assert() that id!=NULL.
This fixes a crash when using chardev-change to change a chardev
to chardev-socket, wh
On 3/26/21 1:36 PM, Claudio Fontana wrote:
aarch64_sve_narrow_vq and aarch64_sve_change_el are SVE-related
functions only used for TCG, so we can put them in the
tcg-sve.c module.
Extra whitespace.
+/* tcg/helper.c */
+
+void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
+
+void aarc
From: Lukas Straub
Remove dependency on qiochannel by removing yank_generic_iochannel and
letting migration and chardev use their own yank function for
iochannel.
Signed-off-by: Lukas Straub
Reviewed-by: Marc-André Lureau
Message-Id:
<20ff143fc2db23e27cd41d38043e481376c9cec1.1616521341.git.lu
From: Lukas Straub
When changing from chardev-socket (which supports yank) to
chardev-socket again, it fails, because the new chardev attempts
to register a new yank instance. This in turn fails, as there
still is the yank instance from the current chardev. Also,
the old chardev shouldn't unregis
From: Lukas Straub
Yank now only depends on util and can be always linked in. Also remove
the stubs as they are not needed anymore.
Signed-off-by: Lukas Straub
Reviewed-by: Marc-André Lureau
Message-Id:
<997aa12a28c555d8a3b7a363b3bda5c3cf1821ba.1616521341.git.lukasstra...@web.de>
---
stubs/y
On 3/26/21 1:36 PM, Claudio Fontana wrote:
restrict zcr_el1, zcr_el2, zcr_no_el2, zcr_el3 reginfo,
and the related SVE functions to TARGET_AARCH64.
Signed-off-by: Claudio Fontana
---
target/arm/tcg/cpregs.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
Reviewed-by: Richard H
From: Priyankar Jain
This commit fixes an issue where migration is failing in the load phase
because of a false alarm about data unavailability.
Following is the error received when the amount of data to be transferred
exceeds the default buffer size setup by G_BUFFERED_INPUT_STREAM(4KiB),
even
From: Lukas Straub
Move object_property_try_add_child out of chardev_new into it's
callers. This is a preparation for the next patches to fix yank
with the chardev-change case.
Signed-off-by: Lukas Straub
Reviewed-by: Marc-André Lureau
Tested-by: Li Zhang
Message-Id:
---
chardev/char.c | 4
From: Marc-André Lureau
Now that we merged into one doc, it makes the nav looks nicer.
Signed-off-by: Marc-André Lureau
Message-Id: <20210323074704.4078381-1-marcandre.lur...@redhat.com>
Reviewed-by: Daniel P. Berrangé
Reviewed-by: John Snow
---
docs/devel/index.rst | 4 ++--
docs/interop/
From: Marc-André Lureau
The default "alabaster" sphinx theme has a couple shortcomings:
- the navbar moves along the page
- the search bar is not always at the same place
- it lacks some contrast and colours
The "rtd" theme from readthedocs.org is a popular third party theme used
notably by the
From: Marc-André Lureau
g_hash_table_add always retains ownership of the pointer passed in as
the key. Its return status merely indicates whether the added entry was
new, or replaced an existing entry. Thus key must never be freed after
this method returns.
Spotted by ASAN:
==2407186==ERROR: Ad
From: Marc-André Lureau
The following changes since commit 7b9a3c9f94bcac23c534bc9f42a9e914b433b299:
Merge remote-tracking branch
'remotes/kraxel/tags/fixes-20210326-pull-request' into staging (2021-03-26
12:58:58 +)
are available in the Git repository at:
g...@gitlab.com:marcandre.l
On 3/26/21 1:36 PM, Claudio Fontana wrote:
extract the exception handling code from cpu-sysemu,
and split it into general arm code and an AArch64-specific part.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-exceptions-aa64.h | 32 +
target/arm/cpu.h | 4 -
target/arm/a
On 3/26/21 1:36 PM, Claudio Fontana wrote:
this will allow us to restrict more code to TARGET_AARCH64
Signed-off-by: Claudio Fontana
---
target/arm/arch_dump.c | 12 +++-
target/arm/cpu.c | 1 -
target/arm/cpu64.c | 4
3 files changed, 11 insertions(+), 6 deletions(
On 3/26/21 1:36 PM, Claudio Fontana wrote:
@@ -1084,6 +1084,8 @@ static uint32_t rebuild_hflags_a32(CPUARMState *env, int
fp_el,
return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
}
+#ifdef TARGET_AARCH64
+
static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+#define is_a64(env) (false)
...
+#define arm_el_is_aa64(env, el) (false)
Late reply to the v11 thread: 'use" the arguments here by casting them to void.
Then you don't need the other changes you make merely to avoid unused variables.
r~
Patchew URL: https://patchew.org/QEMU/20210328180135.88449-1-...@ghgsat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210328180135.88449-1-...@ghgsat.com
Subject: [PATCH] linux-user: NETLINK_LIST_MEMBERSHIPS: Al
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+++ b/target/arm/kvm/kvm-sve.h
@@ -0,0 +1,30 @@
+/*
+ * QEMU AArch64 CPU SVE KVM interface
+ *
+ * Copyright 2021 SUSE LLC
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directo
getsockopt(fd, SOL_NETLINK, NETLINK_LIST_MEMBERSHIPS, *optval, *optlen)
syscall allows optval to be NULL/invalid if optlen points to a size of
zero. This allows userspace to query the length of the array they should
use to get the full membership list before allocating memory for said
list, then re
On 3/26/21 1:36 PM, Claudio Fontana wrote:
extract the SVE-related cpu object properties and functions,
and move them to a separate module.
Disentangle SVE from pauth that is a separate, TCG-only feature.
Nit: pauth is not tcg-only, but the properties selecting the pauth hash are tcg
only. F
On 3/26/21 1:36 PM, Claudio Fontana wrote:
we need to be careful not to use
if (tcg_enabled())
here, because of the VMSTATE definitions in machine.c,
which are only protected by CONFIG_TCG, and thus
it would break the --enable-tcg --enable-kvm build.
Signed-off-by: Claudio Fontana
---
target
On 3/26/21 1:36 PM, Claudio Fontana wrote:
move init, realizefn and reset code into it.
Signed-off-by: Claudio Fontana
Cc: Paolo Bonzini
---
target/arm/tcg/tcg-cpu.h| 4 ++-
target/arm/cpu.c| 44 ++
target/arm/tcg/sysemu/tcg-cpu.c | 27 +++
On 3/26/21 1:36 PM, Claudio Fontana wrote:
Signed-off-by: Claudio Fontana
---
target/arm/cpu.c | 4
target/arm/kvm/kvm-cpu.c | 1 +
2 files changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Richard Henderson
r~
On 3/26/21 1:36 PM, Claudio Fontana wrote:
move init, realizefn and reset code into it.
Signed-off-by: Claudio Fontana
---
target/arm/internals.h | 1 -
target/arm/cpu-sysemu.c| 32 --
target/arm/cpu.c | 48 ++
target/arm/kvm/kvm-cpu.c | 128
** Attachment added: "am53c974 disk with the corresponding ASPI driver enabled."
https://bugs.launchpad.net/qemu/+bug/1921635/+attachment/5481637/+files/am53c974_aspi.img
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bug
Something maybe worth noting is that the DC390 driver detectes attached
CDROM drives as 'Fixed Disks' which seems a little fishy. The same
appears to happen with the lsilogic card (that is cdrom drives get
detected as hard drives and causes a failure to load the drivers)
--
You received this bug
** Attachment added: "dc390 dos bootdisk with only disk drivers enabled"
https://bugs.launchpad.net/qemu/+bug/1921635/+attachment/5481640/+files/dc390_disk.img
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad
** Attachment added: "dc390 dos bootdisk with only cd drivers enabled"
https://bugs.launchpad.net/qemu/+bug/1921635/+attachment/5481639/+files/dc390_cd.img
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net
On 3/26/21 1:36 PM, Claudio Fontana wrote:
This reverts commit 6e937ba7f8fb90d66cb3781f7fed32fb4239556a
This change breaks quickly at startup, as all interfaces in boards
are checked in vl.c in select_machine():
{
GSList *machines = object_class_get_list(TYPE_MACHINE, false);
}
In order to r
Public bug reported:
I have been trying to install the DOS ASPI drivers for the ESP scsi
card. Both in am53c974 and dc390 modes. Neither works but they don't
work in different ways.
The following things appear to be problematic:
* The am53c974 should work with the PcSCSI drivers (AMSIDA.SYS) but
** Attachment added: "dc390 dos bootdisk with all drivers enabled"
https://bugs.launchpad.net/qemu/+bug/1921635/+attachment/5481638/+files/dc390_all.img
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bu
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+#ifndef CONFIG_TCG
+{
+const char *arch = qtest_get_arch();
+
+if (strcmp(arch, "arm") == 0 || strcmp(arch, "aarch64") == 0) {
+add_machine_test_case("virt");
+goto add_machine_test_done;
+}
+}
+#e
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+#ifndef CONFIG_TCG
+{
+const char *arch = qtest_get_arch();
+if (strcmp(arch, "arm") == 0 || strcmp(arch, "aarch64") == 0) {
+goto add_machine_test_done;
+}
+}
+#endif /* !CONFIG_TCG */
if (g_test_quick(
On 3/26/21 1:36 PM, Claudio Fontana wrote:
on ARM we currently list and build all machines, even when
building KVM-only, without TCG.
Until we fix this (and we only list and build machines that are
compatible with KVM), only test specifically using the "virt"
machine in this case.
Signed-off-by
On 3/26/21 1:36 PM, Claudio Fontana wrote:
sve_tests_sve_max_vq_8,
sve_tests_sve_off,
test_query_cpu_model_expansion
The final two confused me before I realized there are separate tests for kvm.
I think we should rename them to *_tcg, so that it's clearer next to the kvm
brothers.
+#ifndef
On 3/26/21 1:36 PM, Claudio Fontana wrote:
test is TCG-only.
Signed-off-by: Claudio Fontana
Cc: Philippe Mathieu-Daudé
---
tests/qtest/bios-tables-test.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index e020c83d
On 3/26/21 1:36 PM, Claudio Fontana wrote:
the functions used in machine.c are now protected via
if (kvm_enabled()), so the stub is not needed.
Signed-off-by: Claudio Fontana
---
target/arm/kvm-stub.c | 24
1 file changed, 24 deletions(-)
delete mode 100644 target/a
On 3/26/21 1:36 PM, Claudio Fontana wrote:
@@ -638,24 +638,21 @@ static int cpu_pre_save(void *opaque)
if (tcg_enabled()) {
pmu_op_start(&cpu->env);
+if (!write_cpustate_to_list(cpu, false)) {
+/* This should never fail. */
+abort();
+}
On 3/26/21 1:36 PM, Claudio Fontana wrote:
cpu.c,
cpu32.c,
cpu64.c,
tcg/sysemu/tcg-cpu.c,
all need a good cleanup when it comes to included header files.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.c| 8 ++--
target/arm/cpu32.c | 14 --
ta
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+++ b/MAINTAINERS
@@ -398,7 +398,7 @@ ARM KVM CPUs
M: Peter Maydell
L:qemu-...@nongnu.org
S: Maintained
-F: target/arm/kvm.c
+F: target/arm/kvm/kvm.c
Reminder for a different patch: this line should probably become
F: target/arm/kvm/
r~
On 3/26/21 1:36 PM, Claudio Fontana wrote:
and adapt the code including the header references,
and trace-events / trace.h
Signed-off-by: Claudio Fontana
---
Reviewed-by: Richard Henderson
r~
On 3/26/21 1:36 PM, Claudio Fontana wrote:
move the module containing cpu models definitions
for 32bit TCG-only CPUs to tcg/ and rename it for clarity.
Signed-off-by: Claudio Fontana
---
target/arm/{cpu_tcg.c => tcg/tcg-cpu-models.c} | 9 +
target/arm/meson.build
On 3/26/21 1:36 PM, Claudio Fontana wrote:
move the TCGCPUOps interface to tcg/tcg-cpu.c
in preparation for the addition of the TCG accel-cpu class.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h | 1 -
target/arm/internals.h | 5 -
target/arm/tcg/tcg-cpu.h | 6 +
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+#ifdef CONFIG_TCG
+arm_rebuild_hflags(env);
+#endif /* CONFIG_TCG */
No functional changes during code movement.
Really.
I cannot emphasize this enough.
Also, why is this an ifdef and not tcg_enabled()?
+aarch64_restore_sp(env, new_el);
+#i
On 3/26/21 1:36 PM, Claudio Fontana wrote:
before refactoring the exception code, fix the style of the
functions being moved.
Signed-off-by: Claudio Fontana
---
target/arm/tcg/helper.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
Reviewed-by: Richard Henderson
On 3/26/21 1:36 PM, Claudio Fontana wrote:
+int fp_exception_el(CPUARMState *env, int cur_el)
+{
+return 0;
+}
Oh, I'm pretty sure this should be identical with sve_exception_el, where the
fpu may or may not be enabled for a given cpu state (e.g. lazy fpu switching in
the kvm guest kernel
On 3/26/21 1:36 PM, Claudio Fontana wrote:
before moving over sve_exception_el from the helper code,
cleanup the style.
Signed-off-by: Claudio Fontana
---
target/arm/tcg/helper.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson
r~
On 3/26/21 1:36 PM, Claudio Fontana wrote:
provide helper functions there to initialize 32bit models,
and export the a15 cpu model.
We still need to keep around a15 until we sort out the board configurations.
cpu.c will continue to contain the common parts between
32 and 64.
Note that we need
On 3/26/21 1:36 PM, Claudio Fontana wrote:
this function is used for kvm too, add it to the
cpu-common module.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 15 +++
target/arm/tcg/helper.c | 11 ---
2 files changed, 15 insertions(+), 11 deletions(-)
diff
On 3/26/21 1:36 PM, Claudio Fontana wrote:
cpu-vfp.c: vfp_get_fpsr and vfp_set_fpsr are needed also for KVM,
so create a new cpu-vfp.c
tcg/cpu-vfp.c: vfp_get_fpscr_from_host and vv are TCG-only, so we
move the implementation to tcg/cpu-vfp.c
Signed-off-by: Claudio Fo
From: Andreas Krebbel
When setting up the pointer for the sigreturn stub in the return
address register (r14) we currently use the host frame address instead
of the guest frame address.
Note: This only caused problems if Qemu has been built with
--disable-pie (as it is in distros nowadays). Othe
From: Zach Reizner
The kernel allows a NULL msg in recvfrom so that he size of the next
message may be queried before allocating a correctly sized buffer. This
change allows the syscall translator to pass along the NULL msg pointer
instead of returning early with EFAULT.
Signed-off-by: Zach Reiz
4a1e6bce2308b720d79d5ea0a3d24501c89bd80c:
linux-user: allow NULL msg in recvfrom (2021-03-27 16:48:45 +0100)
linux-user pull request 20210328
- Fix recvfrom with NULL msg
- Fix sigreturn address on s390x
On 3/26/21 1:36 PM, Claudio Fontana wrote:
we will need this for KVM too, especially for Nested support.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 68 +
target/arm/tcg/helper.c | 68 -
2 files
On 3/26/21 1:36 PM, Claudio Fontana wrote:
this should go away once the configuration and hw/arm is clean
Signed-off-by: Claudio Fontana
---
hw/arm/boot.c | 5 -
target/arm/arm-powerctl.c | 8 +---
target/arm/tcg/helper-stubs.c | 5 +
3 files changed, 14 inse
On Sun, Mar 28, 2021 at 1:48 AM Thomas Huth wrote:
>
> Many files include qemu/log.h without needing it. Remove the superfluous
> include statements.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/arm/aspeed.c | 1 -
> hw/arm/aspeed_ast26
On 3/26/21 1:36 PM, Claudio Fontana wrote:
we need as a result to move switch_mode too,
so we put an implementation into cpu_user and cpu_sysemu.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h| 2 +
target/arm/cpu-common.c | 192 +++
target/arm/
On 3/26/21 1:36 PM, Claudio Fontana wrote:
the armv7m one should go away with proper
configuration changes (only enabling possible boards for KVM).
Signed-off-by: Claudio Fontana
---
target/arm/tcg/helper-stubs.c | 21 +
target/arm/tcg/meson.build| 3 +++
2 files cha
On 3/26/21 1:36 PM, Claudio Fontana wrote:
give them their own common module cpregs.c, and an interface cpregs.h.
Extract the raw cpustate list to its own module.
This is more or less needed for KVM too.
For the tcg-specific registers, stuff them into tcg/cpregs.c
As a result, the monster that
On 3/26/21 1:36 PM, Claudio Fontana wrote:
in preparation of the creation of a new cpregs module,
fix the style for the to-be-exported code.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h| 54 ---
target/arm/tcg/helper.c | 313 ++--
2 fil
1 - 100 of 105 matches
Mail list logo
