John Snow writes:
> On Tue, Apr 5, 2022, 5:03 AM Damien Hedde
> wrote:
[...]
>> If it stays in QEMU tree, what licensing should I use ? LGPL does not
>> hurt, no ?
>>
>
> Whichever you please. GPLv2+ would be convenient and harmonizes well with
> other tools. LGPL is only something I started
There are error paths which do not initialize propname but the trace_exit
label prints it anyway. This initializes the problem string.
Spotted by Coverity CID 1487241.
Signed-off-by: Alexey Kardashevskiy
---
hw/ppc/vof.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
> From: Jason Wang
> Sent: Wednesday, April 6, 2022 11:33 AM
> To: Tian, Kevin
> Cc: Liu, Yi L ; m...@redhat.com; pet...@redhat.com;
> yi.y@linux.intel.com; qemu-devel@nongnu.org
> Subject: Re: [PATCH V2 1/4] intel-iommu: don't warn guest errors when
> getting rid2pasid entry
>
> On Sat,
On Sat, Apr 2, 2022 at 3:34 PM Tian, Kevin wrote:
>
> > From: Jason Wang
> > Sent: Wednesday, March 30, 2022 4:37 PM
> > On Wed, Mar 30, 2022 at 4:16 PM Tian, Kevin wrote:
> > >
> > > > From: Jason Wang
> > > > Sent: Tuesday, March 29, 2022 12:52 PM
> > > > >
> > > > >>>
> > > > >>> Currently
On Sat, Apr 2, 2022 at 3:27 PM Tian, Kevin wrote:
>
> > From: Jason Wang
> > Sent: Wednesday, March 30, 2022 4:32 PM
> >
> > >
> > > >
> > > > > If there is certain fault
> > > > > triggered by a request with PASID, we do want to report this
> > information
> > > > > upward.
> > > >
> > > > I
On Sat, Apr 2, 2022 at 3:24 PM Tian, Kevin wrote:
>
> > From: Jason Wang
> > Sent: Wednesday, March 30, 2022 4:32 PM
> >
> > On Wed, Mar 30, 2022 at 4:02 PM Tian, Kevin wrote:
> > >
> > > > From: Jason Wang
> > > > Sent: Tuesday, March 29, 2022 12:49 PM
> > > >
> > > > On Mon, Mar 28, 2022 at
在 2022/4/5 下午2:36, Eugenio Pérez 写道:
These functions were not traced properly.
Signed-off-by: Eugenio Pérez
Acked-by: Jason Wang
---
hw/virtio/vhost-vdpa.c | 2 ++
hw/virtio/trace-events | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/virtio/vhost-vdpa.c
On 4/1/2022 7:20 PM, Jason Wang wrote:
Adding Michael.
On Sat, Apr 2, 2022 at 7:08 AM Si-Wei Liu wrote:
On 3/31/2022 7:53 PM, Jason Wang wrote:
On Fri, Apr 1, 2022 at 9:31 AM Michael Qiu wrote:
Currently, when VM poweroff, it will trigger vdpa
device(such as mlx bluefield2 VF) reset
On Thu, Mar 10, 2022 at 10:09:09PM +0800, Chao Peng wrote:
> KVM gets notified when memory pages changed in the memory backing store.
> When userspace allocates the memory with fallocate() or frees memory
> with fallocate(FALLOC_FL_PUNCH_HOLE), memory backing store calls into
> KVM
On 4/1/2022 7:10 PM, Jason Wang wrote:
On Sat, Apr 2, 2022 at 6:32 AM Si-Wei Liu wrote:
On 3/31/2022 1:39 AM, Jason Wang wrote:
On Wed, Mar 30, 2022 at 11:48 PM Si-Wei Liu wrote:
On 3/30/2022 2:00 AM, Jason Wang wrote:
On Wed, Mar 30, 2022 at 2:33 PM Si-Wei Liu wrote:
With MQ
The bootrom is a minimal bootrom that can be used to bring up
an NPCM845 Linux kernel. Its source code can be found at
github.com/google/vbootrom/tree/master/npcm8xx
Signed-off-by: Hao Wu
Reviwed-by: Titus Rwantare
---
pc-bios/npcm8xx_bootrom.bin | Bin 0 -> 608 bytes
1 file changed, 0
Signed-off-by: Hao Wu
Reviwed-by: Patrick Venture
---
hw/arm/meson.build | 2 +-
hw/arm/npcm8xx_boards.c | 257 +++
include/hw/arm/npcm8xx.h | 20 +++
3 files changed, 278 insertions(+), 1 deletion(-)
create mode 100644 hw/arm/npcm8xx_boards.c
NPCM8XX boot block stores the DRAM size in SCRPAD_B register in GCR
module. Since we don't simulate a detailed memory controller, we
need to store this information directly similar to the NPCM7XX's
INCTR3 register.
Signed-off-by: Hao Wu
Reviwed-by: Titus Rwantare
---
hw/misc/npcm_gcr.c
The PCS exists in NPCM8XX's GMAC1 and is used to control the SGMII
PHY. This implementation contains all the default registers and
the soft reset feature that are required to load the Linux kernel
driver. Further features have not been implemented yet.
Signed-off-by: Hao Wu
Reviewed-by: Titus
The NPCM8xx GCR device can be accessed with 64-bit memory operations.
This patch supports that.
Signed-off-by: Hao Wu
Reviewed-by: Patrick Venture
---
hw/misc/npcm_gcr.c | 98 +---
hw/misc/trace-events | 4 +-
2 files changed, 77 insertions(+), 25
This property allows certain boards like NPCM8xx to boot the kernel
directly into non-secure mode. This is necessary since we do not
support secure boot features for NPCM8xx now.
Signed-off-by: Hao Wu
Reviewed-by: Patrick Venture
---
hw/intc/arm_gic_common.c | 2 ++
1 file changed, 2
NPCM8XX has a different set of global control registers than 7XX.
This patch supports that.
Signed-off-by: Hao Wu
Reviwed-by: Titus Rwantare
---
MAINTAINERS | 9 +-
hw/misc/meson.build | 2 +-
hw/misc/npcm7xx_gcr.c
NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core
Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals.
Signed-off-by: Hao Wu
Reviewed-by: Patrick Venture
---
docs/system/arm/nuvoton.rst | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
NPCM8XX adds a few new registers and have a different set of reset
values to the CLK modules. This patch supports them.
This patch doesn't support the new clock values generated by these
registers. Currently no modules use these new clock values so they
are not necessary at this point.
The file contains a basic NPCM8XX SOC file. It's forked
from the NPCM7XX SOC with some changes.
Signed-off-by: Hao Wu
Reviwed-by: Patrick Venture
Reviwed-by: Titus Rwantare
---
configs/devices/aarch64-softmmu/default.mak | 1 +
hw/arm/Kconfig | 11 +
This allows different FIUs to have different flash sizes, useful
in NPCM8XX which has multiple different sized FIU modules.
Signed-off-by: Hao Wu
Reviewed-by: Patrick Venture
---
hw/arm/npcm7xx.c | 6 ++
hw/ssi/npcm7xx_fiu.c | 6 ++
include/hw/ssi/npcm7xx_fiu.h | 1
NPCM8XX BMCs are the successors of the NPCM7XX BMCs. They feature
quad-core ARM Cortex A35 that supports both 32 bits and 64 bits
operations. This patch set aims to support basic functionalities
of the NPCM7XX BMCs. The patch set includes:
1. We derive most devices from the 7XX models and
made
05.04.2022 17:41, Kevin Wolf wrote:
Am 05.04.2022 um 14:12 hat Vladimir Sementsov-Ogievskiy geschrieben:
Thanks Kevin! I have already run out of arguments in the battle
against using subtree-drains to isolate graph modification operations
from each other in different threads in the mailing
On Tue, Apr 05, 2022 at 08:06:58PM +0100, Dr. David Alan Gilbert (git) wrote:
The patch is fine but pls repost as text not as
application/octet-stream.
Thanks!
--
MST
On Tue, 5 Apr 2022 20:06:58 +0100
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> The 'acpi_index' field is a statically configured field, which for
> some reason is migrated; this never makes much sense because it's
> command line static.
>
> However, on piix4
> On Mar 31, 2022, at 9:57 AM, Klaus Jensen wrote:
>
> From: Klaus Jensen
>
> Hi all,
>
> This RFC series adds I2C "slave mode" support for the Aspeed I2C
> controller as well as the necessary infrastructure in the i2c core to
> support this.
>
> Background
> ~~
> We are working on
spapr_nvdimm_flush_completion_cb() and flush_worker_cb() are using the
DRC object returned by spapr_drc_index() without checking it for NULL.
In this case we would be dereferencing a NULL pointer when doing
SPAPR_NVDIMM(drc->dev) and PC_DIMM(drc->dev).
This can happen if, during a scm_flush(),
Hi,
This is a simple patch to fix 2 Coverity issues in
hw/ppc/spapr_nvdimm.c. Aiming it to 7.1 because it's not critical enough
for 7.0.
Daniel Henrique Barboza (1):
hw/ppc: check if spapr_drc_index() returns NULL in spapr_nvdimm.c
hw/ppc/spapr_nvdimm.c | 26 ++
1
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
vmodsw: Vector Modulo Signed Word
vmoduw: Vector Modulo Unsigned Word
vmodsd: Vector Modulo Signed Doubleword
vmodud: Vector Modulo Unsigned Doubleword
Signed-off-by: Lucas Mateus Castro (alqotel)
---
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
vmodsq: Vector Modulo Signed Quadword
vmoduq: Vector Modulo Unsigned Quadword
Signed-off-by: Lucas Mateus Castro (alqotel)
---
target/ppc/helper.h | 2 ++
target/ppc/insn32.decode
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
vdivesd: Vector Divide Extended Signed Doubleword
vdiveud: Vector Divide Extended Unsigned Doubleword
vdivesq: Vector Divide Extended Signed Quadword
vdiveuq: Vector Divide Extended Unsigned Quadword
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
vdivesw: Vector Divide Extended Signed Word
vdiveuw: Vector Divide Extended Unsigned Word
Signed-off-by: Lucas Mateus Castro (alqotel)
---
target/ppc/insn32.decode| 3 ++
From: "Lucas Mateus Castro (alqotel)"
Based on already existing QEMU implementation, created an unsigned 256
bit by 128 bit division needed to implement the vector divide extended
unsigned instruction from PowerISA3.1
Signed-off-by: Lucas Mateus Castro (alqotel)
---
include/qemu/host-utils.h
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
vdivsw: Vector Divide Signed Word
vdivuw: Vector Divide Unsigned Word
vdivsd: Vector Divide Signed Doubleword
vdivud: Vector Divide Unsigned Doubleword
Signed-off-by: Lucas Mateus Castro (alqotel)
---
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
vdivsq: Vector Divide Signed Quadword
vdivuq: Vector Divide Unsigned Quadword
Signed-off-by: Lucas Mateus Castro (alqotel)
---
target/ppc/helper.h | 2 ++
target/ppc/insn32.decode
From: Matheus Ferst
Implement an unsigned right shift for Int128 values and add the same
tests cases of int128_rshift in the unit test.
Signed-off-by: Matheus Ferst
Signed-off-by: Lucas Mateus Castro (alqotel)
---
include/qemu/int128.h| 19 +++
tests/unit/test-int128.c |
From: "Lucas Mateus Castro (alqotel)"
Based on already existing QEMU implementation created a signed
256 bit by 128 bit division needed to implement the vector divide
extended signed quadword instruction from PowerISA 3.1
Signed-off-by: Lucas Mateus Castro (alqotel)
Reviewed-by: Richard
From: "Lucas Mateus Castro (alqotel)"
This patch series is an implementation of the vector divide, vector
divide extended and vector modulo instructions from PowerISA 3.1
The first patch are Matheus' patch, used here since the divs256 and
divu256 functions use int128_urshift.
v2 changes:
-
On 4/1/22 00:40, David Gibson wrote:
On Thu, Mar 31, 2022 at 03:46:57PM -0300, Daniel Henrique Barboza wrote:
On 3/31/22 14:36, Richard Henderson wrote:
On 3/31/22 11:17, Daniel Henrique Barboza wrote:
Hmm... this is seeming a bit like whack-a-mole. Could we instead use
one of the
On 4/5/22 11:30, Peter Maydell wrote:
On Tue, 5 Apr 2022 at 14:07, Daniel Henrique Barboza
wrote:
There is a lot of Valgrind warnings about conditional jump depending on
unintialized values like this one (taken from a pSeries guest):
Conditional jump or move depends on uninitialised
On 4/1/2022 7:00 PM, Jason Wang wrote:
On Sat, Apr 2, 2022 at 4:37 AM Si-Wei Liu wrote:
On 3/31/2022 1:36 AM, Jason Wang wrote:
On Thu, Mar 31, 2022 at 12:41 AM Si-Wei Liu wrote:
On 3/30/2022 2:14 AM, Jason Wang wrote:
On Wed, Mar 30, 2022 at 2:33 PM Si-Wei Liu wrote:
Previous
binkkNQxjetjk.bin
Description: Binary data
On Tue, 5 Apr 2022 at 10:25, Paolo Bonzini wrote:
>
> The following changes since commit 20661b75ea6093f5e59079d00a778a972d6732c5:
>
> Merge tag 'pull-ppc-20220404' of https://github.com/legoater/qemu into
> staging (2022-04-04 15:48:55 +0100)
>
> are available in the Git repository at:
>
>
On Tue, Apr 05, 2022, Andy Lutomirski wrote:
> On Tue, Apr 5, 2022, at 3:36 AM, Quentin Perret wrote:
> > On Monday 04 Apr 2022 at 15:04:17 (-0700), Andy Lutomirski wrote:
> >> The best I can come up with is a special type of shared page that is not
> >> GUP-able and maybe not even mmappable,
Am 05/04/2022 um 19:53 schrieb Emanuele Giuseppe Esposito:
>
>
> Am 05/04/2022 um 17:04 schrieb Kevin Wolf:
>> Am 05.04.2022 um 15:09 hat Emanuele Giuseppe Esposito geschrieben:
>>> Am 05/04/2022 um 12:14 schrieb Kevin Wolf:
I think all of this is really relevant for Emanuele's work,
On Tue, Apr 5, 2022, 5:03 AM Damien Hedde
wrote:
>
>
> On 4/4/22 22:34, John Snow wrote:
> > On Wed, Mar 16, 2022 at 5:55 AM Damien Hedde
> wrote:
> >>
> >> It takes an input file containing raw qmp commands (concatenated json
> >> dicts) and send all commands one by one to a qmp server. When
On Tue, Apr 05, 2022, Quentin Perret wrote:
> On Monday 04 Apr 2022 at 15:04:17 (-0700), Andy Lutomirski wrote:
> > >> - it can be very useful for protected VMs to do shared=>private
> > >>conversions. Think of a VM receiving some data from the host in a
> > >>shared buffer, and then it
Am 05/04/2022 um 17:04 schrieb Kevin Wolf:
> Am 05.04.2022 um 15:09 hat Emanuele Giuseppe Esposito geschrieben:
>> Am 05/04/2022 um 12:14 schrieb Kevin Wolf:
>>> I think all of this is really relevant for Emanuele's work, which
>>> involves adding AIO_WAIT_WHILE() deep inside graph update
On Tue, Apr 5, 2022, at 3:36 AM, Quentin Perret wrote:
> On Monday 04 Apr 2022 at 15:04:17 (-0700), Andy Lutomirski wrote:
>>
>>
>> On Mon, Apr 4, 2022, at 10:06 AM, Sean Christopherson wrote:
>> > On Mon, Apr 04, 2022, Quentin Perret wrote:
>> >> On Friday 01 Apr 2022 at 12:56:50 (-0700),
Recommendation for comment?
/* vri-d encoding matches vrr for 4b imm.
.insn does not handle this encoding variant.
*/
Christian: I will push another patch version as soon as that's decided.
(unless you prefer to choose the comment and edit during staging)
On Tue, Apr 5, 2022 at 6:13 AM David
Hello Jamin,
On 4/1/22 10:38, Jamin Lin wrote:
Changes from v5:
- remove TYPE_ASPEED_MINIBMC_MACHINE and ASPEED_MINIBMC_MACHINE
- remove ast1030_machine_instance_init function
Changes from v4:
- drop the ASPEED_SMC_FEATURE_WDT_CONTROL flag in hw/ssi/aspeed_smc.c
Changes from v3:
- remove
On Tue, Apr 05, 2022 at 03:46:52PM +0200, Hanna Reitz wrote:
> Instead of fprint()-ing error messages in rebuild_refcount_structure()
> and its rebuild_refcounts_write_refblocks() helper, pass them through an
> Error object to qcow2_check_refcounts() (which will then print it).
>
> Suggested-by:
On Tue, Apr 5, 2022, 5:16 AM Damien Hedde
wrote:
>
>
> On 3/30/22 20:24, John Snow wrote:
> > The package is in an alpha state, but there's a method to the madness.
> >
> > Signed-off-by: John Snow
> > ---
> > README.rst | 21 +
> > 1 file changed, 21 insertions(+)
> >
>
Cornelia Huck writes:
> On Wed, Mar 16 2022, Alex Bennée wrote:
>
>> Cornelia Huck writes:
>>
>>> On Wed, Mar 09 2022, Alex Bennée wrote:
>
+Writing VirtIO backends for QEMU
+
+
+This document attempts to outline the information a
On 4/5/22 16:29, oxr...@gmx.us wrote:
From: Lucas Ramage
Buglink: https://gitlab.com/qemu-project/qemu/-/issues/527
Signed-off-by: Lucas Ramage
Provided 2 minors tweaks (see below: missing empty line, and empty line
at EOF),
Reviewed-by: Damien Hedde
Note that I'm not competent
Avoid bounce buffers when QEMUIOVector elements are within previously
registered bdrv_register_buf() buffers.
The idea is that emulated storage controllers will register guest RAM
using bdrv_register_buf() and set the BDRV_REQ_REGISTERED_BUF on I/O
requests. Therefore no blkio_add_mem_region()
Register guest RAM using BlockRAMRegistrar and set the
BDRV_REQ_REGISTERED_BUF flag so block drivers can optimize memory
accesses in I/O requests.
This is for vdpa-blk, vhost-user-blk, and other I/O interfaces that rely
on DMA mapping/unmapping.
Signed-off-by: Stefan Hajnoczi
---
Emulated devices and other BlockBackend users wishing to take advantage
of blk_register_buf() all have the same repetitive job: register
RAMBlocks with the BlockBackend using RAMBlockNotifier.
Add a BlockRAMRegistrar API to do this. A later commit will use this
from hw/block/virtio-blk.c.
When a RAMBlockNotifier is added, ->ram_block_added() is called with all
existing RAMBlocks. There is no equivalent ->ram_block_removed() call
when a RAMBlockNotifier is removed.
The util/vfio-helpers.c code (the sole user of RAMBlockNotifier) is fine
with this asymmetry because it does not rely
The blkio block driver will need to look up the file descriptor for a
given pointer. This is possible in softmmu builds where the memory API
is available for querying guest RAM.
Add stubs so tools like qemu-img that link the block layer still build
successfully. In this case there is no guest RAM
Block drivers may optimize I/O requests accessing buffers previously
registered with bdrv_register_buf(). Checking whether all elements of a
request's QEMUIOVector are within previously registered buffers is
expensive, so we need a hint from the user to avoid costly checks.
Add a
The only implementor of bdrv_register_buf() is block/nvme.c, where the
size is not needed when unregistering a buffer. This is because
util/vfio-helpers.c can look up mappings by address.
Future block drivers that implement bdrv_register_buf() may not be able
to do their job given only the buffer
libblkio (https://gitlab.com/libblkio/libblkio/) is a library for
high-performance disk I/O. It currently supports io_uring with
additional drivers planned.
One of the reasons for developing libblkio is that other applications
besides QEMU can use it. This will be particularly useful for
v2:
- Add BDRV_REQ_REGISTERED_BUF to bs.supported_write_flags [Stefano]
- Use new blkioq_get_num_completions() API
- Implement .bdrv_refresh_limits()
This patch series adds a QEMU BlockDriver for libblkio
(https://gitlab.com/libblkio/libblkio/), a library for high-performance block
device I/O.
On Tue, Apr 5, 2022, 4:51 AM Kashyap Chamarthy wrote:
> On Mon, Apr 04, 2022 at 02:56:10PM -0400, John Snow wrote:
> > On Mon, Apr 4, 2022 at 2:54 PM John Snow wrote:
>
> [...]
>
> > > > > .gitignore | 2 +-
> > > > > Makefile | 16
> > > > > setup.cfg | 24
On Tue, 5 Apr 2022 at 11:35, Markus Armbruster wrote:
>
> I double-checked these patches affect *only* generated documentation.
> Safe enough for 7.0, I think. But I'm quite content to hold on to
> them until after the release, if that's preferred.
>
> The following changes since commit
On Wed, Mar 16 2022, Alex Bennée wrote:
> Cornelia Huck writes:
>
>> On Wed, Mar 09 2022, Alex Bennée wrote:
>>> +Writing VirtIO backends for QEMU
>>> +
>>> +
>>> +This document attempts to outline the information a developer needs to
>>> +know to write
Am 05.04.2022 um 15:09 hat Emanuele Giuseppe Esposito geschrieben:
> Am 05/04/2022 um 12:14 schrieb Kevin Wolf:
> > I think all of this is really relevant for Emanuele's work, which
> > involves adding AIO_WAIT_WHILE() deep inside graph update functions. I
> > fully expect that we would see very
On Tue, Apr 5, 2022 at 1:10 PM Gerd Hoffmann wrote:
>
> > > +++ b/ui/cursor.c
> > > @@ -46,6 +46,13 @@ static QEMUCursor *cursor_parse_xpm(const char *xpm[])
> > >
> > > /* parse pixel data */
> > > c = cursor_alloc(width, height);
> > > +
> > > +if (!c) {
> > > +
If this patch is applied, issue:
https://gitlab.com/qemu-project/qemu/-/issues/321
can be closed.
Signed-off-by: Guo Zhi
---
configure | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index 7c08c18358..9cfa78efd2 100755
--- a/configure
+++
Am 05.04.2022 um 14:12 hat Vladimir Sementsov-Ogievskiy geschrieben:
> Thanks Kevin! I have already run out of arguments in the battle
> against using subtree-drains to isolate graph modification operations
> from each other in different threads in the mailing list)
>
> (Note also, that the
There are still some files in the QEMU PPC code base that use TABs for
indentation instead of using spaces.
The TABs should be replaced so that we have a consistent coding style.
If this patch is applied, issue:
https://gitlab.com/qemu-project/qemu/-/issues/374
can be closed.
Signed-off-by:
Eric Auger writes:
> ARM does not not support hotplug on pcie.0. Add a flag on the bus
> which tells if devices can be hotplugged and skip hotplug tests
> if the bus cannot be hotplugged. This is a temporary solution to
> enable the other pci tests on aarch64.
>
> Signed-off-by: Eric Auger
>
On Tue, 5 Apr 2022 at 14:07, Daniel Henrique Barboza
wrote:
>
> There is a lot of Valgrind warnings about conditional jump depending on
> unintialized values like this one (taken from a pSeries guest):
>
> Conditional jump or move depends on uninitialised value(s)
> at 0xB011DC:
From: Lucas Ramage
Buglink: https://gitlab.com/qemu-project/qemu/-/issues/527
Signed-off-by: Lucas Ramage
---
docs/ccid.txt| 182 ---
docs/system/device-emulation.rst | 1 +
docs/system/devices/ccid.rst | 171 +
On Sat, Mar 26, 2022 at 05:58:24PM +0100, Bernhard Beschow wrote:
> Now that igd_passthrough_isa_bridge_create() is implemented within the
> xen context it may use Xen* data types directly and become
> xen_igd_passthrough_isa_bridge_create(). This resolves an indirection.
>
> Signed-off-by:
On Sat, Mar 26, 2022 at 05:58:23PM +0100, Bernhard Beschow wrote:
> igd-passthrough-isa-bridge is only requested in xen_pt but was
> implemented in pc_piix.c. This caused xen_pt to dependend on i386/pc
> which is hereby resolved.
>
> Signed-off-by: Bernhard Beschow
Acked-by: Anthony PERARD
Am 05.04.2022 um 13:47 hat Hanna Reitz geschrieben:
> On 05.04.22 12:14, Kevin Wolf wrote:
> > Am 24.03.2022 um 13:57 hat Hanna Reitz geschrieben:
> > > When the stream block job cuts out the nodes between top and base in
> > > stream_prepare(), it does not drain the subtree manually; it fetches
Eric Auger writes:
> At the moment the IO space limit is hardcoded to
> QPCI_PIO_LIMIT = 0x1. When accesses are performed to a bar,
> the base address of this latter is compared against the limit
> to decide whether we perform an IO or a memory access.
>
> On ARM, we cannot keep this PIO
"Dr. David Alan Gilbert" writes:
> * Alex Bennée (alex.ben...@linaro.org) wrote:
>>
>> (expanding the CC list for help, anyone have a better idea about how
>> vhost-user qtests should work/see obvious issues with this patch?)
>
> How exactly does it fail?
➜ env
One clear problem with how qcow2's refcount structure rebuild algorithm
used to be before "qcow2: Improve refcount structure rebuilding" was
that it is prone to failure for qcow2 images on block devices: There is
generally unused space after the actual image, and if that exceeds what
one refblock
Instead of fprint()-ing error messages in rebuild_refcount_structure()
and its rebuild_refcounts_write_refblocks() helper, pass them through an
Error object to qcow2_check_refcounts() (which will then print it).
Suggested-by: Eric Blake
Signed-off-by: Hanna Reitz
---
block/qcow2-refcount.c |
When rebuilding the refcount structures (when qemu-img check -r found
errors with refcount = 0, but reference count > 0), the new refcount
table defaults to being put at the image file end[1]. There is no good
reason for that except that it means we will not have to rewrite any
refblocks we
Hi,
v2 cover letter:
https://lists.nongnu.org/archive/html/qemu-block/2022-03/msg01260.html
v1 cover letter:
https://lists.nongnu.org/archive/html/qemu-block/2021-03/msg00651.html
This series fixes the qcow2 refcount structure rebuilding mechanism for
when the qcow2 image file doesn’t allow
Jonathan Cameron writes:
> From: Jonathan Cameron
>
> The concept of these is introduced in [1] in terms of the
> description the CEDT ACPI table. The principal is more general.
> Unlike once traffic hits the CXL root bridges, the host system
> memory address routing is implementation defined
Am 05/04/2022 um 12:14 schrieb Kevin Wolf:
> I think all of this is really relevant for Emanuele's work, which
> involves adding AIO_WAIT_WHILE() deep inside graph update functions. I
> fully expect that we would see very similar problems, and just stacking
> drain sections over drain sections
There is a lot of Valgrind warnings about conditional jump depending on
unintialized values like this one (taken from a pSeries guest):
Conditional jump or move depends on uninitialised value(s)
at 0xB011DC: kvmppc_enable_cap_large_decr (kvm.c:2544)
by 0x92F28F: cap_large_decr_cpu_apply
Hi,
Valgrind is not happy with how we're using KVM functions that receives a
parameter via reference and write them. This results in a lot of
complaints about uninitialized values when using these functions
because, as default, Valgrind doesn't know that the variable is being
initialized in the
-04-04 15:48:55 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20220405
>
> for you to fetch changes up to 80b952bb694a90f7e530d407b01066894e64a443:
>
> docs/system/devices/can.rst: correct links
On 4/5/22 07:41, Markus Armbruster wrote:
Daniel P. Berrangé writes:
On Wed, Mar 16, 2022 at 10:54:55AM +0100, Damien Hedde wrote:
It takes an input file containing raw qmp commands (concatenated json
dicts) and send all commands one by one to a qmp server. When one
command fails, it
On Tue, 5 Apr 2022 at 13:40, Bernhard Beschow wrote:
>
> Resolves the only compiler warning when building a full QEMU under Arch Linux:
>
> Compiling C object libqemu-ppc-softmmu.fa.p/hw_ppc_ppc405_boards.c.o
> In file included from /usr/include/glib-2.0/glib.h:114,
>from
Resolves the only compiler warning when building a full QEMU under Arch Linux:
Compiling C object libqemu-ppc-softmmu.fa.p/hw_ppc_ppc405_boards.c.o
In file included from /usr/include/glib-2.0/glib.h:114,
from qemu/include/glib-compat.h:32,
from
Am 5. April 2022 12:00:19 UTC schrieb Peter Maydell :
>On Tue, 5 Apr 2022 at 12:32, Bernhard Beschow wrote:
>>
>> Resolves the only compiler warning when building a full QEMU under Arch
>> Linux:
>>
>> Compiling C object libqemu-ppc-softmmu.fa.p/hw_ppc_ppc405_boards.c.o
>> In file included
Signed-off-by: Sakshi Kaushik
---
contrib/vhost-user-scsi/vhost-user-scsi.c | 76 +++
1 file changed, 51 insertions(+), 25 deletions(-)
diff --git a/contrib/vhost-user-scsi/vhost-user-scsi.c
b/contrib/vhost-user-scsi/vhost-user-scsi.c
index 4f6e3e2a24..74ec44d190 100644
---
05.04.2022 13:14, Kevin Wolf wrote:
Am 24.03.2022 um 13:57 hat Hanna Reitz geschrieben:
When the stream block job cuts out the nodes between top and base in
stream_prepare(), it does not drain the subtree manually; it fetches the
base node, and tries to insert it as the top node's backing node
On 05.04.22 13:47, Hanna Reitz wrote:
On 05.04.22 12:14, Kevin Wolf wrote:
[...]
At the same time they probably do too little, because what you're
describing you're protecting against is not I/O, but graph modifications
done by callbacks invoked in the AIO_WAIT_WHILE() when replacing the
On Tue, 5 Apr 2022 at 12:32, Bernhard Beschow wrote:
>
> Resolves the only compiler warning when building a full QEMU under Arch Linux:
>
> Compiling C object libqemu-ppc-softmmu.fa.p/hw_ppc_ppc405_boards.c.o
> In file included from /usr/include/glib-2.0/glib.h:114,
>from
On Tue, 5 Apr 2022 at 11:50, Mauro Matteo Cascella wrote:
>
> Prevent potential integer overflow by limiting 'width' and 'height' to
> 512x512. Also change 'datasize' type to size_t. Refer to security
> advisory https://starlabs.sg/advisories/22-4206/ for more information.
>
> Fixes:
On 05.04.22 12:14, Kevin Wolf wrote:
Am 24.03.2022 um 13:57 hat Hanna Reitz geschrieben:
When the stream block job cuts out the nodes between top and base in
stream_prepare(), it does not drain the subtree manually; it fetches the
base node, and tries to insert it as the top node's backing node
On Tue, 5 Apr 2022 at 10:25, Paolo Bonzini wrote:
>
> The following changes since commit 20661b75ea6093f5e59079d00a778a972d6732c5:
>
> Merge tag 'pull-ppc-20220404' of https://github.com/legoater/qemu into
> staging (2022-04-04 15:48:55 +0100)
>
> are available in the Git repository at:
>
>
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