Re: [PATCH v3] qapi, target/i386/sev: Add cpu0-id to query-sev-capabilities

Cole Robinson writes: > On 2/28/22 4:39 AM, Dov Murik wrote: >> >> >> On 28/02/2022 11:31, Daniel P. Berrangé wrote: >>> On Mon, Feb 28, 2022 at 09:30:14AM +, Dov Murik wrote: Add a new field 'cpu0-id' to the response of query-sev-capabilities QMP command. The value of the field

Re: [PATCH 15/32] error-report: use error_printf() for program prefix

marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > For consistency with other calls in the function, let's use > error_printf(). (it will use stderr since !monitor_cur()) > > Signed-off-by: Marc-André Lureau > --- > util/error-report.c | 2 +- > 1 file changed, 1 insertion(+), 1

Re: [PATCH 14/32] util: rename qemu-error.c to match its header name

marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > The header name is more appropriate. > > Signed-off-by: Marc-André Lureau > --- > util/{qemu-error.c => error-report.c} | 0 > util/meson.build | 2 +- > 2 files changed, 1 insertion(+), 1 deletion(-) >

Re: [PATCH 12/32] qga: replace deprecated g_get_current_time()

marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > According to GLib API: > g_get_current_time has been deprecated since version 2.62 and should not > be used in newly-written code. GTimeVal is not year-2038-safe. Use > g_get_real_time() instead. > > Signed-off-by: Marc-André

Re: [BUG]QEMU jump into interrupt when single-stepping on aarch64

在 2022/4/7 AM12:57, Richard Henderson 写道: > On 4/6/22 09:30, Shuai Xue wrote: >> Dear, folks, >> >> I try to debug Linux kernel with QEMU in single-stepping mode on aarch64 >> platform, >> the added breakpoint hits but after I type `step`, the gdb always jumps into >> interrupt. >> >> My env: >>

Re: [PATCH] x86: Implement Linear Address Masking support

On 4/6/22 20:01, Kirill A. Shutemov wrote: Linear Address Masking feature makes CPU ignore some bits of the virtual address. These bits can be used to encode metadata. The feature is enumerated with CPUID.(EAX=07H, ECX=01H):EAX.LAM[bit 26]. CR3.LAM_U57[bit 62] allows to encode 6 bits of

Re: [PATCH qemu] ppc/spapr/ddw: Add 2M pagesize

On 21/03/2022 18:19, Alexey Kardashevskiy wrote: Recently the LoPAPR spec got a new 2MB pagesize to support in Dynamic DMA Windows API (DDW), this adds the new flag. Linux supports it since https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=38727311871

Re: [PATCH RESEND v1] trace: Split address space and slot id in trace_kvm_set_user_memory()

On 3/10/2022 8:22 PM, Xiaoyao Li wrote: The upper 16 bits of kvm_userspace_memory_region::slot are address space id. Parse it separately in trace_kvm_set_user_memory(). Hi QEMU maintainers, I think this patch is simple and straightforward. Please take your time to look at it. Thanks,

[PATCH v2 5/6] hw/riscv: virt: Add device plug support

From: Alistair Francis Add support for plugging in devices, this was tested with the TPM device. Signed-off-by: Alistair Francis --- hw/riscv/virt.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index

[PATCH v2 2/6] hw/core: Move the ARM sysbus-fdt to core

From: Alistair Francis The ARM virt machine currently uses sysbus-fdt to create device tree entries for dynamically created MMIO devices. The RISC-V virt machine can also benefit from this, so move the code to the core directory. Signed-off-by: Alistair Francis --- include/hw/{arm =>

[PATCH v2 3/6] hw/riscv: virt: Create a platform bus

From: Alistair Francis Create a platform bus to allow dynamic devices to be connected. This is based on the ARM implementation. Signed-off-by: Alistair Francis --- include/hw/riscv/virt.h | 7 - hw/riscv/virt.c | 68 + hw/riscv/Kconfig

[PATCH v2 6/6] hw/riscv: Enable TPM backends

From: Alistair Francis Imply the TPM sysbus devices. This allows users to add TPM devices to the RISC-V virt board. This was tested by first creating an emulated TPM device: swtpm socket --tpm2 -t -d --tpmstate dir=/tmp/tpm \ --ctrl type=unixio,path=swtpm-sock Then launching QEMU

[PATCH v2 4/6] hw/riscv: virt: Add support for generateing platform FDT entries

From: Alistair Francis Similar to the ARM virt machine add support for adding device tree entries for dynamically created devices. Signed-off-by: Alistair Francis --- hw/riscv/virt.c | 25 + 1 file changed, 25 insertions(+) diff --git a/hw/riscv/virt.c

[PATCH v2 1/6] hw/riscv: virt: Add a machine done notifier

From: Alistair Francis Move the binary and device tree loading code to the machine done notifier. This allows us to prepare for editing the device tree as part of the notifier. This is based on similar code in the ARM virt machine. Signed-off-by: Alistair Francis --- include/hw/riscv/virt.h

[PATCH v2 0/6] hw/riscv: Add TPM support to the virt board

From: Alistair Francis This series adds support for connecting TPM devices to the RISC-V virt board. This is similar to how it works for the ARM virt board. This was tested by first creating an emulated TPM device: swtpm socket --tpm2 -t -d --tpmstate dir=/tmp/tpm \ --ctrl

Re: [PATCH] hw/vfio/common: Fix a small boundary issue of a trace

Hi Damien, 在 2022/4/6 23:22, Damien Hedde 写道: On 4/6/22 10:14, chenxiang via wrote: From: Xiang Chen Right now the trace of vfio_region_sparse_mmap_entry is as follows: vfio_region_sparse_mmap_entry sparse entry 0 [0x1000 - 0x9000] Actually the range it wants to show is [0x1000 -

[PATCH] x86: Implement Linear Address Masking support

Linear Address Masking feature makes CPU ignore some bits of the virtual address. These bits can be used to encode metadata. The feature is enumerated with CPUID.(EAX=07H, ECX=01H):EAX.LAM[bit 26]. CR3.LAM_U57[bit 62] allows to encode 6 bits of metadata in bits 62:57 of user pointers.

Re: [RESEND PATCH] target/riscv: fix start byte for vmvr.v when vstart != 0

On Wed, Mar 30, 2022 at 12:14 PM Weiwei Li wrote: > > The spec for vmvr.v says: 'the instructions operate as if EEW=SEW, > EMUL = NREG, effective length evl= EMUL * VLEN/SEW.' > > So the start byte for vstart != 0 should take sew into account > > Signed-off-by: Weiwei Li > Signed-off-by:

[PATCH 1/2] hw/misc: Add PWRON STRAP bit fields in GCR module

Similar to the Aspeed code in include/misc/aspeed_scu.h, we define the PWRON STRAP fields in their corresponding module for NPCM7XX. Signed-off-by: Hao Wu Reviewed-by: Patrick Venture --- include/hw/misc/npcm7xx_gcr.h | 30 ++ 1 file changed, 30 insertions(+) diff

[PATCH 2/2] hw/arm: Use bit fields for NPCM7XX PWRON STRAPs

This patch uses the defined fields to describe PWRON STRAPs for better readability. Signed-off-by: Hao Wu Reviewed-by: Patrick Venture --- hw/arm/npcm7xx_boards.c | 24 +++- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/hw/arm/npcm7xx_boards.c

[PATCH 0/2] Define NPCM7XX PWRON bit fields

Currently, the PWRON STRAP values in NPCM7XX boards are magic numbers. Similar to the aspeed ones in hw/arm/aspeed.c, we define bit fields constants for them and use these fields instead of the magic numbers in the current implementation. The code should behave exactly the same as the existing

Re: [RFC PATCH 0/4] hw/i2c: i2c slave mode support

> On Apr 6, 2022, at 11:41 AM, Klaus Jensen wrote: > > On Apr 6 17:03, Peter Delevoryas wrote: >> >> >>> On Apr 5, 2022, at 11:07 PM, Klaus Jensen wrote: >>> >>> On Apr 5 20:52, Peter Delevoryas wrote: > On Mar 31, 2022, at 9:57 AM, Klaus Jensen wrote: > > From:

[PATCH v2] ui/cursor: fix integer overflow in cursor_alloc (CVE-2022-4206)

Prevent potential integer overflow by limiting 'width' and 'height' to 512x512. Also change 'datasize' type to size_t. Refer to security advisory https://starlabs.sg/advisories/22-4206/ for more information. Fixes: CVE-2022-4206 Signed-off-by: Mauro Matteo Cascella --- v2: - braces on if

Re: [PATCH v2] acpi: fix acpi_index migration

On Wed, Apr 06, 2022 at 09:29:02PM +0100, Peter Maydell wrote: > On Wed, 6 Apr 2022 at 19:59, Dr. David Alan Gilbert > wrote: > > > > * Igor Mammedov (imamm...@redhat.com) wrote: > > > From: "Dr. David Alan Gilbert" > > > > > > vmstate_acpi_pcihp_use_acpi_index() was expecting AcpiPciHpState >

[PULL 2/3] intel-iommu: correct the value used for error_setg_errno()

From: Jason Wang error_setg_errno() expects a normal errno value, not a negated one, so we should use ENOTSUP instead of -ENOSUP. Fixes: Coverity CID 1487174 Fixes: ("intel_iommu: support snoop control") Signed-off-by: Jason Wang Message-Id: <20220401022824.9337-1-jasow...@redhat.com>

[PULL 3/3] virtio-iommu: use-after-free fix

From: Wentao Liang A potential Use-after-free was reported in virtio_iommu_handle_command when using virtio-iommu: > I find a potential Use-after-free in QEMU 6.2.0, which is in > virtio_iommu_handle_command() (./hw/virtio/virtio-iommu.c). > > > Specifically, in the loop body, the variable

[PULL 1/3] virtio: fix feature negotiation for ACCESS_PLATFORM

From: Halil Pasic Unlike most virtio features ACCESS_PLATFORM is considered mandatory by QEMU, i.e. the driver must accept it if offered by the device. The virtio specification says that the driver SHOULD accept the ACCESS_PLATFORM feature if offered, and that the device MAY fail to operate if

[PULL 0/3] virtio,pc: bugfixes

The following changes since commit 128e050d41794e61e5849c6c507160da5556ea61: hw/acpi/microvm: turn on 8042 bit in FADT boot architecture flags if present (2022-03-07 17:43:14 -0500) are available in the Git repository at: git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream

Re: [PATCH v2] acpi: fix acpi_index migration

On Wed, 6 Apr 2022 at 19:59, Dr. David Alan Gilbert wrote: > > * Igor Mammedov (imamm...@redhat.com) wrote: > > From: "Dr. David Alan Gilbert" > > > > vmstate_acpi_pcihp_use_acpi_index() was expecting AcpiPciHpState > > as state but it actually received PIIX4PMState, because > >

Re: [RFC PATCH] tests/qtest: properly initialise the vring used idx

On Wed, 6 Apr 2022 at 21:07, Alex Bennée wrote: > > > Peter Maydell writes: > > Guest memory is generally zero at startup. Do we manage to > > hit the bit of memory at the start of the virt machine's RAM > > where we store the DTB ? (As you say, initializing the data > > structures is the right

Re: [RFC PATCH] tests/qtest: properly initialise the vring used idx

Peter Maydell writes: > On Wed, 6 Apr 2022 at 18:36, Alex Bennée wrote: >> >> Eric noticed while attempting to enable the vhost-user-blk-test for >> Aarch64 that that things didn't work unless he put in a dummy >> guest_malloc() at the start of the test. Without it >> qvirtio_wait_used_elem()

Re: [RFC PATCH] tests/qtest: properly initialise the vring used idx

On Wed, 6 Apr 2022 at 18:36, Alex Bennée wrote: > > Eric noticed while attempting to enable the vhost-user-blk-test for > Aarch64 that that things didn't work unless he put in a dummy > guest_malloc() at the start of the test. Without it > qvirtio_wait_used_elem() would assert when it reads a

Re: [PATCH v2] acpi: fix acpi_index migration

* Igor Mammedov (imamm...@redhat.com) wrote: > From: "Dr. David Alan Gilbert" > > vmstate_acpi_pcihp_use_acpi_index() was expecting AcpiPciHpState > as state but it actually received PIIX4PMState, because > VMSTATE_PCI_HOTPLUG is a macro and not another struct. > So it ended up accessing random

[PATCH v2] acpi: fix acpi_index migration

From: "Dr. David Alan Gilbert" vmstate_acpi_pcihp_use_acpi_index() was expecting AcpiPciHpState as state but it actually received PIIX4PMState, because VMSTATE_PCI_HOTPLUG is a macro and not another struct. So it ended up accessing random pointer, which resulted in 'false' return value and

Re: [PATCH] acpi: fix acpi_index migration

* Igor Mammedov (imamm...@redhat.com) wrote: > From: "Dr. David Alan Gilbert" > > vmstate_acpi_pcihp_use_acpi_index() was expecting AcpiPciHpState > as state but it actually received PIIX4PMState, because > VMSTATE_PCI_HOTPLUG is a macro and not another struct. > So it ended up accessing random

Re: [RFC PATCH 0/4] hw/i2c: i2c slave mode support

On Apr 6 17:03, Peter Delevoryas wrote: > > > > On Apr 5, 2022, at 11:07 PM, Klaus Jensen wrote: > > > > On Apr 5 20:52, Peter Delevoryas wrote: > >> > >> > >>> On Mar 31, 2022, at 9:57 AM, Klaus Jensen wrote: > >>> > >>> From: Klaus Jensen > >>> > >>> Hi all, > >>> > >>> This RFC

Re: [PATCH v5 00/13] KVM: mm: fd-based approach for supporting KVM guest private memory

On Tue, Apr 5, 2022, at 11:30 AM, Sean Christopherson wrote: > On Tue, Apr 05, 2022, Andy Lutomirski wrote: > >> resume guest >> *** host -> hypervisor -> guest *** >> Guest unshares the page. >> *** guest -> hypervisor *** >> Hypervisor removes PTE. TLBI. >> *** hypervisor -> guest *** >>

[PATCH] acpi: fix acpi_index migration

binzciMKJhzqJ.bin Description: Binary data

[PATCH v3 4/7] util: add qemu-co-timeout

Add new API, to make a time limited call of the coroutine. Signed-off-by: Vladimir Sementsov-Ogievskiy --- include/qemu/coroutine.h | 13 ++ util/qemu-co-timeout.c | 89 util/meson.build | 1 + 3 files changed, 103 insertions(+) create

[PATCH v3 6/7] block/copy-before-write: implement cbw-timeout option

In some scenarios, when copy-before-write operations lasts too long time, it's better to cancel it. Most useful would be to use the new option together with on-cbw-error=break-snapshot: this way if cbw operation takes too long time we'll just cancel backup process but do not disturb the guest too

[PATCH v3 7/7] iotests: copy-before-write: add cases for cbw-timeout option

Add two simple test-cases: timeout failure with break-snapshot-on-cbw-error behavior and similar with break-guest-write-on-cbw-error behavior. Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/tests/copy-before-write| 78 +++

[PATCH v3 1/7] block/copy-before-write: refactor option parsing

We are going to add one more option of enum type. Let's refactor option parsing so that we can simply work with BlockdevOptionsCbw object. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/copy-before-write.c | 55 --- 1 file changed, 28 insertions(+), 27

[PATCH v3 3/7] iotests: add copy-before-write: on-cbw-error tests

Add tests for new option of copy-before-write filter: on-cbw-error. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Hanna Reitz --- tests/qemu-iotests/tests/copy-before-write| 128 ++ .../qemu-iotests/tests/copy-before-write.out | 5 + 2 files changed, 133

[PATCH v3 2/7] block/copy-before-write: add on-cbw-error open parameter

Currently, behavior on copy-before-write operation failure is simple: report error to the guest. Let's implement alternative behavior: break the whole copy-before-write process (and corresponding backup job or NBD client) but keep guest working. It's needed if we consider guest stability as more

[PATCH v3 5/7] block/block-copy: block_copy(): add timeout_ns parameter

Add possibility to limit block_copy() call in time. To be used in the next commit. As timed-out block_copy() call will continue in background anyway (we can't immediately cancel IO operation), it's important also give user a possibility to pass a callback, to do some additional actions on

[PATCH v3 0/7] copy-before-write: on-cbw-error and cbw-timeout

Hi all! v3: 01: refactor options parsing 02: - wording, grammar - early return from cbw_do_copy_before_write() when snapshot_error is set - drop premature optimization around waiting for in-flight requests when we set snapshot_error 03: Hanna's r-b 05: - add callback to block_copy()

Re: [PATCH] acpi: Bodge acpi_index migration

On Wed, 6 Apr 2022 18:36:41 +0100 "Dr. David Alan Gilbert" wrote: > * Igor Mammedov (imamm...@redhat.com) wrote: > > On Wed, 6 Apr 2022 17:11:09 +0100 > > "Dr. David Alan Gilbert" wrote: > > > > > * Igor Mammedov (imamm...@redhat.com) wrote: > > > > On Wed, 6 Apr 2022 10:38:51 +0100 > > >

[PATCH v1 0/4] hw/arm: versal: Add Cortex-R5s and CRL

From: "Edgar E. Iglesias" This adds the Versal Cortex-R5s in the Real-Time Processing Unit (RPU) subsystem. A model of the Clock/Reset Low-power domain (CRL) is also added allowing runtime release of the Cortex-R5s. The RPU subsystem is largely missing but has enough to run simple bare-metal R5

[PATCH v1 2/4] hw/arm: versal: Add the Cortex-R5Fs

From: "Edgar E. Iglesias" Add the Cortex-R5Fs of the Versal RPU (Real-time Processing Unit) subsystem. Signed-off-by: Edgar E. Iglesias --- hw/arm/xlnx-versal-virt.c| 6 +++--- hw/arm/xlnx-versal.c | 36 include/hw/arm/xlnx-versal.h | 10

[PATCH v1 3/4] hw/misc: Add a model of the Xilinx Versal CRL

From: "Edgar E. Iglesias" Add a model of the Xilinx Versal CRL. Signed-off-by: Edgar E. Iglesias --- hw/misc/meson.build | 1 + hw/misc/xlnx-versal-crl.c | 421 ++ include/hw/misc/xlnx-versal-crl.h | 235 + 3 files changed,

[PATCH v1 4/4] hw/arm: versal: Connect the CRL

From: "Edgar E. Iglesias" Connect the CRL (Clock Reset LPD) to the Versal SoC. Signed-off-by: Edgar E. Iglesias --- hw/arm/xlnx-versal.c | 54 ++-- include/hw/arm/xlnx-versal.h | 4 +++ 2 files changed, 56 insertions(+), 2 deletions(-) diff --git

[PATCH v1 1/4] hw/arm: versal: Create an APU CPU Cluster

From: "Edgar E. Iglesias" Create an APU CPU Cluster. This is in preparation to add the RPU. Signed-off-by: Edgar E. Iglesias --- hw/arm/xlnx-versal.c | 9 - include/hw/arm/xlnx-versal.h | 2 ++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/arm/xlnx-versal.c

Re: [PATCH] acpi: Bodge acpi_index migration

* Igor Mammedov (imamm...@redhat.com) wrote: > On Wed, 6 Apr 2022 17:11:09 +0100 > "Dr. David Alan Gilbert" wrote: > > > * Igor Mammedov (imamm...@redhat.com) wrote: > > > On Wed, 6 Apr 2022 10:38:51 +0100 > > > "Dr. David Alan Gilbert" wrote: > > > > > > > * Igor Mammedov

Re: [PATCH v3 4/5] tests/qtest/vhost-user-blk-test: Temporary hack to get tests passing on aarch64

Eric Auger writes: > When run on ARM, basic and indirect tests currently fail with the > following error: > > ERROR:../tests/qtest/libqos/virtio.c:224:qvirtio_wait_used_elem: > assertion failed (got_desc_idx == desc_idx): (50331648 == 0) > Bail out! ERROR:../tests/qtest/libqos/virtio.c:224:

[RFC PATCH] tests/qtest: properly initialise the vring used idx

Eric noticed while attempting to enable the vhost-user-blk-test for Aarch64 that that things didn't work unless he put in a dummy guest_malloc() at the start of the test. Without it qvirtio_wait_used_elem() would assert when it reads a junk value for idx resulting in: qvirtqueue_get_buf:

Re: [RFC v2 1/8] blkio: add io_uring block driver using libblkio

Am 05.04.2022 um 17:33 hat Stefan Hajnoczi geschrieben: > libblkio (https://gitlab.com/libblkio/libblkio/) is a library for > high-performance disk I/O. It currently supports io_uring with > additional drivers planned. > > One of the reasons for developing libblkio is that other applications >

Re: [PATCH v3] qapi, target/i386/sev: Add cpu0-id to query-sev-capabilities

On 2/28/22 4:39 AM, Dov Murik wrote: > > > On 28/02/2022 11:31, Daniel P. Berrangé wrote: >> On Mon, Feb 28, 2022 at 09:30:14AM +, Dov Murik wrote: >>> Add a new field 'cpu0-id' to the response of query-sev-capabilities QMP >>> command. The value of the field is the base64-encoded unique ID

[PATCH v4 4/4] dump/win_dump: add 32-bit guest Windows support

Before this patch, 'dump-guest-memory -w' was accepting only 64-bit dump header provided by guest through vmcoreinfo and thus was unable to produce 32-bit guest Windows dump. So, add 32-bit guest Windows dumping support. Signed-off-by: Viktor Prutyanov Reviewed-by: Philippe Mathieu-Daudé

[PATCH v4 3/4] include/qemu: add 32-bit Windows dump structures

These structures are required to produce 32-bit guest Windows Complete Memory Dump. Add 32-bit Windows dump header, CPU context and physical memory descriptor structures along with corresponding definitions. Signed-off-by: Viktor Prutyanov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by:

[PATCH v4 2/4] dump/win_dump: add helper macros for Windows dump header access

Perform read access to Windows dump header fields via helper macros. This is preparation for the next 32-bit guest Windows dump support. Signed-off-by: Viktor Prutyanov Reviewed-by: Marc-André Lureau --- dump/win_dump.c | 100 +++- 1 file changed, 65

[PATCH v4 1/4] include/qemu: rename Windows context definitions to expose bitness

Context structure in 64-bit Windows differs from 32-bit one and it should be reflected in its name. Signed-off-by: Viktor Prutyanov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau --- contrib/elf2dmp/main.c | 6 +++--- dump/win_dump.c | 14 +++---

[PATCH v4 0/4] dump: add 32-bit guest Windows support

From: Viktor Prutyanov Since 32-bit versions of Windows still exist, there is a need to take live and crash dumps of such guests along with 64-bit guests. So, add an ability for 'dump-guest-memory -w' to take dumps from 32-bit guest. When running the command QEMU consumes 32-bit Complete Memory

Re: [RFC PATCH 0/4] hw/i2c: i2c slave mode support

> On Apr 5, 2022, at 11:07 PM, Klaus Jensen wrote: > > On Apr 5 20:52, Peter Delevoryas wrote: >> >> >>> On Mar 31, 2022, at 9:57 AM, Klaus Jensen wrote: >>> >>> From: Klaus Jensen >>> >>> Hi all, >>> >>> This RFC series adds I2C "slave mode" support for the Aspeed I2C >>> controller as

Re: [BUG]QEMU jump into interrupt when single-stepping on aarch64

On 4/6/22 09:30, Shuai Xue wrote: Dear, folks, I try to debug Linux kernel with QEMU in single-stepping mode on aarch64 platform, the added breakpoint hits but after I type `step`, the gdb always jumps into interrupt. My env: gdb-10.2 qemu-6.2.0 host kernel: 5.10.84

Re: [PATCH] acpi: Bodge acpi_index migration

On Wed, 6 Apr 2022 17:11:09 +0100 "Dr. David Alan Gilbert" wrote: > * Igor Mammedov (imamm...@redhat.com) wrote: > > On Wed, 6 Apr 2022 10:38:51 +0100 > > "Dr. David Alan Gilbert" wrote: > > > > > * Igor Mammedov (imamm...@redhat.com) wrote: > > > > On Wed, 6 Apr 2022 09:35:31 +0100 > > >

[PATCH] [PATCH RFC v4] Implements Backend Program conventions for vhost-user-scsi

Signed-off-by: Sakshi Kaushik --- contrib/vhost-user-scsi/vhost-user-scsi.c | 78 +++ 1 file changed, 52 insertions(+), 26 deletions(-) diff --git a/contrib/vhost-user-scsi/vhost-user-scsi.c b/contrib/vhost-user-scsi/vhost-user-scsi.c index 4f6e3e2a24..0c38c2988c 100644 ---

Re: [PATCH] acpi: Bodge acpi_index migration

* Igor Mammedov (imamm...@redhat.com) wrote: > On Wed, 6 Apr 2022 10:38:51 +0100 > "Dr. David Alan Gilbert" wrote: > > > * Igor Mammedov (imamm...@redhat.com) wrote: > > > On Wed, 6 Apr 2022 09:35:31 +0100 > > > "Dr. David Alan Gilbert (git)" wrote: > > > > > > > From: "Dr. David Alan

Re: [PATCH v2 5/7] block/block-copy: block_copy(): add timeout_ns parameter

01.04.2022 16:16, Hanna Reitz wrote: -static void coroutine_fn block_copy_async_co_entry(void *opaque) -{ -    block_copy_common(opaque); +    ret = call_state->ret; + +    return ret; But here we still need to free call_state, right? Right, will fix. -- Best regards, Vladimir

Re: [PATCH] acpi: Bodge acpi_index migration

On Wed, 6 Apr 2022 10:38:51 +0100 "Dr. David Alan Gilbert" wrote: > * Igor Mammedov (imamm...@redhat.com) wrote: > > On Wed, 6 Apr 2022 09:35:31 +0100 > > "Dr. David Alan Gilbert (git)" wrote: > > > > > From: "Dr. David Alan Gilbert" > > > > > > The 'acpi_index' field is a statically

Re: [PATCH v1] configure: judge build dir permission

On Wed, 6 Apr 2022 at 16:37, Stefan Hajnoczi wrote: > > On Tue, Apr 05, 2022 at 09:48:20PM +0800, Guo Zhi wrote: > > If this patch is applied, issue: > > > > https://gitlab.com/qemu-project/qemu/-/issues/321 > > > > can be closed. > > > > Signed-off-by: Guo Zhi > > --- > > configure | 8

Re: [PATCH v1] configure: judge build dir permission

On Tue, Apr 05, 2022 at 09:48:20PM +0800, Guo Zhi wrote: > If this patch is applied, issue: > > https://gitlab.com/qemu-project/qemu/-/issues/321 > > can be closed. > > Signed-off-by: Guo Zhi > --- > configure | 8 +++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git

Re: [PATCH] acpi: Bodge acpi_index migration

On Wed, Apr 06, 2022 at 10:44:18AM +0100, Dr. David Alan Gilbert wrote: > * Dr. David Alan Gilbert (dgilb...@redhat.com) wrote: > > * Igor Mammedov (imamm...@redhat.com) wrote: > > > On Wed, 6 Apr 2022 09:35:31 +0100 > > > "Dr. David Alan Gilbert (git)" wrote: > > > > > > > From: "Dr. David

[PATCH 2/2] iotests: add throttle test

Add simple test for throttle filter driver. Without previous "block/throttle-groups: use QEMU_CLOCK_REALTIME for qtest too" commit the test hangs forever, because previously used VIRTUAL clock just doesn't tick for iotests. Signed-off-by: Vladimir Sementsov-Ogievskiy ---

[PATCH for-7.1 0/2] throttle-groups: use QEMU_CLOCK_REALTIME

Hi all! Honestly, I don't know why QEMU_CLOCK_VIRTUAL is used here. Comment say that that's specially for throttle tests, but the simple test (patch 02) just hangs because QEMU_CLOCK_VIRTUAL clock just doesn't tick in this environment.. And if we change the clock to QEMU_CLOCK_REALTIME, new test

[PATCH 1/2] block/throttle-groups: use QEMU_CLOCK_REALTIME for qtest too

Virtual clock just doesn't tick for iotests, and throttling just not work. Let's use realtime clock. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/throttle-groups.c | 4 1 file changed, 4 deletions(-) diff --git a/block/throttle-groups.c b/block/throttle-groups.c index

Re: [PATCH] [PATCH RFC v3] Implements Backend Program conventions for vhost-user-scsi

On Tue, Apr 05, 2022 at 07:22:38AM -0500, Sakshi Kaushik wrote: Thanks for the patch! Comments below: > Signed-off-by: Sakshi Kaushik > --- > contrib/vhost-user-scsi/vhost-user-scsi.c | 76 +++ > 1 file changed, 51 insertions(+), 25 deletions(-) > > diff --git

Re: [PATCH] hw/vfio/common: Fix a small boundary issue of a trace

On 4/6/22 10:14, chenxiang via wrote: From: Xiang Chen Right now the trace of vfio_region_sparse_mmap_entry is as follows: vfio_region_sparse_mmap_entry sparse entry 0 [0x1000 - 0x9000] Actually the range it wants to show is [0x1000 - 0x8fff]，so fix it. Signed-off-by: Xiang Chen ---

Re: [PATCH v3 4/4] dump/win_dump: add 32-bit guest Windows support

Hi On Wed, Apr 6, 2022 at 11:00 AM Marc-André Lureau wrote: > > Hi > > On Fri, Mar 25, 2022 at 11:51 PM Viktor Prutyanov > wrote: > > > > Before this patch, 'dump-guest-memory -w' was accepting only 64-bit > > dump header provided by guest through vmcoreinfo and thus was unable > > to produce

Re: [PATCH v3 3/4] include/qemu: add 32-bit Windows dump structures

Hi On Wed, Apr 6, 2022 at 10:51 AM Marc-André Lureau wrote: > > Hi > > On Fri, Mar 25, 2022 at 11:51 PM Viktor Prutyanov > wrote: > > > > These structures are required to produce 32-bit guest Windows Complete > > Memory Dump. Add 32-bit Windows dump header, CPU context and physical > > memory

Re: iotest40 problem

On Wed, Apr 6, 2022, 10:53 AM Li Zhang wrote: > On 3/31/22 16:46, John Snow wrote: > > > > > > On Thu, Mar 31, 2022, 10:37 AM John Snow > > wrote: > > > > > > > > On Thu, Mar 31, 2022, 6:47 AM Li Zhang > > wrote: > > > > On

[BUG]QEMU jump into interrupt when single-stepping on aarch64

Dear, folks, I try to debug Linux kernel with QEMU in single-stepping mode on aarch64 platform, the added breakpoint hits but after I type `step`, the gdb always jumps into interrupt. My env: gdb-10.2 qemu-6.2.0 host kernel: 5.10.84 VM kernel: 5.10.84 The

Re: [PATCH 12/32] qga: replace deprecated g_get_current_time()

On 3/23/22 16:57, marcandre.lur...@redhat.com wrote: From: Marc-André Lureau According to GLib API: g_get_current_time has been deprecated since version 2.62 and should not be used in newly-written code. GTimeVal is not year-2038-safe. Use g_get_real_time() instead. Signed-off-by:

Re: [PATCH qemu] ppc/vof: Fix uninitialized string tracing

On 4/6/22 01:50, Alexey Kardashevskiy wrote: There are error paths which do not initialize propname but the trace_exit label prints it anyway. This initializes the problem string. Spotted by Coverity CID 1487241. Signed-off-by: Alexey Kardashevskiy --- Reviewed-by: Daniel Henrique

Re: iotest40 problem

On 3/31/22 16:46, John Snow wrote: On Thu, Mar 31, 2022, 10:37 AM John Snow > wrote: On Thu, Mar 31, 2022, 6:47 AM Li Zhang mailto:lizh...@suse.de>> wrote: On 3/31/22 08:10, Hanna Reitz wrote: > On 29.03.22 18:49, Li Zhang wrote: >>

Re: [PATCH for-7.1 18/18] hw/arm/exynos4210: Drop Exynos4210Irq struct

On 4/4/22 10:46, Peter Maydell wrote: The only time we use the int_combiner_irq[] and ext_combiner_irq[] arrays in the Exynos4210Irq struct is during realize of the SoC -- we initialize them with the input IRQs of the combiner devices, and then connect those to outputs of other devices in

Re: [PATCH for-7.1 17/18] hw/arm/exynos4210: Put combiners into state struct

On 4/4/22 10:46, Peter Maydell wrote: Switch the creation of the combiner devices to the new-style "embedded in state struct" approach, so we can easily refer to the object elsewhere during realize. Signed-off-by: Peter Maydell --- include/hw/arm/exynos4210.h | 3 ++

Re: [PATCH for-7.1 16/18] hw/arm/exynos4210: Fold combiner splits into exynos4210_init_board_irqs()

On 4/4/22 10:46, Peter Maydell wrote: At this point, the function exynos4210_init_board_irqs() splits input IRQ lines to connect them to the input combiner, output combiner and external GIC. The function exynos4210_combiner_get_gpioin() splits some of the combiner input lines further to connect

Re: [PATCH for-7.1 15/18] hw/arm/exynos4210: Don't connect multiple lines to external GIC inputs

On 4/4/22 10:46, Peter Maydell wrote: The combiner_grp_to_gic_id[] array includes the EXT_GIC_ID_MCT_G0 and EXT_GIC_ID_MCT_G1 multiple times. This means that we will connect multiple IRQs up to the same external GIC input, which is not permitted. We do the same thing in the code in

Re: [PATCH for-7.1 14/18] hw/arm/exynos4210: Connect MCT_G0 and MCT_G1 to both combiners

On 4/4/22 10:46, Peter Maydell wrote: Currently for the interrupts MCT_G0 and MCT_G1 which are the only ones in the input range of the external combiner and which are also wired to the external GIC, we connect them only to the internal combiner and the external GIC. This seems likely to be a

Re: [PATCH for-7.1 13/18] hw/arm/exynos4210: Fill in irq_table[] for internal-combiner-only IRQ lines

On 4/4/22 10:46, Peter Maydell wrote: In exynos4210_init_board_irqs(), the loop that handles IRQ lines that are in a range that applies to the internal combiner only creates a splitter for those interrupts which go to both the internal combiner and to the external GIC, but it does nothing at all

Re: [PATCH for-7.1 12/18] hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_board_irqs()

On 4/4/22 10:46, Peter Maydell wrote: In exynos4210_init_board_irqs(), use the TYPE_SPLIT_IRQ device instead of qemu_irq_split(). Signed-off-by: Peter Maydell --- include/hw/arm/exynos4210.h | 9 hw/arm/exynos4210.c | 41 + 2 files

Re: [PATCH for-7.1 11/18] hw/arm/exynos4210: Delete unused macro definitions

On 4/4/22 10:46, Peter Maydell wrote: Delete a couple of #defines which are never used. Signed-off-by: Peter Maydell --- include/hw/arm/exynos4210.h | 4 1 file changed, 4 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH for-7.1 10/18] hw/arm/exynos4210: Move exynos4210_combiner_get_gpioin() into exynos4210.c

On 4/4/22 10:46, Peter Maydell wrote: The function exynos4210_combiner_get_gpioin() currently lives in exynos4210_combiner.c, but it isn't really part of the combiner device itself -- it is a function that implements the wiring up of some interrupt sources to multiple combiner inputs. Move it

Re: [PATCH for-7.1 09/18] hw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq struct

On 4/4/22 10:46, Peter Maydell wrote: The only time we use the ext_gic_irq[] array in the Exynos4210Irq struct is during realize of the SoC -- we initialize it with the input IRQs of the external GIC device, and then connect those to outputs of other devices further on in realize (including in

Re: [PATCH for-7.1 08/18] hw/arm/exynos4210: Put external GIC into state struct

On 4/4/22 10:46, Peter Maydell wrote: Switch the creation of the external GIC to the new-style "embedded in state struct" approach, so we can easily refer to the object elsewhere during realize. Signed-off-by: Peter Maydell --- include/hw/arm/exynos4210.h | 2 ++

Re: [PATCH for-7.1 07/18] hw/arm/exynos4210: Move exynos4210_init_board_irqs() into exynos4210.c

On 4/4/22 10:46, Peter Maydell wrote: The function exynos4210_init_board_irqs() currently lives in exynos4210_gic.c, but it isn't really part of the exynos4210.gic device -- it is a function that implements (some of) the wiring up of interrupts between the SoC's GIC and combiner components.

Re: [PATCH for-7.1 06/18] hw/arm/exynos4210: Fix code style nit in combiner_grp_to_gic_id[]

On 4/4/22 10:46, Peter Maydell wrote: Fix a missing set of spaces around '-' in the definition of combiner_grp_to_gic_id[]. We're about to move this code, so fix the style issue first to keep checkpatch happy with the code-motion patch. Signed-off-by: Peter Maydell ---

Re: [PATCH for-7.1 05/18] hw/arm/exynos4210: Coalesce board_irqs and irq_table

On 4/4/22 10:46, Peter Maydell wrote: The exynos4210 code currently has two very similar arrays of IRQs: * board_irqs is a field of the Exynos4210Irq struct which is filled in by exynos4210_init_board_irqs() with the appropriate qemu_irqs for each IRQ the board/SoC can assert *

Re: [PATCH] hmat acpi: Don't require initiator value in -numa when hmat=on

On Wed, 6 Apr 2022 14:29:56 +0200 Brice Goglin wrote: > From: Brice Goglin > > The "Memory Proximity Domain Attributes" structure of the ACPI HMAT > has a "Processor Proximity Domain Valid" flag that is currently > always set because Qemu -numa requires initiator=X when hmat=on. > > Unsetting

Re: [PATCH for-7.1 04/18] hw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq struct

On 4/4/22 10:46, Peter Maydell wrote: The only time we use the int_gic_irq[] array in the Exynos4210Irq struct is in the exynos4210_realize() function: we initialize it with the GPIO inputs of the a9mpcore device, and then a bit later on we connect those to the outputs of the internal combiner.

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