Re: [RFC PATCH v4 11/36] i386/tdx: Initialize TDX before creating TD vcpus

Hi, > > Hmm, hooking *vm* initialization into *vcpu* creation looks wrong to me. > > That's because for TDX, it has to do VM-scope (feature) initialization > before creating vcpu. This is new to KVM and QEMU, that every feature is > vcpu-scope and configured per-vcpu before. > > To minimize th

[RFC PATCH 12/13] vfio/migration: add some trace-events for vfio migration plugin

Add some trace-events including trace_vfio_migration_plugin_probe trace_vfio_plugin_save_buffer, trace_vfio_plugin_load_state_device_data trace_vfio_update_pending, and trace_vfio_migration_set_state to make debugging easier. Signed-off-by: Lei Rao Reviewed-by: Eddie Dong --- hw/vfio/migration-

Re: [RFC PATCH v4 07/36] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object

> > > +#ifdef CONFIG_TDX > > > +bool is_tdx_vm(void); > > > +#else > > > +#define is_tdx_vm() 0 > > > > Just add that to the tdx-stubs.c file you already created in one of the > > previous patches and drop this #ifdef mess ;) > > This is for consistency with SEV. Anyway Either way is okay. > Fr

[RFC PATCH 10/13] vfio/pci: introduce command-line parameters to specify migration method

Add command-line parameters (x-plugin-path and x-plugin-arg) of migration plugin for VFIO PCI functions. x-plugin-path indicates the path of a dynamic load library and x-plugin-arg is the necessary parameter to load and use it. A typical example is, if the plugin communicates with the agent running

[RFC PATCH 07/13] vfio/migration: move the statistics of bytes_transferred to generic VFIO migration layer

The statistics of bytes transferred conceptually belong to The VFIO live migration framework, and should not belong to any specific implementation such In-Band approach, so move it out from vfio_migration_region_save_buffer(), which makes it easier to add other implementations. Signed-off-by: Lei

[RFC PATCH 09/13] vfio/migration: move the functions of In-Band approach to a new file

Moving the functions of In-Band approach into a new file to match with the new abstraction layer of migration ops. Signed-off-by: Lei Rao Reviewed-by: Eddie Dong --- hw/vfio/meson.build | 1 + hw/vfio/migration-local.c | 453 ++ hw/vfio/migration.

[RFC PATCH 11/13] vfio/migration: add a plugin layer to support out-of-band live migration

Introduce a plugin mechanism under VFIOMigrationOps layer. Each vendor can provide a dynamic load library that implements the communication driver to talk with IPU/DPU backend agent for saving and restoring device state during live migration. There are three interfaces between QEMU VFIO and a migr

[RFC PATCH 13/13] vfio/migration: make the region and plugin member of struct VFIOMigration to be a union

Since a VFIO device either uses In-Band or Out-of-Band live migration. So, the region and plugin in VFIOMigration can be put into a union. Signed-off-by: Lei Rao Reviewed-by: Eddie Dong --- hw/vfio/migration-local.c | 33 ++--- include/hw/vfio/vfio-common.h | 6

[RFC PATCH 06/13] vfio/migration: introduce VFIOMigrationOps layer in VFIO live migration framework

Add an abstraction layer, VFIOMigrationOps, to the VFIO live migration framework. Also adapt the In-Band approach to this abstraction layer by defining its own VFIOMigrationOps callbacks. Signed-off-by: Lei Rao Reviewed-by: Eddie Dong --- hw/vfio/migration.c | 203

[RFC PATCH 05/13] vfio/migration: rename functions that relate to the In-Band approach

Rename some functions that are related to the In-Band approach to facilitate introducing generic vfio live migration layer. Rename vfio_migration_set_state to vfio_migration_set_state_local, vfio_save_buffer to vfio_migration_save_buffer_local, vfio_load_buffer to vfio_migration_load_buffer_local,

[RFC PATCH 08/13] vfio/migration: split migration handler registering from vfio_migration_init

vfio_migration_init() is mainly related to initialization of In-Band approach. Migration handler registering may also be used by other approaches. so split it from vfio_migration_init() and move it to vfio_migration_probe(). Signed-off-by: Lei Rao Reviewed-by: Eddie Dong --- hw/vfio/migration.c

[RFC PATCH 04/13] vfio/migration: Separated functions that relate to the In-Band approach

Split functions of In-Band approach from common function, to prepare for the introduction of generic VFIO live migration layer and another Sub-Ops. Signed-off-by: Lei Rao Reviewed-by: Eddie Dong --- hw/vfio/migration.c | 64 ++--- 1 file changed, 49 inser

[RFC PATCH 01/13] vfio/migration: put together checks of migration initialization conditions

Current VFIO live migration initialization code is tightly coupled with local migration region handling. It is necessary to decouple it to facilitate the introduction of a generic VFIO live migration framework so that other approaches can be possible besides the In-Band approach. This patch puts v

[RFC PATCH 02/13] vfio/migration: move migration struct allocation out of vfio_migration_init

Migration struct is a common data structure. Memory allocation of migration struct is not unique to In-Band approach. So, move it from vfio_migration_init() to vfio_migration_probe(). Signed-off-by: Lei Rao --- hw/vfio/migration.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-

[RFC PATCH 00/13] Add a plugin to support out-of-band live migration for VFIO pass-through device

Migration of a VFIO passthrough device can be supported by using a device specific kernel driver to save/restore the device state thru device specific interfaces. But this approach doesn't work for devices that lack a state migration interface, e.g. NVMe. On the other hand, Infrastructure Proce

[RFC PATCH 03/13] vfio/migration: move vfio_get_dev_region_info out of vfio_migration_probe

vfio_get_dev_region_info() in vfio_migration_probe() is a specific operation of In-Band approach. So, it's better to put it in vfio_migration_init() because most of the setup of In-Band approach are handled there. The vfio_migration_init will be rename to vfio_migration_probe_local(). Signed-off-

[PATCH v2] target/riscv: add support for zmmul extension v0.1

- includes all multiplication operations for M extension Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang v2: * disable M when both M and Zmmul are enabled --- target/riscv/cpu.c | 7 +++ target/riscv/cpu.h | 1 + target/riscv/insn_trans/

Re: [PATCH] target/riscv: add support for zmmul extension v0.1

On Tue, May 24, 2022 at 12:25 PM Weiwei Li wrote: > > > 在 2022/5/24 上午5:15, Alistair Francis 写道: > > On Mon, May 23, 2022 at 6:10 PM Weiwei Li wrote: > > 在 2022/5/23 下午2:34, Alistair Francis 写道: > > On Wed, May 18, 2022 at 11:54 AM Weiwei Li wrote: > > - includes all multiplication operations

Re: [RFC PATCH v4 13/36] i386/tdx: Validate TD attributes

On 5/23/2022 5:39 PM, Gerd Hoffmann wrote: Validate TD attributes with tdx_caps that fixed-0 bits must be zero and fixed-1 bits must be set. -static void setup_td_guest_attributes(X86CPU *x86cpu) +static int tdx_validate_attributes(TdxGuest *tdx) +{ +if (((tdx->attributes & tdx_caps->attrs

Re: [RFC 0/3] Introduce a new Qemu machine for RISC-V

On Sun, May 22, 2022 at 10:59 PM Alistair Francis wrote: > > On Wed, May 18, 2022 at 4:38 PM Atish Patra wrote: > > > > On Tue, May 17, 2022 at 1:54 PM Alistair Francis > > wrote: > > > > > > On Tue, May 17, 2022 at 6:52 PM Daniel P. Berrangé > > > wrote: > > > > > > > > On Tue, May 17, 2022

Npcm7xx emac tap networking hitting 75MiB limit

Hey; I wanted to ask if anyone has seen this before. When we try to download a file larger than 75MB from within an Ncpm7xx board using TAP networking (versus user) it just fails there. using wget it reports null 75.0M - stalled -\rnull 75.0M - stalled -\rnull

Re: [PATCH] target/riscv: add support for zmmul extension v0.1

在 2022/5/24 上午5:15, Alistair Francis 写道: On Mon, May 23, 2022 at 6:10 PM Weiwei Li wrote: 在 2022/5/23 下午2:34, Alistair Francis 写道: On Wed, May 18, 2022 at 11:54 AM Weiwei Li wrote: - includes all multiplication operations for M extension Signed-off-by: Weiwei Li Signed-off-by: Junqian

[PATCH v9 07/12] target/riscv: Support mcycle/minstret write operation

From: Atish Patra mcycle/minstret are actually WARL registers and can be written with any given value. With SBI PMU extension, it will be used to store a initial value provided from supervisor OS. The Qemu also need prohibit the counter increment if mcountinhibit is set. Support mcycle/minstret

[PATCH v9 11/12] hw/riscv: virt: Add PMU DT node to the device tree

Qemu virt machine can support few cache events and cycle/instret counters. It also supports counter overflow for these events. Add a DT node so that OpenSBI/Linux kernel is aware of the virt machine capabilities. There are some dummy nodes added for testing as well. Signed-off-by: Atish Patra Si

[PATCH v9 06/12] target/riscv: Add support for hpmcounters/hpmevents

From: Atish Patra With SBI PMU extension, user can use any of the available hpmcounters to track any perf events based on the value written to mhpmevent csr. Add read/write functionality for these csrs. Reviewed-by: Alistair Francis Reviewed-by: Bin Meng Signed-off-by: Atish Patra Signed-off-

[PATCH v9 10/12] target/riscv: Add few cache related PMU events

From: Atish Patra Qemu can monitor the following cache related PMU events through tlb_fill functions. 1. DTLB load/store miss 3. ITLB prefetch miss Increment the PMU counter in tlb_fill function. Reviewed-by: Alistair Francis Signed-off-by: Atish Patra Signed-off-by: Atish Patra --- target

[PATCH v9 12/12] target/riscv: Update the privilege field for sscofpmf CSRs

The sscofpmf extension was ratified as a part of priv spec v1.12. Mark the csr_ops accordingly. Signed-off-by: Atish Patra --- target/riscv/csr.c | 90 ++ 1 file changed, 60 insertions(+), 30 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv

[PATCH v9 05/12] target/riscv: Implement mcountinhibit CSR

From: Atish Patra As per the privilege specification v1.11, mcountinhibit allows to start/stop a pmu counter selectively. Reviewed-by: Bin Meng Reviewed-by: Alistair Francis Signed-off-by: Atish Patra Signed-off-by: Atish Patra --- target/riscv/cpu.h | 2 ++ target/riscv/cpu_bits.h |

[PATCH v9 09/12] target/riscv: Simplify counter predicate function

All the hpmcounters and the fixed counters (CY, IR, TM) can be represented as a unified counter. Thus, the predicate function doesn't need handle each case separately. Simplify the predicate function so that we just handle things differently between RV32/RV64 and S/HS mode. Reviewed-by: Bin Meng

[PATCH v9 08/12] target/riscv: Add sscofpmf extension support

The Sscofpmf ('Ss' for Privileged arch and Supervisor-level extensions, and 'cofpmf' for Count OverFlow and Privilege Mode Filtering) extension allows the perf to handle overflow interrupts and filtering support. This patch provides a framework for programmable counters to leverage the extension. A

[PATCH v9 03/12] target/riscv: pmu: Rename the counters extension to pmu

From: Atish Patra The PMU counters are supported via cpu config "Counters" which doesn't indicate the correct purpose of those counters. Rename the config property to pmu to indicate that these counters are performance monitoring counters. This aligns with cpu options for ARM architecture as wel

[PATCH v9 04/12] target/riscv: pmu: Make number of counters configurable

The RISC-V privilege specification provides flexibility to implement any number of counters from 29 programmable counters. However, the QEMU implements all the counters. Make it configurable through pmu config parameter which now will indicate how many programmable counters should be implemented b

[PATCH v9 01/12] target/riscv: Fix PMU CSR predicate function

From: Atish Patra The predicate function calculates the counter index incorrectly for hpmcounterx. Fix the counter index to reflect correct CSR number. Fixes: e39a8320b088 ("target/riscv: Support the Virtual Instruction fault") Reviewed-by: Alistair Francis Reviewed-by: Bin Meng Signed-off-by

[PATCH v9 00/12] Improve PMU support

The latest version of the SBI specification includes a Performance Monitoring Unit(PMU) extension[1] which allows the supervisor to start/stop/configure various PMU events. The Sscofpmf ('Ss' for Privileged arch and Supervisor-level extensions, and 'cofpmf' for Count OverFlow and Privilege Mode Fil

[PATCH v9 02/12] target/riscv: Implement PMU CSR predicate function for S-mode

From: Atish Patra Currently, the predicate function for PMU related CSRs only works if virtualization is enabled. It also does not check mcounteren bits before before cycle/minstret/hpmcounterx access. Support supervisor mode access in the predicate function as well. Reviewed-by: Alistair Franc

Re: [PATCH] target/riscv: add zicsr/zifencei to isa_string

On Wed, May 18, 2022 at 10:50 PM Hongren (Zenithal) Zheng wrote: > > Zicsr/Zifencei is not in 'I' since ISA version 20190608, > thus to fully express the capability of the CPU, > they should be exposed in isa_string. > > Signed-off-by: Hongren (Zenithal) Zheng Thanks! Applied to riscv-to-apply

Re: [PATCH v2 06/12] target/ppc: implement xscvspdpn with helper_todouble

On 5/23/22 12:54, Richard Henderson wrote: On 5/23/22 06:48, Daniel Henrique Barboza wrote: Checking 0006-target-ppc-declare-xscvspdpn-helper-with-call-flags.patch... ERROR: spaces required around that '*' (ctx:WxV) #69: FILE: target/ppc/translate/vsx-impl.c.inc:1049: +bool trans_XSCVSPDPN(Di

Re: [RFC PATCH] mpqemu: Remove unlock/lock of iothread in mpqemu-link send and recv functions

> On May 23, 2022, at 11:09 AM, Alexander Duyck > wrote: > > From: Alexander Duyck > > When I run Multi-process QEMU with an e1000 as the remote device and SMP > enabled I see the combination lock up and become unresponsive. The QEMU build > is a fairly standard x86_64-softmmu setup. After d

Re: [PATCH] target/riscv: add zicsr/zifencei to isa_string

On Tue, May 24, 2022 at 2:51 AM Hongren (Zenithal) Zheng wrote: > > On Mon, May 23, 2022 at 09:22:15AM +1000, Alistair Francis wrote: > > On Wed, May 18, 2022 at 10:50 PM Hongren (Zenithal) Zheng > > wrote: > > > > > > Zicsr/Zifencei is not in 'I' since ISA version 20190608, > > > thus to fully

Re: [PATCH v2 7/8] target/riscv: Force disable extensions if priv spec version does not match

On Fri, May 20, 2022 at 1:07 AM Anup Patel wrote: > > On Tue, May 17, 2022 at 5:46 AM Alistair Francis wrote: > > > > On Thu, May 12, 2022 at 12:52 AM Anup Patel wrote: > > > > > > We should disable extensions in riscv_cpu_realize() if minimum required > > > priv spec version is not satisfied. T

Re: [RESEND PATCH v2] target/riscv: Fix typo of mimpid cpu option

On Tue, May 24, 2022 at 1:36 AM wrote: > > From: Frank Chang > > "mimpid" cpu option was mistyped to "mipid". > > Fixes: 9951ba94 ("target/riscv: Support configuarable marchid, mvendorid, > mipid CSR values") > Signed-off-by: Frank Chang > Reviewed-by: Alistair Francis Thanks! Applied to ris

Re: [PATCH qemu v18 02/16] target/riscv: rvv: Prune redundant access_type parameter passed

On Fri, May 13, 2022 at 9:50 PM ~eopxd wrote: > > From: eopXD > > No functional change intended in this commit. > > Signed-off-by: eop Chen Reviewed-by: Alistair Francis Alistair > --- > target/riscv/vector_helper.c | 35 --- > 1 file changed, 16 insertions(+

Re: [PATCH v2 8/8] hw/riscv: virt: Fix interrupt parent for dynamic platform devices

On Thu, May 12, 2022 at 12:53 AM Anup Patel wrote: > > When both APLIC and IMSIC are present in virt machine, the APLIC should > be used as parent interrupt controller for dynamic platform devices. > > In case of multiple sockets, we should prefer interrupt controller of > socket0 for dynamic pla

Re: [PATCH v2 4/8] target/riscv: Update [m|h]tinst CSR in riscv_cpu_do_interrupt()

On Thu, May 12, 2022 at 12:47 AM Anup Patel wrote: > > We should write transformed instruction encoding of the trapped > instruction in [m|h]tinst CSR at time of taking trap as defined > by the RISC-V privileged specification v1.12. > > Signed-off-by: Anup Patel > --- > target/riscv/cpu_helper.c

Re: [PATCH] linux-user/host/s390: Treat EX and EXRL as writes

Le 04/05/2022 à 13:48, Ilya Leoshkevich a écrit : clang-built s390x branch-relative-long test fails on clang-built s390x QEMU due to the following sequence of events: - The test zeroes out a code page, clang generates exrl+xc for this. - do_helper_xc() is called. Clang generates exrl+xc there a

Fast usermode networking with QEMU

I came across this blog post[0] concerning passt, which is an alternative usermode networking implementation for QEMU. I'm working on a project that uses QEMU on Windows hosts running Linux guests. I'm trying to get faster usermode networking than is available with libslirp. My performance targ

Re: [PATCH] target/riscv: add support for zmmul extension v0.1

On Mon, May 23, 2022 at 6:10 PM Weiwei Li wrote: > > > 在 2022/5/23 下午2:34, Alistair Francis 写道: > > On Wed, May 18, 2022 at 11:54 AM Weiwei Li wrote: > >> - includes all multiplication operations for M extension > >> > >> Signed-off-by: Weiwei Li > >> Signed-off-by: Junqiang Wang > >> --- > >

[PATCH 13/18] target/arm: Move MDCR_TDE test into exception_target_el

Add a debug parameter, and when true test MDCR_EL2.TDE. Use this in arm_debug_target_el. Signed-off-by: Richard Henderson --- target/arm/internals.h | 20 +++- target/arm/op_helper.c | 12 ++-- target/arm/tlb_helper.c | 4 ++-- 3 files changed, 15 insertions(+), 21 del

Re: [PULL 2/3] qga-win32: Add support for NVME but type

On 5/23/22 12:41, Konstantin Kostiuk wrote: Bus type spaces (Indicates a storage spaces bus) is not supported, so return it as unknown. Signed-off-by: Konstantin Kostiuk Message-Id: <20220520201401.706630-1-kkost...@redhat.com> Reviewed-by: Marc-André Lureau Signed-off-by: Konstantin Kostiuk

[PATCH 14/18] target/arm: Mark exception helpers as noreturn

Signed-off-by: Richard Henderson --- target/arm/helper.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index b1334e0c42..5161cdf73d 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -44,9 +44,9 @@ DEF_HELPER_FLAGS_2

[PATCH 10/18] target/arm: Move arm_debug_exception_fsr to debug_helper.c

This function now now only used in debug_helper.c, so there is no reason to have a declaration in a header. Signed-off-by: Richard Henderson --- target/arm/internals.h| 25 - target/arm/debug_helper.c | 26 ++ 2 files changed, 26 insertions(+),

[PATCH 16/18] target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_EL

We no longer need this value during translation, as it is now handled within the helpers. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 6 ++ target/arm/translate.h | 2 -- target/arm/helper.c| 12 ++-- target/arm/translate-a64.c | 1 - target/arm/t

Re: [PATCH 0/2] linux-user/s390x: Fix unwinding from signal handlers

Le 04/05/2022 à 00:51, Ilya Leoshkevich a écrit : Hi, This is the fix for the issue discussed in [1]. Patch 1 fixes the issue itself, patch 2 adds a test. [1] https://lists.nongnu.org/archive/html/qemu-devel/2022-04/msg05127.html Best regards, Ilya Ilya Leoshkevich (2): linux-user/s390x: F

[PATCH 18/18] target/arm: Remove route_to_el2 case from sve_exception_el

This adjustment is handled by exception_target_el. Signed-off-by: Richard Henderson --- target/arm/helper.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 63c3fee5ff..5c875927cf 100644 --- a/target/arm/helper.c +++ b/target/a

[PATCH 12/18] target/arm: Create raise_exception_debug

Handle EL testing for debug exceptions in a single place. Split out raise_exception_int as a common helper. Signed-off-by: Richard Henderson --- target/arm/internals.h| 8 target/arm/debug_helper.c | 27 target/arm/op_helper.c| 43 ++

[PATCH 08/18] target/arm: Use is_a64 in arm_generate_debug_exceptions

Use the accessor rather than the raw structure member. Signed-off-by: Richard Henderson --- target/arm/debug_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 2bbf065b3a..3a86901779 100644 --- a/target/arm/deb

[PATCH 17/18] target/arm: Add cur_el parameter to arm_generate_debug_exceptions

We often have this value already handy in the caller. Signed-off-by: Richard Henderson --- target/arm/internals.h| 2 +- target/arm/debug_helper.c | 11 +-- target/arm/helper-a64.c | 2 +- 3 files changed, 7 insertions(+), 8 deletions(-) diff --git a/target/arm/internals.h b/tar

[PATCH 11/18] target/arm: Move arm_debug_target_el to internals.h

This function is private to the implementation. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 21 - target/arm/internals.h | 21 + 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 92

[PATCH 15/18] target/arm: Create helper_exception_swstep

Move the computation from gen_swstep_exception into a helper. The assert removed here is present in raise_exception_debug. Signed-off-by: Richard Henderson --- target/arm/helper.h | 1 + target/arm/translate.h| 12 +++- target/arm/debug_helper.c | 5 + 3 files changed, 9

Re: [PATCH v2 0/3] linux-user: Use CPUArchState* instead of void* when possible

Le 09/05/2022 à 22:57, Philippe Mathieu-Daudé a écrit : From: Philippe Mathieu-Daudé Since v1: - Rebased v1: https://lore.kernel.org/qemu-devel/20220306234005.52511-1-philippe.mathieu.da...@gmail.com/ Philippe Mathieu-Daudé (3): linux-user/elfload: Remove pointless non-const CPUArchState

[PATCH 06/18] target/arm: Move arm_generate_debug_exceptions out of line

Move arm_generate_debug_exceptions and its two subroutines, {aa32,aa64}_generate_debug_exceptions into debug_helper.c, and the one interface declaration to internals.h. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 91 - target/arm/internals

[PATCH 07/18] target/arm: Hoist arm_current_el in arm_generate_debug_exceptions

Read this value once in the main function, and pass it around between the subroutines. Signed-off-by: Richard Henderson --- target/arm/debug_helper.c | 21 ++--- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c

[PATCH 02/18] target/arm: Use arm_current_el for simple exceptions

For these cases, the syndrome does not depend on the origin or target EL, so we can simply defer selection of the target EL to raise_exception. Signed-off-by: Richard Henderson --- target/arm/helper-a64.c | 5 +++-- target/arm/helper.c | 10 +++--- target/arm/mte_helper.c | 7 +++

[PATCH 09/18] target/arm: Move exception_bkpt_insn to debug_helper.c

Signed-off-by: Richard Henderson --- target/arm/debug_helper.c | 31 +++ target/arm/op_helper.c| 29 - 2 files changed, 31 insertions(+), 29 deletions(-) diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 3a8690177

[PATCH 04/18] target/arm: Move HCR_TGE check into exception_target_el

Move the TGE test from raise_exception into exception_target_el to consolidate tests in one place. Note that this ought to apply only to origin of EL0, but that cannot be confirmed at this time. Update the AdvSIMDFPAccessTrap doc reference to DDI0478H.a. Signed-off-by: Richard Henderson --- targ

[PATCH 01/18] target/arm: Allow raise_exception to handle finding target EL

The work of finding the correct target EL for an exception is currently split between raise_exception and target_exception_el. Begin merging these by allowing the input to raise_exception to be zero and use exception_target_el for that case. Signed-off-by: Richard Henderson --- target/arm/intern

[PATCH 05/18] target/arm: Move arm_singlestep_active out of line

Move the function to debug_helper.c, and the declaration to internals.h. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 10 -- target/arm/internals.h| 1 + target/arm/debug_helper.c | 12 3 files changed, 13 insertions(+), 10 deletions(-) diff --git a

[PATCH 03/18] target/arm: Move and expand parameters to exception_target_el

Move exception_target_el out of line. Add cur_el parameter, because 2 of 3 users already have that handy. Add psyn parameter in preparation for more code movement. Signed-off-by: Richard Henderson --- target/arm/internals.h | 15 +-- target/arm/op_helper.c | 17 - t

[PATCH 00/18] target/arm: tidy exception routing

The target el for raising an exception currently lives in at least 3 places: exception_target_el, arm_debug_target_el, and in {sve,fp}_exception_el. This patch set aims to put all of the routing into the same place. For the purposes of prep for SME, the goal is the last patch, where we do not con

Re: [PATCH v2] linux-user/syscall.c: fix build without RLIMIT_RTTIME

Le 23/05/2022 à 12:52, Fabrice Fontaine a écrit : RLIMIT_RTTIME is not provided by uclibc-ng or by musl prior to version 1.2.0 and https://github.com/bminor/musl/commit/2507e7f5312e79620f6337935d0a6c9045ccba09 resulting in the following build failure since https://git.qemu.org/?p=qemu.git;a=commi

Re: [PATCH 2/5] machine.py: add default pseries params in machine.py

On 19/05/2022 20:18, John Snow wrote: On Mon, May 16, 2022, 12:53 PM Daniel Henrique Barboza mailto:danielhb...@gmail.com>> wrote: pSeries guests set a handful of machine capabilities on by default, all of them related to security mitigations, that aren't always available in the hos

[PULL 2/3] qga-win32: Add support for NVME but type

Bus type spaces (Indicates a storage spaces bus) is not supported, so return it as unknown. Signed-off-by: Konstantin Kostiuk Message-Id: <20220520201401.706630-1-kkost...@redhat.com> Reviewed-by: Marc-André Lureau Signed-off-by: Konstantin Kostiuk --- qga/commands-win32.c | 5 + 1 file ch

[PULL 1/3] qga: add guest-get-diskstats command for Linux guests

From: luzhipeng Add a new 'guest-get-diskstats' command for report disk io statistics for Linux guests. This can be useful for getting io flow or handling IO fault, no need to enter guests. Signed-off-by: luzhipeng Message-Id: <20220520021935.676-1-luzhip...@cestc.cn> Reviewed-by: Marc-André Lu

Re: [PATCH] block: drop unused bdrv_co_drain() API

On Sat, May 21, 2022 at 1:27 PM Stefan Hajnoczi wrote: > bdrv_co_drain() has not been used since commit 9a0cec664eef ("mirror: > use bdrv_drained_begin/bdrv_drained_end") in 2016. Remove it so there > are fewer drain scenarios to worry about. > > Use bdrv_drained_begin()/bdrv_drained_end() instead

[PULL 3/3] trivial: qga: Log version on start

Signed-off-by: Konstantin Kostiuk Reviewed-by: Marc-André Lureau Message-Id: <20220523191644.823726-2-kkost...@redhat.com> Signed-off-by: Konstantin Kostiuk --- qga/main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qga/main.c b/qga/main.c index 3b9546c185..c373fec3ee 100644 --- a/qga

[PULL 0/3] qemu-ga patches

The following changes since commit 3757b0d08b399c609954cf57f273b1167e5d7a8d: Merge tag 'pull-request-2022-05-18' of https://gitlab.com/thuth/qemu into staging (2022-05-20 08:04:30 -0700) are available in the Git repository at: g...@github.com:kostyanf14/qemu.git tags/qga-win32-pull-2022-05-

Re: can QEMU's arm smmu model handle non-PCI devices?

Hi Peter, On 5/23/22 16:52, Peter Maydell wrote: > Hi; in real hardware an SMMUv3 might be sat in front of any > DMA-capable device. Putting one in front of a PCI bus is common > but not the only use case. Does QEMU's SMMUv3 model handle that, > or is the implementation currently restricted to only

Re: [PATCH v2 00/10] Random cleanup patches

On 5/21/22 06:55, Mark Cave-Ayland wrote: On 20/05/2022 19:00, Bernhard Beschow wrote: v2: * Omit removal of isa_connect_gpio_out() (Mark) v1: This patch series contains random cleanups that I made while studying the code. Bernhard Beschow (10):    hw: Reuse TYPE_I8042 define    hw/audio/c

Re: proposed 7.1 release schedule

On Mon, 23 May 2022 at 16:08, Richard Henderson wrote: > > On 5/23/22 02:53, Peter Maydell wrote: > > I just put some proposed dates into the 7.1 schedule page: > > https://wiki.qemu.org/Planning/7.1#Release_Schedule > > > > * 2022-07-12 Softfreeze > > * 2022-07-19 Hardfreeze. Tag rc0 > > * 2022

Re: [PATCH 0/4] ppc: improve some memory ordering issues

Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel On 5/19/22 10:59, Nicholas Piggin wrote: Since RFC[*], this fixes a compile issue noticed by Richard, and has survived some basic stressing with mttcg. Thanks, Nick [*] https://lists.nongnu.org/archive/html/qemu-ppc/2022-05/msg

Re: [PATCH v2 00/12] Change helper declarations to use call flags

Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel On 5/19/22 17:18, matheus.fe...@eldorado.org.br wrote: From: Matheus Ferst In our "PowerISA Vector/VSX instruction batch" patch series, rth noted[1] that helpers that only access vector registers should be declared with DEF_HEL

Re: [PATCH v3 2/3] ui: Switch "-display sdl" to use the QAPI parser

On 23/05/2022 15.45, Markus Armbruster wrote: Thomas Huth writes: The "-display sdl" option still uses a hand-crafted parser for its parameters since we didn't want to drag an interface we considered somewhat flawed into the QAPI schema. Since the flaws are gone now, it's time to QAPIfy. This

Re: [PATCH] pnv/xive2: Don't overwrite PC registers when writing TCTXT registers

Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel On 5/23/22 12:18, Frederic Barrat wrote: When writing a register from the TCTXT memory region (4th page within the IC BAR), we were overwriting the Presentation Controller (PC) register at the same offset. It looks like a silly c

Re: [PATCH] trivial: qga: Log version on start

On Mon, May 23, 2022 at 8:35 PM Marc-André Lureau < marcandre.lur...@redhat.com> wrote: > On Mon, May 23, 2022 at 4:56 PM Konstantin Kostiuk > wrote: > > > > Signed-off-by: Konstantin Kostiuk > > why not, and why not QEMU_FULL_VERSION? :) > QEMU_FULL_VERSION is good too, no specific reason to u

Re: [PATCH v5] qga: add guest-get-diskstats command for Linux guests

Queued, thanks. On Fri, May 20, 2022 at 1:19 PM Konstantin Kostiuk wrote: > Reviewed-by: Konstantin Kostiuk > > On Fri, May 20, 2022 at 5:20 AM luzhipeng wrote: > >> Add a new 'guest-get-diskstats' command for report disk io statistics >> for Linux guests. This can be useful for getting io flo

[PATCH v2 0/1] trivial: qga: Log version on start

v1 -> v2: Use QEMU_FULL_VERSION instead of QEMU_VERSION v1: https://patchew.org/QEMU/20220523145610.809663-1-kkost...@redhat.com/ Konstantin Kostiuk (1): trivial: qga: Log version on start qga/main.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.25.1

[PATCH v2 1/1] trivial: qga: Log version on start

Signed-off-by: Konstantin Kostiuk Reviewed-by: Marc-André Lureau --- qga/main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qga/main.c b/qga/main.c index 3b9546c185..c373fec3ee 100644 --- a/qga/main.c +++ b/qga/main.c @@ -1271,6 +1271,8 @@ static GAState *initialize_agent(GAConfig *con

Re: [PATCH v3 05/15] osdep: export qemu_open_cloexec()

Hi On Mon, May 23, 2022 at 8:11 PM Daniel P. Berrangé wrote: > On Mon, May 23, 2022 at 08:02:45PM +0200, Marc-André Lureau wrote: > > Hi > > > > On Mon, May 23, 2022 at 7:56 PM Daniel P. Berrangé > > wrote: > > > > > On Mon, May 23, 2022 at 07:30:42PM +0200, Marc-André Lureau wrote: > > > > Hi

Re: [PATCH v2] target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-capable host

Queued, thanks. Paolo

Re: TianoCore "Add QEMU support to MinPlatform (OpenQEMUBoardPkg)" GSoC project

On Mon, 23 May 2022 at 19:00, Pedro Falcato wrote: > > Hi Stefan, Gerd, > > Some questions: Is emulation of the current boards ever going to be expanded? > For instance, can FW rely on the emulation being relatively simple or do you > actually need to look at chipset docs? > For example, I was l

Re: [PATCH v3 05/15] osdep: export qemu_open_cloexec()

Hi On Mon, May 23, 2022 at 7:56 PM Daniel P. Berrangé wrote: > On Mon, May 23, 2022 at 07:30:42PM +0200, Marc-André Lureau wrote: > > Hi > > > > On Mon, May 23, 2022 at 2:43 PM Daniel P. Berrangé > > wrote: > > > > > On Fri, May 13, 2022 at 08:08:11PM +0200, marcandre.lur...@redhat.com > > > wr

Re: [PATCH v3 23/49] semihosting: Split out semihost_sys_open

On 5/23/22 09:54, Peter Maydell wrote: On Mon, 23 May 2022 at 16:46, Richard Henderson wrote: Also, I think I mentioned this in the v2 cover but not here, that having done the errno conversion here for arm semihosting, it worked less well for mips and xtensa, which have a rather better define

[PATCH v2 09/11] target/ppc: implement addg6s

From: Matheus Ferst Implements the following Power ISA v2.06 instruction: addg6s: Add and Generate Sixes Signed-off-by: Matheus Ferst Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 4 +++ target/ppc/translate/fixedpoint-impl.c.inc | 37 ++

Re: [PATCH v3 0/3] target/ppc: Fix FPSCR.FI bit

Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel On 5/17/22 13:15, Víctor Colombo wrote: Hello everyone, According to Power ISA, the FI bit in FPSCR is non-sticky. This means that if an instruction is said to modify the FI bit, then it should be set or cleared depending on the

[PATCH v2 08/11] target/ppc: Add flag for ISA v2.06 BCDA instructions

From: Matheus Ferst Adds an insns_flags2 for the BCD assist instructions introduced in Power ISA 2.06. These instructions are not listed in the manuals for e5500[1] and e6500[2], so the flag is only added for POWER7/8/9/10 models. [1] https://www.nxp.com/files-static/32bit/doc/ref_manual/EREF_RM

Re: [PATCH v3 05/15] osdep: export qemu_open_cloexec()

On Mon, May 23, 2022 at 08:02:45PM +0200, Marc-André Lureau wrote: > Hi > > On Mon, May 23, 2022 at 7:56 PM Daniel P. Berrangé > wrote: > > > On Mon, May 23, 2022 at 07:30:42PM +0200, Marc-André Lureau wrote: > > > Hi > > > > > > On Mon, May 23, 2022 at 2:43 PM Daniel P. Berrangé > > > wrote: >

Re: [PATCH 6/9] vfio/migration: Implement VFIO migration protocol v2

On 5/12/22 16:43, Avihai Horon wrote: > Replace the current VFIO migration protocol v1 implementation with a new > implementation corresponding to VFIO migration protocol v2. > > The main changes are: > - VFIO device state is now represented as a finite state machine instead > of a bitmap. > >

[PATCH v2 06/11] target/ppc: Implement mffscdrn[i] instructions

Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 5 target/ppc/translate/fp-impl.c.inc | 41 ++ 2 files changed, 46 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 76bd9e4f57..a333f33a55 100644 --- a/tar

Re: [RFC PATCH] 9p: case-insensitive host filesystems

On Freitag, 22. April 2022 21:57:40 CEST Dominique Martinet wrote: > Christian Schoenebeck wrote on Fri, Apr 22, 2022 at 08:02:46PM +0200: > > So maybe it's better to handle case-insensitivity entirely on client side? > > I've read that some generic "case fold" code has landed in the Linux > > kern

[PATCH v2 05/11] target/ppc: Move mffs[.] to decodetree

Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 4 target/ppc/translate/fp-impl.c.inc | 35 +++--- target/ppc/translate/fp-ops.c.inc | 1 - 3 files changed, 21 insertions(+), 19 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc

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