I need to determine the set of instruction encodings that the TCG can
support for a given platform. I am not bothered whether the target runs at
all, and in fact it is better if it doesn't, so runtime or translate time
doesn't bother me.
Imagine I were adding support for more instructions for a
>-Original Message-
>From: Peter Xu
>Sent: Thursday, June 23, 2022 5:05 AM
>To: Duan, Zhenzhong
>Cc: qemu-devel@nongnu.org; pbonz...@redhat.com; da...@redhat.com;
>f4...@amsat.org
>Subject: Re: [PATCH] memory: Fix wrong end address dump
>
>On Wed, Jun 22, 2022 at 05:59:12PM +0800,
>-Original Message-
>From: Peter Xu
>Sent: Thursday, June 23, 2022 5:03 AM
>To: Duan, Zhenzhong
>Cc: qemu-devel@nongnu.org; pbonz...@redhat.com; da...@redhat.com;
>f4...@amsat.org
>Subject: Re: [PATCH] softmmu/physmem: Fix input parameters for
>flatview_access_allowed()
>
>On Wed, Jun
On Mon, Jul 18, 2022 at 09:56:17AM +0100, Daniel P. Berrangé wrote:
> On Sat, Jul 16, 2022 at 10:34:34AM -0700, Peter Delevoryas wrote:
> > On macOS, private $TMPDIR's are the default. These $TMPDIR's are
> > generated from a user's unix UID and UUID [1], which can create a
> > relatively long
On Tue, Jul 19, 2022 at 12:30 AM Eugenio Pérez wrote:
>
> This is needed so the destination vdpa device see the same state a the
> guest set in the source.
>
> Signed-off-by: Eugenio Pérez
> ---
> include/net/vhost-vdpa.h | 1 +
> hw/net/vhost_net.c | 8 +
> net/vhost-vdpa.c
在 2022/7/21 下午11:31, Mayuresh Chitale 写道:
Add knobs to allow users to enable smstateen and also export it via the
ISA extension string.
Signed-off-by: Mayuresh Chitale
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
在 2022/7/21 下午11:31, Mayuresh Chitale 写道:
If smstateen is implemented then accesses to AIA
registers CSRS, IMSIC CSRs and other IMSIC registers
is controlled by setting of corresponding bits in
mstateen/hstateen registers. Otherwise an illegal
instruction trap or virtual instruction trap is
在 2022/7/21 下午11:31, Mayuresh Chitale 写道:
If smstateen is implemented and sstateen0.fcsr is clear then the
floating point operations must return illegal instruction exception.
Signed-off-by: Mayuresh Chitale
---
target/riscv/csr.c| 23 ++
Historically, The mtime/mtimecmp has been part of the CPU because
they are per hart entities. However, they actually belong to aclint
which is a MMIO device.
Move them to the ACLINT device. This also emulates the real hardware
more closely.
Reviewed-by: Anup Patel
Reviewed-by: Alistair Francis
This series implements Sstc extension[1] which was ratified recently.
The first patch is a prepartory patches while PATCH 2 adds stimecmp
support while PATCH 3 adds vstimecmp support. This series is based on
on top of upstream commit (faee5441a038).
The series can also be found at
vstimecmp CSR allows the guest OS or to program the next guest timer
interrupt directly. Thus, hypervisor no longer need to inject the
timer interrupt to the guest if vstimecmp is used. This was ratified
as a part of the Sstc extension.
Signed-off-by: Atish Patra
---
target/riscv/cpu.h
stimecmp allows the supervisor mode to update stimecmp CSR directly
to program the next timer interrupt. This CSR is part of the Sstc
extension which was ratified recently.
Signed-off-by: Atish Patra
---
target/riscv/cpu.c | 12 +
target/riscv/cpu.h | 5 ++
在 2022/7/21 下午11:31, Mayuresh Chitale 写道:
Accesses to henvcfg, henvcfgh and senvcfg are allowed only if
corresponding bit in mstateen0/hstateen0 is enabled. Otherwise an
illegal instruction trap is generated.
Signed-off-by: Mayuresh Chitale
---
target/riscv/csr.c | 100
On Thu, 21 Jul 2022 at 05:06, Alexey Kardashevskiy wrote:
> On 21/07/2022 18:48, Peter Maydell wrote:
> > On Thu, 21 Jul 2022 at 09:19, Alexey Kardashevskiy wrote:
> >> On 21/07/2022 02:08, Daniel Henrique Barboza wrote:
> >>> Hey,
> >>>
> >>> On 7/19/22 04:59, Alexey Kardashevskiy wrote:
>
在 2022/7/21 下午11:31, Mayuresh Chitale 写道:
Smstateen extension specifies a mechanism to close
the potential covert channels that could cause security issues.
This patch adds the CSRs defined in the specification and
the corresponding predicates and read/write functions.
Signed-off-by:
On Thu, Jul 21, 2022, 14:52 Peter Maydell wrote:
> On Thu, 21 Jul 2022 at 19:41, Stefan Hajnoczi wrote:
> > The SLOF repo was last synced automatically 6 days ago. I'm unable to
> > start a new sync operation and maybe the current one is stuck (the web
> > interface claims the sync is currently
* The current patch should just work, but prefer to have pre-boot guest
payload/firmware population into private memory for performance.
Not just performance in the case of SEV, it's needed there because firmware
only supports in-place encryption of guest memory, there's no
On Thu, Jul 21, 2022, Gupta, Pankaj wrote:
>
> Hi Sean, Chao,
>
> While attempting to solve the pre-boot guest payload/firmware population
> into private memory for SEV SNP, retrieved this thread. Have question below:
>
> > > > Requirements & Gaps
> > > > -
>
On Tue, 19 Jul 2022 at 10:37, Paolo Bonzini wrote:
>
> The following changes since commit 0ebf76aae58324b8f7bf6af798696687f5f4c2a9:
>
> Merge tag 'nvme-next-pull-request' of git://git.infradead.org/qemu-nvme
> into staging (2022-07-15 15:38:13 +0100)
>
> are available in the Git repository at:
Hi Alex,
On Thu, Jul 21, 2022 at 08:36:10PM +0100, Alex Bennée wrote:
>
> Paolo Bonzini writes:
>
> > From: "Jason A. Donenfeld"
> >
> > If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
> > initialize early. Set this using the usual guest random number
> > generation
Hi dainel:
Cause our code depend on intel intrinsics lib implement. And this lib depend
on macro like " AVX512BW ". This macro need compile time check to enable some
machine options . if you only use that utility to do runtime check ,you will
met compile issue. And also if we want to save
Hello,
To write a qtest for an SoC using ARM GICv3 as interrupt controller the
qtest infrastructure is short on IRQs.
File tests/qtest/libqtest.c defines:
#define MAX_IRQ 256
Which is the number of elements in the array that is used to keep track of
the value of the irq gpio:
bool
From: Martin Johnson
Gigadevice flash chips supported in m25p80.c (GD25Q32, GD25Q64)
require a dummy bytes in DIO and QIO modes, similar to Winbond W25Q32
and W25Q64. This patch fixes this behavior.
Signed-off-by: Ivan Grokhotkov
Signed-off-by: Martin Johnson
---
This patch was submitted into
Hi Sean, Chao,
While attempting to solve the pre-boot guest payload/firmware population
into private memory for SEV SNP, retrieved this thread. Have question below:
Requirements & Gaps
-
- Confidential computing(CC): TDX/SEV/CCA
* Need support both
Suggested-by: Manish Mishra
Signed-off-by: Het Gala
---
util/qemu-sockets.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/util/qemu-sockets.c b/util/qemu-sockets.c
index 491e2f2bc9..724c081e6c 100644
--- a/util/qemu-sockets.c
+++
i) Binding of the socket to source ip address and port on the non-default
interface has been implemented for multi-FD connection, which was not
necessary earlier because the binding was on the default interface itself.
ii) Created an end to end connection between all multi-FD source and
i) hmp_migrate and hmp_migrate_incoming functions are modified
according to the modified qmp monitor commands.
Suggested-by: Manish Mishra
Signed-off-by: Het Gala
---
monitor/hmp-cmds.c | 34 +++---
1 file changed, 31 insertions(+), 3 deletions(-)
diff --git
i) strList_from_string() shifted from hm-cmds.c -> qapi-util.c
ii) Adding qemu_string_count_delim() helper func. in qapi-util.c and
QAPI_LIST_LENGTH() macro defined func. in util.h
Suggested-by: Manish Mishra
Signed-off-by: Het Gala
---
include/qapi/util.h | 12
i) Dynamically decide appropriate source and destination ip pairs for the
corresponding multifd channel to be connected.
Suggested-by: Manish Mishra
Signed-off-by: Het Gala
---
migration/multifd.c | 6 +++---
migration/socket.c | 37 ++---
i) Modified the format of the qemu monitor command : 'migrate' by adding a list,
each element in the list consisting of multifd connection parameters: source
uri, destination uri and of the number of multifd channels between each pair.
ii) Information of all multifd connection parameters'
This is v2 of multiple interface support over multifd for live migration.
Links of previous versions:
v1:
https://lore.kernel.org/qemu-devel/20220609073305.142515-1-het.g...@nutanix.com
Thanks to David, Daniel and Markus for their valuable insights.
v1->v2 changelog:
- little helper functions
i) Modified the format of qemu monitor command: 'migrate-incoming' by adding
a list, each element in the list to open socket listeners with a given
number of multifd channels.
ii) Qemu starts with -incoming flag defer and -multi-fd-incoming defer to
allow the modified 'migrate-incoming'
Paolo Bonzini writes:
> From: "Jason A. Donenfeld"
>
> If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
> initialize early. Set this using the usual guest random number
> generation function. This FDT node is part of the DT specification.
>
> Cc: Alex Bennée
>
On 7/21/22 11:50, Thomas Huth wrote:
On 05/02/2021 17.37, Vladimir Sementsov-Ogievskiy wrote:
Check that cancel doesn't wait for 10s of nbd reconnect timeout.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
---
tests/qemu-iotests/264 | 38
On Thu, Jul 07, 2022 at 05:37:20PM +0100, Daniel P. Berrangé wrote:
> Since the qemu/osdep.h file must be included as the very first header
> in all C source files, there is no reason to include it in .h or .c.in
.c.inc
> files.
>
> Signed-off-by: Daniel P. Berrangé
> ---
> tests/style.yml |
On Thu, Jul 07, 2022 at 05:37:18PM +0100, Daniel P. Berrangé wrote:
> The qemu/osdep.h file must be included as the very first header in
> all C source files, to ensure its definitions take effect over all
> other header files, including system headers.
>
> Signed-off-by: Daniel P. Berrangé
>
On Thu, 21 Jul 2022 at 19:41, Stefan Hajnoczi wrote:
> The SLOF repo was last synced automatically 6 days ago. I'm unable to
> start a new sync operation and maybe the current one is stuck (the web
> interface claims the sync is currently updating...).
>
> Peter: are you able to fetch
On Thu, Jul 21, 2022, 6:44 PM Jason A. Donenfeld wrote:
> Hey Edgar,
>
> On Wed, Jul 20, 2022 at 9:13 AM Edgar E. Iglesias
> wrote:
> >
> >
> > On Tue, Jul 19, 2022 at 2:23 PM Jason A. Donenfeld
> wrote:
> >>
> >> If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
> >>
On Thu, 21 Jul 2022 at 04:49, Peter Maydell wrote:
>
> On Thu, 21 Jul 2022 at 09:19, Alexey Kardashevskiy wrote:
> > On 21/07/2022 02:08, Daniel Henrique Barboza wrote:
> > > Hey,
> > >
> > > On 7/19/22 04:59, Alexey Kardashevskiy wrote:
> > >> Alexey Kardashevskiy (1):
> > >>pseries:
On Wed, Jul 20, 2022 at 03:32:20PM +0100, Daniel P. Berrangé wrote:
> On Wed, Jul 20, 2022 at 04:11:43PM +0200, Thomas Huth wrote:
> > On 19/07/2022 12.37, Daniel P. Berrangé wrote:
> > > On Tue, Jul 19, 2022 at 12:28:24PM +0200, Thomas Huth wrote:
> > > > On 18/07/2022 21.14, Peter Xu wrote:
> >
On Thu, Jul 21, 2022, Chao Peng wrote:
> On Thu, Jul 21, 2022 at 03:34:59PM +0800, Wei Wang wrote:
> >
> >
> > On 7/21/22 00:21, Sean Christopherson wrote:
> > Maybe you could tag it with cgs for all the confidential guest support
> > related stuff: e.g. kvm_vm_ioctl_set_cgs_mem()
> >
> > bool
Will do, thanks!
Dao
On Wed, Jul 20, 2022 at 10:31 PM Alistair Francis wrote:
>
> On Tue, Jul 19, 2022 at 4:02 AM Dao Lu wrote:
> >
> > ping
>
> Sorry for the delay.
>
> Do you mind rebasing this on
> https://github.com/alistair23/qemu/tree/riscv-to-apply.next and
> sending a v5
>
> Alistair
>
On Thu, Jul 21, 2022 at 6:53 PM Eugenio Pérez wrote:
>
>
> QEMU needs to intercept this queue so it can track these changes and is able
> to
> migrate the device. It can do it from 1576dbb5bbc4 ("vdpa: Add x-svq to
> NetdevVhostVDPAOptions"). However, to enable x-svq implies to shadow all
>
Hey Edgar,
On Wed, Jul 20, 2022 at 9:13 AM Edgar E. Iglesias
wrote:
>
>
> On Tue, Jul 19, 2022 at 2:23 PM Jason A. Donenfeld wrote:
>>
>> If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
>> initialize early. Set this using the usual guest random number
>> generation
This function used to trust in v->shadow_vqs != NULL to know if it must
start svq or not.
This is not going to be valid anymore, as qemu is going to allocate svq
unconditionally (but it will only start them conditionally).
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-vdpa.c | 2 +-
1 file
SVQ may run or not in a device depending on runtime conditions (for
example, if the device can move CVQ to its own group or not).
Allocate the resources unconditionally, and decide later if to use them
or not.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-vdpa.c | 33
On Thu, Jul 21, 2022 at 04:02:49PM +, Zhao, Zhou wrote:
> Hi dainel:
> Cause our code depend on intel intrinsics lib implement. And
> this lib depend on macro like " AVX512BW ". This macro need
> compile time check to enable some machine options . if you only
> use that utility to do
QEMU needs to intercept this queue so it can track these changes and is able to
migrate the device. It can do it from 1576dbb5bbc4 ("vdpa: Add x-svq to
NetdevVhostVDPAOptions"). However, to enable x-svq implies to shadow all VirtIO
device's virtqueues, which will damage performance.
This series
From: "Jason A. Donenfeld"
If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function. This FDT node is part of the DT specification.
Cc: Chris Wulff
Cc: Marek Vasut
Signed-off-by: Jason A.
From: "Jason A. Donenfeld"
Tiny machines optimized for fast boot time generally don't use EFI,
which means a random seed has to be supplied some other way. For this
purpose, Linux (≥5.20) supports passing a seed in the setup_data table
with SETUP_RNG_SEED, specially intended for hypervisors,
CVQ can be shadowed two ways:
- Device has x-svq=on parameter (current way)
- The device can isolate CVQ in its own vq group
QEMU needs to check for the second condition dynamically, because CVQ
index is not known at initialization time. Since this is dynamic, the
CVQ isolation could vary with
Isolate control virtqueue in its own group, allowing to intercept control
commands but letting dataplane run totally passthrough to the guest.
Signed-off-by: Eugenio Pérez
---
include/net/vhost-vdpa.h | 1 +
hw/net/vhost_net.c | 4 +
hw/virtio/vhost-vdpa.c | 3 +-
net/vhost-vdpa.c
From: "Jason A. Donenfeld"
If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function. This FDT node is part of the DT specification.
Cc: Yoshinori Sato
Signed-off-by: Jason A. Donenfeld
From: "Jason A. Donenfeld"
If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function. This FDT node is part of the DT specification.
I'd do the same for other MIPS platforms but boston is the only
Main reason is for new vhost_vdpa address space ioctls to be available.
Signed-off-by: Eugenio Pérez
---
include/standard-headers/asm-x86/bootparam.h | 1 +
include/standard-headers/drm/drm_fourcc.h| 69
include/standard-headers/linux/ethtool.h | 1 +
So the caller can choose which ASID is destined.
No need to update the batch functions as they will always be called from
memory listener updates at the moment. Memory listener updates will
always update ASID 0, as it's the passthrough ASID.
All vhost devices's ASID are 0 at this moment.
From: Bin Meng
Commit cf60ccc3306c ("cutils: Introduce bundle mechanism") introduced
a Python script to populate a bundle directory using os.symlink() to
point to the binaries in the pc-bios directory of the source tree.
Commit 882084a04ae9 ("datadir: Use bundle mechanism") removed previous
From: "Jason A. Donenfeld"
If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function. This FDT node is part of the DT specification.
Cc: Alex Bennée
Signed-off-by: Jason A. Donenfeld
Message-Id:
From: Alexander Bulekov
Depending on how the target list is sorted in by qemu, the first target
(used as the base copy of the fuzzer, to which all others are linked)
might not be a generic-fuzzer. Since we are trying to only use
generic-fuzz, on oss-fuzz, fix that, to ensure the base copy is a
oss-fuzz is finding possible fuzzing targets even under qemu-bundle/.../bin,
but they
cannot be used because the required shared libraries are missing. Since the
fuzzing targets are already placed manually in $OUT, the bindir and libexecdir
subtrees are not needed; remove them.
Cc: Alexander
From: Peter Maydell
Coverity complains that there is a codepath in the query_stats()
function where it can leak the memory pointed to by stats_list. This
can only happen if the caller passes something other than
STATS_TARGET_VM or STATS_TARGET_VCPU as the 'target', which no
callsite does.
The following changes since commit 8ec4bc3c8c09366a9e4859de7c0a1860911e8424:
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging
(2022-07-20 16:27:57 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream2
for you to
* Zhao, Zhou (zhou.z...@intel.com) wrote:
> Hi dainel:
> Cause our code depend on intel intrinsics lib implement. And this lib
> depend on macro like " AVX512BW ". This macro need compile time check to
> enable some machine options . if you only use that utility to do runtime
> check ,you
On 7/21/22 16:36, Marc-André Lureau wrote:
[..]
diff --git a/include/sysemu/dump.h b/include/sysemu/dump.h
index 2b39abeeae..7025e50682 100644
--- a/include/sysemu/dump.h
+++ b/include/sysemu/dump.h
@@ -166,11 +166,10 @@ typedef struct DumpState {
hwaddr memory_offset;
int fd;
-
On Thu, Jul 21, 2022 at 05:05:38PM +0100, Mark Cave-Ayland wrote:
> On 21/07/2022 16:56, Daniel P. Berrangé wrote:
>
> > On Thu, Jul 21, 2022 at 04:51:51PM +0100, Mark Cave-Ayland wrote:
> > > On 21/07/2022 15:28, Roman Kagan wrote:
> > >
> > > (lots cut)
> > >
> > > > In the guest (Fedora 34):
On 21/07/2022 16:56, Daniel P. Berrangé wrote:
On Thu, Jul 21, 2022 at 04:51:51PM +0100, Mark Cave-Ayland wrote:
On 21/07/2022 15:28, Roman Kagan wrote:
(lots cut)
In the guest (Fedora 34):
[root@test ~]# lspci -tv
-[:00]-+-00.0 Intel Corporation 82G33/G31/P35/P31 Express DRAM
On Thu, Jul 21, 2022 at 05:05:38PM +0100, Mark Cave-Ayland wrote:
> On 21/07/2022 16:56, Daniel P. Berrangé wrote:
>
> > On Thu, Jul 21, 2022 at 04:51:51PM +0100, Mark Cave-Ayland wrote:
> > > On 21/07/2022 15:28, Roman Kagan wrote:
> > >
> > > (lots cut)
> > >
> > > > In the guest (Fedora 34):
On Thu, Jul 21, 2022 at 04:51:51PM +0100, Mark Cave-Ayland wrote:
> On 21/07/2022 15:28, Roman Kagan wrote:
>
> (lots cut)
>
> > In the guest (Fedora 34):
> >
> > [root@test ~]# lspci -tv
> > -[:00]-+-00.0 Intel Corporation 82G33/G31/P35/P31 Express DRAM
> > Controller
> >
On Thu, 2022-07-21 at 14:49 +0200, Fabian Ebner wrote:
> Hi,
> since about half a year ago, we're getting user reports about guest
> reboot issues with KVM/QEMU[0].
>
> The most common scenario is a Windows Server VM (2012R2/2016/2019,
> UEFI/OVMF and SeaBIOS) getting stuck during the screen with
On 21/07/2022 15:28, Roman Kagan wrote:
(lots cut)
In the guest (Fedora 34):
[root@test ~]# lspci -tv
-[:00]-+-00.0 Intel Corporation 82G33/G31/P35/P31 Express DRAM Controller
+-01.0 Device 1234:
+-02.0 Red Hat, Inc. QEMU XHCI Host Controller
Add knobs to allow users to enable smstateen and also export it via the
ISA extension string.
Signed-off-by: Mayuresh Chitale
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index db2b8e4d30..2b7ed95396 100644
---
If smstateen is implemented then accesses to AIA
registers CSRS, IMSIC CSRs and other IMSIC registers
is controlled by setting of corresponding bits in
mstateen/hstateen registers. Otherwise an illegal
instruction trap or virtual instruction trap is
generated.
Signed-off-by: Mayuresh Chitale
---
If smstateen is implemented and sstateen0.fcsr is clear then the
floating point operations must return illegal instruction exception.
Signed-off-by: Mayuresh Chitale
---
target/riscv/csr.c| 23 ++
target/riscv/insn_trans/trans_rvf.c.inc | 38
Accesses to henvcfg, henvcfgh and senvcfg are allowed only if
corresponding bit in mstateen0/hstateen0 is enabled. Otherwise an
illegal instruction trap is generated.
Signed-off-by: Mayuresh Chitale
---
target/riscv/csr.c | 100 +
1 file changed, 93
Smstateen extension specifies a mechanism to close
the potential covert channels that could cause security issues.
This patch adds the CSRs defined in the specification and
the corresponding predicates and read/write functions.
Signed-off-by: Mayuresh Chitale
---
target/riscv/cpu.h | 4
This series adds support for the Smstateen specification which provides
a mechanism plug potential covert channels which are opened by
extensions
that add to processor state that may not get context-switched. Currently
access to AIA registers, *envcfg registers and floating point(fcsr) is
On 7/21/22 15:22, Janosch Frank wrote:
As sections don't have a type like the notes do we need another way to
determine their contents. The string table allows us to assign each
section an identification string which architectures can then use to
tag their sections with.
There will be no string
On Thu, Jul 21, 2022 at 05:11:31PM +0200, Jason A. Donenfeld wrote:
> Hi Michael,
>
> On Thu, Jul 21, 2022 at 10:52:32AM -0400, Michael S. Tsirkin wrote:
> > On Thu, Jul 21, 2022 at 02:29:33PM +0200, Paolo Bonzini wrote:
> > > As mentioned in the reviews of Jason's patches, the fw_cfg data, or at
Hi Michael,
On Thu, Jul 21, 2022 at 10:47:57AM -0400, Michael S. Tsirkin wrote:
> On Thu, Jul 21, 2022 at 02:29:37PM +0200, Paolo Bonzini wrote:
> > #define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id"
> > #define X86_MACHINE_BUS_LOCK_RATELIMIT "bus-lock-ratelimit"
> > +#define
On 7/21/22 17:07, Marc-André Lureau wrote:
Hi
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
For the upcoming string table and arch section support we need to
modify the elf layout a bit. Instead of the segments, i.e. the guest's
memory contents, beeing the last area the section data
Hi Michael,
On Thu, Jul 21, 2022 at 10:52:32AM -0400, Michael S. Tsirkin wrote:
> On Thu, Jul 21, 2022 at 02:29:33PM +0200, Paolo Bonzini wrote:
> > As mentioned in the reviews of Jason's patches, the fw_cfg data, or at
> > least its structure including the size, is part of the guest ABI and
> >
On Thu, Jul 21, 2022 at 06:31:47PM +0800, ling xu wrote:
> This commit adds AVX512 implementation of xbzrle_encode_buffer function to
> accelerate xbzrle encoding speed. Compared with C version of
> xbzrle_encode_buffer function,
> AVX512 version can achieve almost 60%-70% performance improvement
On 7/21/22 17:05, Marc-André Lureau wrote:
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
Add the uapi data for KVM_CAP_S390_PROTECTED_DUMP which I expect to be
added with 5.20.
It's going to be overwritten by the next update-linux-headers.sh. I'd
mark this patch as WIP or Draft: in
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
>
> Add the uapi data for KVM_CAP_S390_PROTECTED_DUMP which I expect to be
> added with 5.20.
It's going to be overwritten by the next update-linux-headers.sh. I'd
mark this patch as WIP or Draft: in the title until it's actually sync
and
Hi
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
>
> For the upcoming string table and arch section support we need to
> modify the elf layout a bit. Instead of the segments, i.e. the guest's
> memory contents, beeing the last area the section data will live at
> the end of the file. This
On Thu, Jul 21, 2022, David Hildenbrand wrote:
> On 21.07.22 11:44, David Hildenbrand wrote:
> > On 06.07.22 10:20, Chao Peng wrote:
> >> Normally, a write to unallocated space of a file or the hole of a sparse
> >> file automatically causes space allocation, for memfd, this equals to
> >> memory
On 7/21/22 16:41, Marc-André Lureau wrote:
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
By splitting the writing of the section headers and (future) section
data we prepare for the addition of a string table section and
architecture sections.
At the same time we move the writing of
On Thu, Jul 07, 2022 at 05:37:12PM +0100, Daniel P. Berrangé wrote:
> Historically QEMU has used the 'scripts/checkpatch.pl' script to
> validate various style rules but there are a number of issues:
>
> - Contributors / maintainers are reluctant to add new
>tests to it, nor fix existint
On Thu, Jul 21, 2022 at 02:29:33PM +0200, Paolo Bonzini wrote:
> As mentioned in the reviews of Jason's patches, the fw_cfg data, or at
> least its structure including the size, is part of the guest ABI and
> must match across two sides of migration.
>
> It would be possible to handle this with
This patch adds avx512 support for xbzrle_encode_buffer function to accelerate
xbzrle encoding speed.
The specific avx512 implementation is provided in qemu/migration/xbzrle.c.
We provide AVX512 intrinsic support in qemu/configure file to enable avx512 in
complier.
And added unit test called
This commit adds AVX512 implementation of xbzrle_encode_buffer function to
accelerate xbzrle encoding speed. Compared with C version of
xbzrle_encode_buffer function,
AVX512 version can achieve almost 60%-70% performance improvement on unit test
provided by qemu.
In addition, we provide one more
This patch fixes the framebuffer mailbox interface(marked as deprecated
in official docs, but can still be fixed for emulation purposes) by
removing unneeded offset to make it works like buffer allocate tag in
bcm2835_property interface[1], some baremetal applications like the
Screen01/Screen02
On Thu, Jul 21, 2022 at 02:29:37PM +0200, Paolo Bonzini wrote:
> From: "Jason A. Donenfeld"
>
> Tiny machines optimized for fast boot time generally don't use EFI,
> which means a random seed has to be supplied some other way. For this
> purpose, Linux (≥5.20) supports passing a seed in the
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
>
> Let's move ELF related members into one block and guest memory related
> ones into another to improve readability.
>
> Signed-off-by: Janosch Frank
> Reviewed-by: Richard Henderson
from v2:
Reviewed-by: Marc-André Lureau
> ---
>
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
>
> By splitting the writing of the section headers and (future) section
> data we prepare for the addition of a string table section and
> architecture sections.
>
> At the same time we move the writing of the section to the end of the
> dump
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
>
> Allocating the header lets us write it at a later time and hence also
> allows us to change section and segment table offsets until we
> finally write it.
>
> Signed-off-by: Janosch Frank
you could have added from v2
Reviewed-by:
On Wed, 20 Jul 2022 13:23:10 +0100
Peter Maydell wrote:
> On Mon, 16 May 2022 at 21:52, Michael S. Tsirkin wrote:
> >
> > From: Jonathan Cameron
> >
> > These memops perform interleave decoding, walking down the
> > CXL topology from CFMWS described host interleave
> > decoder via CXL host
Hi
On Thu, Jul 21, 2022 at 5:23 PM Janosch Frank wrote:
>
> The iteration over the memblocks is hard to understand so it's about
> time to clean it up. Instead of manually grabbing the next memblock we
> can use QTAILQ_FOREACH to iterate over all memblocks.
>
> Additionally we move the
On Wed, Jul 20, 2022 at 02:21:38PM +0100, Mark Cave-Ayland wrote:
> On 20/07/2022 12:00, Roman Kagan wrote:
>
> > On Wed, Jul 20, 2022 at 11:44:26AM +0100, Daniel P. Berrangé wrote:
> > > On Wed, Jul 20, 2022 at 01:25:55PM +0300, Roman Kagan wrote:
> > > > It's possible to create non-working
On Thu, Jul 21, 2022 at 5:24 PM Janosch Frank wrote:
>
> Let's make it a bit clearer that we write the program headers of the
> PT_LOAD type.
>
> Signed-off-by: Janosch Frank
Reviewed-by: Marc-André Lureau
> ---
> dump/dump.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
>
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