On Mon, 03 Oct 2022 02:23:51 +0900,
Richard Henderson wrote:
>
> Ping, or should I create a PR myself?
>
> r~
Sorry.
I can't work this week, so please submit a PR.
>
> On 9/1/22 07:15, Yoshinori Sato wrote:
> > On Thu, 01 Sep 2022 19:15:09 +0900,
> > Richard Henderson wrote:
> >>
> >> The
On 9/29/22 09:37, Gerd Hoffmann wrote:
On Wed, Sep 28, 2022 at 05:52:44PM +0200, Denis V. Lunev wrote:
This property is needed for WHQL/inboxing of Windows drivers. We do need
to get drivers to be separated by the hypervisor vendors and that should
be done as PCI subvendor ID.
This patch adds
openpower.xyz was retired some time ago. The OpenBMC Jenkins is where
images can be found these days.
Signed-off-by: Joel Stanley
---
docs/system/arm/nuvoton.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst
On 10/3/22 09:23, Peter Maydell wrote:
Now we have an enum for the granule size, use it in the
ARMVAParameters struct instead of the using16k/using64k bools.
Signed-off-by: Peter Maydell
---
target/arm/internals.h | 23 +--
target/arm/helper.c| 39
Anyone, ping?
On 27/09/2022 12:35, Alexey Kardashevskiy wrote:
Hi!
I am trying qemu-system-x86_64 with OVMF with the q35 machine, the
complete command line is below.
It works fine (including SEV on AMD EPYC), but these 2 parameters make
me wonder if I miss something:
-drive
Hello, there,
I have a few newbie QEMU questions. I found that mmu_idx in aarch64-softmmu
falls in 8, 10 and 12.
I need some help to understand what they are for.
I cannot find which macros are for mmu-idx 8, 10 and 12 at
There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
are floating on highest RAM address. However, they can be disabled
in several cases.
(1) One specific high memory region is disabled by developer by
toggling
After the improvement to high memory region address assignment is
applied, the memory layout can be changed, introducing possible
migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
is disabled or enabled when the optimization is applied or not, with
the following configuration.
This introduces virt_get_high_memmap_enabled() helper, which returns
the pointer to vms->highmem_{redists, ecam, mmio}. The pointer will
be used in the subsequent patches.
No functional change intended.
Signed-off-by: Gavin Shan
---
hw/arm/virt.c | 30 +-
1 file
There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
are floating on highest RAM address. However, they can be disabled
in several cases.
(1) One specific high memory region is disabled by developer by
toggling
This renames variable 'size' to 'region_size' in virt_set_high_memmap().
Its counterpart ('region_base') will be introduced in next patch.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
---
hw/arm/virt.c | 15 ---
1 file changed, 8 insertions(+),
This introduces virt_set_high_memmap() helper. The logic of high
memory region address assignment is moved to the helper. The intention
is to make the subsequent optimization for high memory region address
assignment easier.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by:
This introduces variable 'region_base' for the base address of the
specific high memory region. It's the preparatory work to optimize
high memory region address assignment.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
---
hw/arm/virt.c | 12 ++--
1
On 10/3/22 21:53, Stefan Hajnoczi wrote:
On Fri, Sep 30, 2022 at 05:24:11PM +0800, Ming Lei wrote:
ublk-qcow2 is available now.
Cool, thanks for sharing!
yep
So far it provides basic read/write function, and compression and snapshot
aren't supported yet. The target/backend implementation is
Hi Eric,
On 10/3/22 4:49 PM, Eric Auger wrote:
On 9/29/22 01:49, Gavin Shan wrote:
On 9/28/22 10:22 PM, Eric Auger wrote:
On 9/22/22 01:13, Gavin Shan wrote:
After the improvement to high memory region address assignment is
applied, the memory layout is changed. For example,
On 2022-10-03 18:13:06 -0500, Venu Busireddy wrote:
> On 2022-09-30 18:25:48 +0200, Paolo Bonzini wrote:
> > On Fri, Sep 30, 2022 at 4:42 PM Venu Busireddy
> > wrote:
> > > > > Immediately after a hotunplug event, qemu (without any action from
> > > > > the guest) processes a REPORT_LUNS command
On 2022/10/04 2:47, Stefan Hajnoczi wrote:
> On Thu, Sep 29, 2022 at 04:36:27PM +0800, Sam Li wrote:
>> Add a new zoned_host_device BlockDriver. The zoned_host_device option
>> accepts only zoned host block devices. By adding zone management
>> operations in this new BlockDriver, users can use the
Hi Philippe,
On Tue, Oct 4, 2022 at 12:36 AM Philippe Mathieu-Daudé wrote:
> Send each new revision as a new top-level thread, rather than burying it
> in-reply-to an earlier revision, as many reviewers are not looking
> inside deep threads for new patches.
Will do.
> You seem to justify this
On 2022-09-30 18:25:48 +0200, Paolo Bonzini wrote:
> On Fri, Sep 30, 2022 at 4:42 PM Venu Busireddy
> wrote:
> > > > Immediately after a hotunplug event, qemu (without any action from
> > > > the guest) processes a REPORT_LUNS command on the lun 0 of the device
> > > > (haven't figured out what
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/7.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/7.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/7.2 for any
user-visible changes.
signature.asc
Description: PGP signature
On Thu, Sep 29, 2022, at 1:03 PM, Vivek Goyal wrote:
>
> So rust version of virtiofsd, already supports running unprivileged
> (inside a user namespace).
I know, but as I already said, the use case here is running inside an OpenShift
unprivileged pod where *we are already in a container*.
>
Hi Jason,
Per
https://www.qemu.org/docs/master/devel/submitting-a-patch.html#when-resending-patches-add-a-version-tag:
Send each new revision as a new top-level thread, rather than burying it
in-reply-to an earlier revision, as many reviewers are not looking
inside deep threads for new
From: Bernhard Beschow
GCC issues a false positive warning, resulting in build failure with -Werror:
In file included from /usr/include/glib-2.0/glib.h:114,
from src/include/glib-compat.h:32,
from src/include/qemu/osdep.h:144,
from
Le 03/10/2022 à 21:04, Stefan Hajnoczi a écrit :
On Fri, 30 Sept 2022 at 16:22, Laurent Vivier wrote:
Philippe Mathieu-Daudé via (1):
block/qcow2-bitmap: Add missing cast to silent GCC error
Hi Laurent,
This commit uses a mailing list email, probably due to DKIM/SPF issues:
Author:
Hi Eric,
On 10/3/22 4:44 PM, Eric Auger wrote:
On 9/29/22 01:37, Gavin Shan wrote:
On 9/28/22 10:51 PM, Eric Auger wrote:
On 9/22/22 01:13, Gavin Shan wrote:
There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
On Thu, 29 Sep 2022, Mark Cave-Ayland wrote:
On 25/09/2022 10:16, BALATON Zoltan wrote:
On Sun, 25 Sep 2022, Mark Cave-Ayland wrote:
On 17/09/2022 00:07, BALATON Zoltan wrote:
Some lines can be dropped making the code flow simpler and easier to
follow by setting default values at variable
The following changes since commit c8de6ec63d766ca1998c5af468483ce912fdc0c2:
Merge tag 'pull-request-2022-09-28' of https://gitlab.com/thuth/qemu into
staging (2022-09-28 17:04:11 -0400)
are available in the Git repository at:
https://gitlab.com/laurent_vivier/qemu.git
On 3/10/22 22:31, Bernhard Beschow wrote:
Now that the MPC8544DS board also has a platform bus, the if statement
is always true.
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/ppc/e500.c | 30 ++
On Fri, Sep 30, 2022 at 05:24:11PM +0800, Ming Lei wrote:
> ublk-qcow2 is available now.
Cool, thanks for sharing!
>
> So far it provides basic read/write function, and compression and snapshot
> aren't supported yet. The target/backend implementation is completely
> based on io_uring, and
On 3/10/22 22:31, Bernhard Beschow wrote:
Will allow e500 boards to access SD cards using just their own devices.
Signed-off-by: Bernhard Beschow
---
hw/sd/sdhci.c | 147 +-
include/hw/sd/sdhci.h | 3 +
2 files changed, 149 insertions(+), 1
On Mon, Oct 03, 2022 at 05:15:56AM +0200, Juan Quintela wrote:
> And it appears that what is wrong is the code. During bulk stage we
> need to make sure that some block is dirty, but no games with
> max_size at all.
>
> Signed-off-by: Juan Quintela
> ---
> migration/block.c | 4 ++--
> 1 file
On 3/10/22 22:31, Bernhard Beschow wrote:
Adds missing functionality to emulated e500 SOCs which increases the
chance of given "real" firmware images to access SD cards.
Signed-off-by: Bernhard Beschow
---
docs/system/ppc/ppce500.rst | 13 +
hw/ppc/Kconfig | 1 +
(qemu) info pic
info pic
CPU[]: QW NSR CPPR IPB LSMFB ACK# INC AGE PIPR W2
CPU[]: USER 00 00 00 00 00 00 00 00
CPU[]: OS 00 00 00 ff ff 00 ff ff
CPU[]: POOL 00 00 00 ff 00 00 00 00
CPU[]: PHYS
On 3/10/22 22:31, Bernhard Beschow wrote:
Allows e500 boards to have their root file system reside on flash using
only builtin devices located in the eLBC memory region.
Note that the flash memory area is only created when a -pflash argument is
given, and that the size is determined by the
Hi Daniel,
On 3/10/22 22:31, Bernhard Beschow wrote:
Cover letter:
~
This series adds support for -pflash and direct SD card access to the
PPC e500 boards. The idea is to increase compatibility with "real" firmware
images where only the bare minimum of drivers is compiled in.
On 3/10/22 22:31, Bernhard Beschow wrote:
According to the JEDEC standard the device length is communicated to an
OS as an exponent (power of two).
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
---
hw/block/pflash_cfi01.c | 8 ++--
1 file changed, 6 insertions(+), 2
Adds missing functionality to emulated e500 SOCs which increases the
chance of given "real" firmware images to access SD cards.
Signed-off-by: Bernhard Beschow
---
docs/system/ppc/ppce500.rst | 13 +
hw/ppc/Kconfig | 1 +
hw/ppc/e500.c | 31
The device model's functions start with "usdhc_", so rename the defines
accordingly for consistency.
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
---
hw/sd/sdhci.c | 66 +--
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git
Will allow e500 boards to access SD cards using just their own devices.
Signed-off-by: Bernhard Beschow
---
hw/sd/sdhci.c | 147 +-
include/hw/sd/sdhci.h | 3 +
2 files changed, 149 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sdhci.c
Now that the MPC8544DS board also has a platform bus, the if statement
is always true.
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/ppc/e500.c | 30 ++
hw/ppc/e500.h | 1 -
hw/ppc/e500plat.c | 1 -
These defines aren't used outside of sdhci.c, so can be defined there.
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/sd/sdhci-internal.h | 20
hw/sd/sdhci.c | 19 +++
2 files changed, 19
On Mon, 3 Oct 2022, Mark Cave-Ayland wrote:
On 29/09/2022 12:32, BALATON Zoltan wrote:
On Thu, 29 Sep 2022, Mark Cave-Ayland wrote:
On 25/09/2022 13:38, BALATON Zoltan wrote:
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_oldworld.c | 8 ++--
1 file changed, 2 insertions(+), 6
On 3/10/22 22:31, Bernhard Beschow wrote:
PlatformBusDevice has an mmio attribute which gets aliased to
SysBusDevice::mmio[0]. So PlatformbusDevice::mmio can be used directly,
avoiding the sysbus API.
Signed-off-by: Bernhard Beschow
---
hw/ppc/e500.c | 2 +-
1 file changed, 1 insertion(+),
The sudden change of topics is slightly confusing and makes the
networking information less visible. So separate the networking chapter
to improve comprehensibility.
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
docs/system/ppc/ppce500.rst | 3
Allows e500 boards to have their root file system reside on flash using
only builtin devices located in the eLBC memory region.
Note that the flash memory area is only created when a -pflash argument is
given, and that the size is determined by the given file. The idea is to
put users into
Move the parts specific to and only used by mac99 out from the shared
mac.h into mac_newworld.c where they better belong.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac.h | 24
hw/ppc/mac_newworld.c | 19 +++
On 3/10/22 22:31, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
---
hw/ppc/mpc8544ds.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
According to the JEDEC standard the device length is communicated to an
OS as an exponent (power of two).
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
---
hw/block/pflash_cfi01.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/block/pflash_cfi01.c
The PROM_FILENAME and KERNEL_* defines are used by mac_oldworld and
mac_newworld but they don't have to be identical so these could be
moved to the individual boards.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac.h | 4
PlatformBusDevice has an mmio attribute which gets aliased to
SysBusDevice::mmio[0]. So PlatformbusDevice::mmio can be used directly,
avoiding the sysbus API.
Signed-off-by: Bernhard Beschow
---
hw/ppc/e500.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/e500.c
All that is left in mac.h now belongs to the nvram emulation so rename
it accordingly and only include it where it is really used.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
MAINTAINERS | 1 +
hw/ide/macio.c |
Models the real device more closely.
Address and size values are taken from mpc8544.dts from the linux-5.17.7
tree. The IRQ range is taken from e500plat.c.
Signed-off-by: Bernhard Beschow
---
hw/ppc/mpc8544ds.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/ppc/mpc8544ds.c
This series includes some clean ups to mac_newworld and mac_oldworld
to make them a bit simpler and more readable, It also removes the
shared mac.h file that turns out was more of a random collection of
unrelated things. Getting rid of this mac.h improves the locality of
device models and reduces
Having a dedicated config switch makes dependency handling cleaner.
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
hw/gpio/Kconfig | 3 +++
hw/gpio/meson.build | 2 +-
hw/ppc/Kconfig | 1 +
3 files changed, 5 insertions(+), 1 deletion(-)
Several variables are set in if-else branches where the else branch
can be removed by setting a default value at the variable declaration
which leads to simlpler code that is easier to follow.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 19 ---
Move the parts specific to and only used by macio out from the shared
mac.h into macio.c where they better belong.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/misc/macio/macio.c | 5 +++--
hw/ppc/mac.h | 23
The tbfreq variable is only set once in an if-else which can be done
at the variable declaration saving some lines of code and making it
simpler.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac_newworld.c | 9 +
hw/ppc/mac_oldworld.c | 9 +
2 files
Signed-off-by: Bernhard Beschow
---
hw/ppc/mpc8544ds.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c
index 81177505f0..8e674ad195 100644
--- a/hw/ppc/mpc8544ds.c
+++ b/hw/ppc/mpc8544ds.c
@@ -36,7 +36,7 @@ static void
Gives users more fine-grained control over what should be compiled into
QEMU.
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
configs/devices/ppc-softmmu/default.mak | 3 ++-
hw/ppc/Kconfig | 8
hw/ppc/meson.build
Drop some more local variables additionally to commit b8df32555ce5 to
match clean ups done to mac_newwold in previous patch.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac_oldworld.c | 43
Values not used frequently enough may not worth putting in a local
variable, especially with names almost as long as the original value
because that does not improve readability, to the contrary it makes it
harder to see what value is used. Drop a few such variables. This is
the same clean up that
Cover letter:
~
This series adds support for -pflash and direct SD card access to the
PPC e500 boards. The idea is to increase compatibility with "real" firmware
images where only the bare minimum of drivers is compiled in.
The series is structured as follows:
Patches 1-5 perform
Map regions in ascending order and reorganise code a bit to avoid some
casts and move Uninorth parts together.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 38 ++
1 file changed, 18 insertions(+), 20 deletions(-)
diff --git
By slight reorganisation we can avoid an else branch and some code
duplication which makes it easier to follow the code.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 6 +++---
hw/ppc/mac_oldworld.c | 7 +++
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git
By storing the device pointers in a variable with the right type the
number of QOM casts can be reduced which also makes the code more
readable.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/ppc/mac_newworld.c | 61
Signed-off-by: BALATON Zoltan
---
MAINTAINERS | 1 +
hw/pci-host/grackle.c | 14 +--
hw/ppc/mac.h | 3 ---
hw/ppc/mac_oldworld.c | 1 +
include/hw/pci-host/grackle.h | 44 +++
5 files changed, 47
Am 16. September 2022 17:05:13 UTC schrieb Bernhard Beschow :
>Am 16. September 2022 15:00:06 UTC schrieb Bin Meng :
>>On Thu, Sep 15, 2022 at 11:36 PM Bernhard Beschow wrote:
>>>
>>> Allows e500 boards to have their root file system reside on flash using
>>> only builtin devices.
>>>
>>> Note
The NVRAM_SIZE constant was defined but not used. Rename it to
MACIO_NVRAM_SIZE to match the device model and use it where appropriate.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
---
hw/misc/macio/macio.c| 2 +-
hw/ppc/mac_newworld.c| 4 ++--
The following changes since commit 99d6b11b5b44d7dd64f4cb1973184e40a4a174f8:
Merge tag 'pull-target-arm-20220922' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-09-26
13:38:26 -0400)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git
The generated skeletons for DBus call the finalize method of the parent
type using code like
G_OBJECT_CLASS (qemu_dbus_display1_chardev_skeleton_parent_class)->finalize
(object);
However, the finalize method is defined in a shared library that is not
compiled with CFI. Do not enable
On Fri, 30 Sept 2022 at 16:22, Laurent Vivier wrote:
> Philippe Mathieu-Daudé via (1):
> block/qcow2-bitmap: Add missing cast to silent GCC error
Hi Laurent,
This commit uses a mailing list email, probably due to DKIM/SPF issues:
Author: Philippe Mathieu-Daudé via
I think the policy is to
On 9/19/22 14:56, Leandro Lupori wrote:
PowerPC64 processors handle direct branches better than indirect
ones, resulting in less stalled cycles and branch misses.
However, PPC's tb_target_set_jmp_target() was only using direct
branches for 16-bit jumps, while PowerPC64's unconditional branch
On Thu, Sep 29, 2022 at 04:36:27PM +0800, Sam Li wrote:
> Add a new zoned_host_device BlockDriver. The zoned_host_device option
> accepts only zoned host block devices. By adding zone management
> operations in this new BlockDriver, users can use the new block
> layer APIs including Report Zone
The following changes since commit c8de6ec63d766ca1998c5af468483ce912fdc0c2:
Merge tag 'pull-request-2022-09-28' of https://gitlab.com/thuth/qemu into
staging (2022-09-28 17:04:11 -0400)
are available in the Git repository at:
https://github.com/quic/qemu tags/pull-hex-20221003
for you
On Mon, Oct 03, 2022 at 12:36:27PM +0200, Jason A. Donenfeld wrote:
> As of the kernel commit linked below, Linux ingests an RNG seed
> passed from the hypervisor. So, pass this for the Malta platform, and
> reinitialize it on reboot too, so that it's always fresh.
>
> Cc: Philippe Mathieu-Daudé
We have found cases where pkt_has_store_s[01] is set incorrectly.
This leads to generating an unnecessary store that is left over
from a previous packet.
Add an attribute to determine if an instruction is a scalar store
The attribute is attached to the fSTORE macro (hex_common.py)
Update the
The store width is needed for packet commit, so it is stored in
ctx->store_width. Currently, it is set when a store has a TCG
override instead of a QEMU helper. In the QEMU helper case, the
ctx->store_width is not set, we invoke a helper during packet commit
that uses the runtime store width.
From: Matheus Tavares Bernardino
Hexagon instructions with the A_CVI_NEW attribute produce a vector value
that can be used in the same packet. The python function responsible for
generating code for such instructions has a typo ("if" instead of
"elif"), which makes genptr_dst_write_ext() be
The imported files from the architecture library have added some
instruction attributes. Some of these will be used in a subsequent
patch for determing the size of a store.
Signed-off-by: Taylor Simpson
Acked-by: Richard Henderson
Message-Id: <20220920080746.26791-2-tsimp...@quicinc.com>
---
The MAC address set from Qemu wasn't being saved into the register space.
Reviewed-by: Hao Wu
Signed-off-by: Patrick Venture
---
v2: only set the registers from qemu on reset
once registers set, only read and write to them
---
hw/net/npcm7xx_emc.c | 30 +++---
1
Last week the /qemu-project namespace got added to the GitLab Open Source
Program. This gives repos under that namespace extra CI minutes (50,000)
and a cost factor of 0.5, meaning in effect 100,000 minutes per month.
Primarily this applies to CI pipelines jobs the merge coordinator runs
for pull
"Matheus K. Ferst" writes:
> On 30/09/2022 15:38, Fabiano Rosas wrote:
>> Matheus Ferst writes:
>>
>>> Export p9_interrupt_powersave and use it in p9_next_unmasked_interrupt.
>>>
>>> Signed-off-by: Matheus Ferst
>>> ---
>>> Temporarily putting the prototype in internal.h for lack of a better
"Matheus K. Ferst" writes:
> On 30/09/2022 15:13, Fabiano Rosas wrote:
>> Matheus Ferst writes:
>>
>>> No functional change intended.
>>>
>>> Signed-off-by: Matheus Ferst
>>> ---
>>> target/ppc/excp_helper.c | 9 +
>>> 1 file changed, 1 insertion(+), 8 deletions(-)
>>>
>>> diff
FEAT_GTG is a change tho the ID register ID_AA64MMFR0_EL1 so that it
can report a different set of supported granule (page) sizes for
stage 1 and stage 2 translation tables. As of commit c20281b2a5048
we already report the granule sizes that way for '-cpu max', and now
we also correctly make
Arm CPUs support some subset of the granule (page) sizes 4K, 16K and
64K. The guest selects the one it wants using bits in the TCR_ELx
registers. If it tries to program these registers with a value that
is either reserved or which requests a size that the CPU does not
implement, the architecture
Richard Henderson writes:
> Changes for v6:
> * CPUTLBEntryFull is now completely reviewed.
You should try a --disable-tcg build because I saw that failing in CI.
--
Alex Bennée
Arm CPUs support some subset of the granule (page) sizes 4K, 16K and
64K. The guest selects the one it wants using bits in the TCR_ELx
registers. If it tries to program these registers with a value that
is either reserved or which requests a size that the CPU does not
implement, the architecture
Now we have an enum for the granule size, use it in the
ARMVAParameters struct instead of the using16k/using64k bools.
Signed-off-by: Peter Maydell
---
target/arm/internals.h | 23 +--
target/arm/helper.c| 39 ---
target/arm/ptw.c
On 30/09/2022 15:13, Fabiano Rosas wrote:
Matheus Ferst writes:
No functional change intended.
Signed-off-by: Matheus Ferst
---
target/ppc/excp_helper.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index
On 28/09/2022 14:31, Cédric Le Goater wrote:
Hello Matheus,
On 9/27/22 22:15, Matheus Ferst wrote:
Link to v1:
https://lists.gnu.org/archive/html/qemu-ppc/2022-08/msg00370.html
This series is also available as a git branch:
https://github.com/PPC64/qemu/tree/ferst-interrupt-fix-v2
This is
On 30/09/2022 15:38, Fabiano Rosas wrote:
Matheus Ferst writes:
Export p9_interrupt_powersave and use it in p9_next_unmasked_interrupt.
Signed-off-by: Matheus Ferst
---
Temporarily putting the prototype in internal.h for lack of a better place,
we will un-export p9_interrupt_powersave in
On 27/09/2022 19:14, Fabiano Rosas wrote:
Matheus Ferst writes:
Remove the following unused interrupts from the POWER8 interrupt masking
method:
- PPC_INTERRUPT_RESET: only raised for 6xx, 7xx, 970, and POWER5p;
- Debug Interrupt: removed in Power ISA v2.07;
- Hypervisor Virtualization:
Peter Maydell writes:
> Some avocado tests fail if QEMU was built without libslirp. Add
> require_netdev('user') checks where necessary:
>
> These tests try to ping 10.0.2.2 and expect it to succeed:
> boot_linux_console.py:BootLinuxConsole.test_arm_emcraft_sf2
>
Richard Henderson writes:
> On 10/3/22 05:47, Alex Bennée wrote:
>> Richard Henderson writes:
>>
>>> Let tb->page_addr[0] contain the offset within the page of the
>>> start of the translation block. We need to recover this value
>>> anyway at various points, and it is easier to discard the
On Montag, 3. Oktober 2022 14:50:04 CEST Daniel P. Berrangé wrote:
> On Mon, Oct 03, 2022 at 02:46:04PM +0200, Christian Schoenebeck wrote:
> > On Montag, 3. Oktober 2022 12:06:12 CEST Daniel P. Berrangé wrote:
> > > The current message when using '-net user...' with SLIRP disabled at
> > >
> > >
According to the Linux kernel booting.rst [1], CPTR_EL3.ESM and
SCR_EL3.EnTP2 must be initialized to 1 when EL3 is present and FEAT_SME
is advertised. This has to be taken care of when QEMU boots directly
into the kernel (i.e., "-M virt,secure=on -cpu max -kernel Image").
Cc:
On 30/9/22 22:08, Matheus Tavares Bernardino wrote:
Hexagon instructions with the A_CVI_NEW attribute produce a vector value
that can be used in the same packet. The python function responsible for
generating code for such instructions has a typo ("if" instead of
"elif"), which makes
On 1/10/22 00:03, Richard Henderson wrote:
In preparation for TARGET_TB_PCREL, reduce reliance on absolute values.
Signed-off-by: Richard Henderson
---
target/arm/translate.h| 5 +++--
target/arm/translate-a64.c| 28 ++-
target/arm/translate-m-nocp.c | 6
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