On 6/15/23 17:21, Nicholas Piggin wrote:
On Thu Jun 15, 2023 at 4:30 PM AEST, Harsh Prateek Bora wrote:
On 6/8/23 14:43, Nicholas Piggin wrote:
Create spapr_nested.c for most of the nested HV implementation.
Signed-off-by: Nicholas Piggin
---
hw/ppc/meson.build | 1 +
On Fri, Jun 16, 2023 at 12:01:52PM +0800, Wang, Lei wrote:
> On 6/16/2023 11:23, Tao Su wrote:
> > This patch series mainly updates SapphireRapids CPU model and adds
> > new CPU model EmeraldRapids and GraniteRapids.
> >
> > Bit 13 (ARCH_CAP_FBSDP_NO), bit 14 (ARCH_CAP_FBSDP_NO) and bit 15
>
>
On 6/16/2023 11:23, Tao Su wrote:
> This patch series mainly updates SapphireRapids CPU model and adds
> new CPU model EmeraldRapids and GraniteRapids.
>
> Bit 13 (ARCH_CAP_FBSDP_NO), bit 14 (ARCH_CAP_FBSDP_NO) and bit 15
Bit 13 should be MSR_ARCH_CAP_SBDR_SSDP_NO, right?
> (ARCH_CAP_PSDP_NO)
This patch series mainly updates SapphireRapids CPU model and adds
new CPU model EmeraldRapids and GraniteRapids.
Bit 13 (ARCH_CAP_FBSDP_NO), bit 14 (ARCH_CAP_FBSDP_NO) and bit 15
(ARCH_CAP_PSDP_NO) of MSR_IA32_ARCH_CAPABILITIES are enumerated starting
from latest SapphireRapids, which are missed
MCDT_NO bit indicates HW contains the security fix and doesn't need to
be mitigated to avoid data-dependent behaviour for certain instructions.
It needs no hypervisor support. Treat it as supported regardless of what
KVM reports.
Signed-off-by: Tao Su
Reviewed-by: Xiaoyao Li
---
Currently, bit 13, 14, 15 and 24 of MSR_IA32_ARCH_CAPABILITIES are
disclosed for fixing security issues, so add those bit definitions
and feature names.
Signed-off-by: Tao Su
---
target/i386/cpu.c | 4 ++--
target/i386/cpu.h | 4
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git
The GraniteRapids CPU model mainly adds the following new features based
on SapphireRapids:
- PREFETCHITI CPUID.(EAX=7,ECX=1):EDX[bit 14]
- AMX-FP16 CPUID.(EAX=7,ECX=1):EAX[bit 21]
- MCDT_NO CPUID.(EAX=7,ECX=2):EDX[bit 5]
- SBDR_SSDP_NO MSR_IA32_ARCH_CAPABILITIES[bit 13]
- FBSDP_NO
From: Lei Wang
Latest stepping (8) of SapphireRapids has bit 13, 14 and 15 of
MSR_IA32_ARCH_CAPABILITIES enabled, which are related to some security
fixes.
Add version 2 of SapphireRapids CPU model with those bits enabled also.
Signed-off-by: Lei Wang
Signed-off-by: Tao Su
---
From: Qian Wen
Emerald Rapids (EMR) is the next generation of Xeon server processor
after Sapphire Rapids (SPR).
Currently, regarding the feature set that can be exposed to guest, there
isn't any one new comparing with SPR cpu model, except that EMR has a
different model number.
Though it's
Considering the case of FEAT_7_1_EAX being 0 and FEAT_7_1_EDX being
non-zero, guest may report wrong maximum number sub-leaves in leaf
07H. So add FEAT_7_1_EDX to adjust feature level.
Fixes: eaaa197d5b11 ("target/i386: Add support for AVX-VNNI-INT8 in CPUID
enumeration")
Signed-off-by: Tao Su
CPUID.(EAX=7,ECX=2):EDX[bit 5] enumerates MCDT_NO. Processors enumerate
this bit as 1 do not exhibit MXCSR Configuration Dependent Timing (MCDT)
behavior and do not need to be mitigated to avoid data-dependent behavior
for certain instructions.
Since MCDT_NO is in a new sub-leaf, add a new CPUID
>-Original Message-
>From: Joao Martins
>Sent: Thursday, June 15, 2023 6:23 PM
>To: Duan, Zhenzhong
>Cc: alex.william...@redhat.com; c...@redhat.com; qemu-devel@nongnu.org;
>Peng, Chao P
>Subject: Re: [PATCH] vfio/migration: Fix return value of
>vfio_migration_realize()
>
>On
On 6/13/2023 11:29 AM, Wu, Fei wrote:
> On 6/7/2023 8:24 PM, Fei Wu wrote:
>> v15
>> ---
>> This is a large change:
>> * remove all time related stuffs, including cmd 'info profile'
>> * remove the per-TB flag, use global flag instead
>> * remove tb_stats pause/filter, but add status
>> * remove
From: Vikram Garhwal
Add CONFIG_XEN for aarch64 device to support build for ARM targets.
Signed-off-by: Vikram Garhwal
Signed-off-by: Stefano Stabellini
Reviewed-by: Alex Bennée
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
From: Vikram Garhwal
Add a new machine xenpvh which creates a IOREQ server to register/connect with
Xen Hypervisor.
Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a
TPM emulator and connects to swtpm running on host machine via chardev socket
and support TPM
From: Stefano Stabellini
In preparation to moving most of xen-hvm code to an arch-neutral location, move:
- shared_vmport_page
- log_for_dirtybit
- dirty_bitmap
- suspend
- wakeup
out of XenIOState struct as these are only used on x86, especially the ones
related to dirty logging.
Updated
From: Vikram Garhwal
In preparation to moving most of xen-hvm code to an arch-neutral location,
move non IOREQ references to:
- xen_get_vmport_regs_pfn
- xen_suspend_notifier
- xen_wakeup_notifier
- xen_ram_init
towards the end of the xen_hvm_init_pc() function.
This is done to keep the common
From: Stefano Stabellini
This is done to prepare for enabling xenpv support for ARM architecture.
On ARM it is possible to have a functioning xenpv machine with only the
PV backends and no IOREQ server. If the IOREQ server creation fails,
continue to the PV backends initialization.
From: Stefano Stabellini
On ARM it is possible to have a functioning xenpv machine with only the
PV backends and no IOREQ server. If the IOREQ server creation fails continue
to the PV backends initialization.
Also, moved the IOREQ registration and mapping subroutine to new function
From: Vikram Garhwal
Replace g_malloc with g_new and perror with error_report.
Signed-off-by: Vikram Garhwal
Reviewed-by: Stefano Stabellini
Reviewed-by: Paul Durrant
---
hw/xen/xen-hvm-common.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git
From: Vikram Garhwal
Like existing xen machines, xenpvh also cannot be used for qtest.
Signed-off-by: Vikram Garhwal
Reviewed-by: Stefano Stabellini
---
tests/qtest/libqtest.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/qtest/libqtest.c
From: Vikram Garhwal
xen-mapcache.c contains common functions which can be used for enabling Xen on
aarch64 with IOREQ handling. Moving it out from hw/i386/xen to hw/xen to make it
accessible for both aarch64 and x86.
Signed-off-by: Vikram Garhwal
Signed-off-by: Stefano Stabellini
From: Stefano Stabellini
have_xen_pci_passthrough is only used for Xen x86 VMs.
Signed-off-by: Stefano Stabellini
Reviewed-by: Alex Bennée
---
meson.build | 2 ++
1 file changed, 2 insertions(+)
diff --git a/meson.build b/meson.build
index 34306a6205..481865bfa9 100644
--- a/meson.build
+++
From: Stefano Stabellini
This patch does following:
1. creates arch_handle_ioreq() and arch_xen_set_memory(). This is done in
preparation for moving most of xen-hvm code to an arch-neutral location,
move the x86-specific portion of xen_set_memory to arch_xen_set_memory.
Also, move
Hi Peter, Richard,
Vikram fixed the gitlab test problem yet again. I appended a tiny qtest
fix at the end of the series.
Cheers,
Stefano
The following changes since commit 7efd65423ab22e6f5890ca08ae40c84d6660242f:
Merge tag 'pull-riscv-to-apply-20230614' of
On Wed, 14 Jun 2023, Vikram Garhwal wrote:
> Like existing xen machines, xenpvh also cannot be used for qtest.
>
> Signed-off-by: Vikram Garhwal
Reviewed-by: Stefano Stabellini
> ---
> tests/qtest/libqtest.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git
Use #ifdef, #ifndef for brevity and add comments to #endif that are
more than a few lines apart for clarity.
Signed-off-by: BALATON Zoltan
---
target/ppc/excp_helper.c | 49
1 file changed, 24 insertions(+), 25 deletions(-)
diff --git
CPUState is rarely needed by this function (only for logging a fatal
error) and it's easy to get from the env parameter so passing it
separately is not necessary.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/excp_helper.c | 9 -
1 file changed, 4
Improve readability by shortening some long comments, removing
comments that state the obvious and dropping some empty lines so they
don't distract when reading the code.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/cpu.h | 1 +
target/ppc/excp_helper.c |
Remove check for !defined(CONFIG_USER_ONLY) as this is already within
an #ifndef CONFIG_USER_ONLY block.
Signed-off-by: BALATON Zoltan
---
target/ppc/excp_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index
From: Nicholas Piggin
Unlike sc, for scv a facility unavailable interrupt must be generated
if FSCR[SCV]=0 so we can't raise the exception with nip set to next
instruction but we can move advancing nip if the FSCR check passes to
helper_scv so the exception handler does not need to change it.
Some helpers only have a CPUState local to call cpu_interrupt_exittb()
but we can use env_cpu for that and remove the local.
Signed-off-by: BALATON Zoltan
---
target/ppc/excp_helper.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target/ppc/excp_helper.c
These are some small clean ups for target/ppc/excp_helper.c trying to
make this code a bit simpler. No functional change is intended.
v2: Patch 3 changes according to review, added tags
v3: Address more review comments: don't change cpu_interrupt_exittb()
parameter, add back lev, add scv patch
We can get CPUState from env with env_cpu without going through
PowerPCCPU and casting that.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/excp_helper.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/target/ppc/excp_helper.c
Concatenate #if blocks that are ending then beginning on the next line
again.
Signed-off-by: BALATON Zoltan
---
target/ppc/excp_helper.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index
Most exceptions are raised with nip pointing to the faulting
instruction but the sc instruction generating a syscall exception
leaves nip pointing to next instruction. Fix gen_sc to not use
gen_exception_err() which sets nip back but correctly set nip to
pc_next so we don't have to patch this in
Use the env_cpu function to get the CPUState for cpu_abort. These are
only needed in case of fatal errors so this allows to avoid casting
and storing CPUState in a local variable wnen not needed.
Signed-off-by: BALATON Zoltan
---
target/ppc/excp_helper.c | 118
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/excp_helper.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 12d8a7257b..8298217e78 100644
--- a/target/ppc/excp_helper.c
+++
After previous changes the hypercall handling in 7xx and 74xx
exception handlers can be folded into one if statement to simpilfy
this code.
Signed-off-by: BALATON Zoltan
---
target/ppc/excp_helper.c | 24
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
On Thu Jun 15, 2023 at 7:27 AM AEST, BALATON Zoltan wrote:
On Wed, 14 Jun 2023, Nicholas Piggin wrote:
On Mon Jun 12, 2023 at 8:42 AM AEST, BALATON Zoltan wrote:
Most exceptions are raised with nip pointing to the faulting
instruction but the sc
Commit 7a3fe174b12d removed usage of POWERPC_SYSCALL_VECTORED, drop
the unused define as well.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Nicholas Piggin
---
target/ppc/translate.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/ppc/translate.c
All powerpc exception handlers share some code when handling machine
check exceptions. Move this to a common function.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/excp_helper.c | 114 +--
1 file changed, 25 insertions(+), 89
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
On Thu Jun 15, 2023 at 7:25 PM AEST, BALATON Zoltan wrote:
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
After previous changes the hypercall handling in 7xx and 74xx
exception handlers can be
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
On Thu Jun 15, 2023 at 7:19 PM AEST, BALATON Zoltan wrote:
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
Changing the parameter of cpu_interrupt_exittb() from CPUState to env
allows removing
On 6/13/2023 8:33 AM, Markus Armbruster wrote:
> Steven Sistare writes:
>> On 2/10/2023 4:25 AM, Markus Armbruster wrote:
>>> Steven Sistare writes:
On 2/9/2023 1:59 PM, Markus Armbruster wrote:
> Steven Sistare writes:
>> On 2/9/2023 11:46 AM, Markus Armbruster wrote:
>>>
Hi Gavin,
Thanks for the reply. I am new to Linux dev in general and not familiar
with the ACPI table, but I will research in the area and give it a try.
Sorry for the late response.
-Yusuf
On Fri, Jun 9, 2023, 8:36 PM Gavin Shan wrote:
> Hi Mohd,
>
> On 6/10/23 10:01 AM, Mohd Yusuf Abdul
Migration of a guest in the suspended runstate is broken.
The incoming migration code automatically tries to wake the guest,
which IMO is wrong -- the guest should end migration in the same
runstate it started. Further, the automatic wakeup fails. The guest
appears to be running, but is not.
Migration of a guest in the suspended state is broken. The incoming
migration code automatically tries to wake the guest, which IMO is
wrong -- the guest should end migration in the same state it started.
Further, the wakeup is done by calling qemu_system_wakeup_request(), which
bypasses
Add a test case to verify that the suspended state is handled correctly in
live migration. The test suspends the src, migrates, then wakes the dest.
Add an option to suspend the src in a-b-bootblock.S, which puts the guest
in S3 state after one round of writing to memory. The option is enabled
If qemu starts and loads a VM in the suspended state, then a later wakeup
request sets the state to running and tries to start execution, but it
bypasses vm_start() and its initialization steps, which is fatal for the
guest. See qemu_system_wakeup_request(), and qemu_system_wakeup() in
This should also avoid Coverity to report a memory leak warning when
the QEMU process exits. See CID 1508061.
Reviewed-by: Francisco Iglesias
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c |
As mentioned in docs/devel/style.rst "Automatic memory deallocation":
* Variables declared with g_auto* MUST always be initialized,
otherwise the cleanup function will use uninitialized stack memory
This avoids QEMU to coredump when running the "hash test" command
under Zephyr.
Cc: Steven Lee
This change completes commits 5aa281d757 ("aspeed: Introduce a
spi_boot region under the SoC") and 8b744a6a47 ("aspeed: Add a
boot_rom overlap region in the SoC spi_boot container") which
introduced a spi_boot container at the SoC level to map the boot rom
region as an overlap.
It also fixes a
From: Ninad Palsule
The current modeling of Rainier machine creates zero filled VPDs(EEPROMs).
This makes some services and applications unhappy and causing them to fail.
Hence this drop adds some fabricated data for system and BMC FRU so that
vpd services are happy and active.
Tested:
- The
Most of the Aspeed machines use the UART5 device for the boot console,
and QEMU connects the first serial Chardev to this SoC device for this
purpose. See routine connect_serial_hds_to_uarts().
Nevertheless, some machines use another boot console, such as the fuji,
and commit 5d63d0c76c
Cortex A7 CPUs with an FPU implementing VFPv4 without NEON support
have 16 64-bit FPU registers and not 32 registers. Let users set the
number of VFP registers with a CPU property.
The primary use case of this property is for the Cortex A7 of the
Aspeed AST2600 SoC.
Signed-off-by: Cédric Le
-20230615
for you to fetch changes up to 42bea956f6f7477c06186c7add62fa0107a27a9c:
target/arm: Allow users to set the number of VFP registers (2023-06-15
18:35:58 +0200)
aspeed queue:
* extension of the rainier machine with VPD
On Thu, 08 Jun 2023 00:55:22 PDT (-0700), r...@rivosinc.com wrote:
> This patch adds the new syscall for the
> "RISC-V Hardware Probing Interface"
> (https://docs.kernel.org/riscv/hwprobe.html).
>
> Signed-off-by: Robbin Ehn
> ---
> v1->v2: Moved to syscall.c
> v2->v3: Separate function, get/put
On Thu, Jun 15, 2023 at 05:15:28PM +0200, Bastian Koppelmann wrote:
> On Thu, Jun 15, 2023 at 09:37:23AM +0200, Richard Henderson wrote:
> > On 6/14/23 18:59, Bastian Koppelmann wrote:
> > > void helper_psw_write(CPUTriCoreState *env, uint32_t arg)
> > > {
> > > +uint32_t old_priv,
On Thu, Jun 15, 2023 at 09:37:23AM +0200, Richard Henderson wrote:
> On 6/14/23 18:59, Bastian Koppelmann wrote:
> > void helper_psw_write(CPUTriCoreState *env, uint32_t arg)
> > {
> > +uint32_t old_priv, new_priv;
> > +CPUState *cs;
> > +
> > +old_priv = extract32(env->PSW, 10,
On Thu, 2023-06-15 at 21:14 +0800, Weiwei Li wrote:
>
> On 2023/6/15 20:58, Rob Bradford wrote:
> > On Thu, 2023-06-15 at 14:32 +0800, Weiwei Li wrote:
> > > Add ext_zfbfmin/zvfbfmin/zvfbfwma properties.
> > > Add require check for BF16 extensions.
> > >
> > > Signed-off-by: Weiwei Li
> > >
Peter Xu writes:
> On Wed, Jun 14, 2023 at 02:59:54PM -0300, Fabiano Rosas wrote:
>> In this message Daniel mentions virDomainSnapshotXXX which would benefit
>> from using the same "file" migration, but being done live:
>>
>> https://lore.kernel.org/r/zd7mrgq+4qsdb...@redhat.com
>>
>> And from
The Linux kernel added a flood check for RX data recently in commit
496a4471b7c3 ("serial: imx: work-around for hardware RX flood"). This
check uses the wake bit in the UART status register 2. The wake bit
indicates that the receiver detected a start bit on the RX line. If the
kernel sees a number
Add crossplatform Meson file to build TCG plugins since
the Makefile makes wrong assumptions about it being used only
on Linux. Tested on Linux and macOS.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1710
Signed-off-by: Anton Kochkov
---
contrib/plugins/meson.build | 31
In testing RTEMS on the ZynqMP platform, I noticed that priority queues
were not functioning properly. I tracked this down to an unconnected
interrupt source in the Cadence GEM when multiple priority queues are
configured. I'm not sure if the Cadence IP can actually be configured
for separate
The Cadence GEM peripherals as configured for Zynq MPSoC and Versal
platforms have two priority queues with separate interrupt sources for
each. If the interrupt source for the second priority queue is not
connected, they work in polling mode only. This change connects the
second interrupt source
On 6/15/23 14:38, YangHang Liu wrote:
Test in the following two scenarios:
[1] Test scenario: Both source VM and target VM (in listening mode)
have enabled return-path and switchover-ack capability:
Test result : The VFIO migration completed successfully
[2] Test scenario : The source VM
If the monitor or the serial port use STDIO as backend on Windows 11 host,
e.g. -nographic options is used, the monitor or the guest Linux do not
response to arrow keys.
When Windows creates a console, ENABLE_VIRTUAL_PROCESS_INPUT is disabled
by default. Arrow keys cannot be retrieved by ReadFile
On Wed, Jun 14, 2023 at 1:50 AM Juan Quintela wrote:
> ~hyman wrote:
> > From: Hyman Huang(黄勇)
>
> To speed thinkng up, 1-5 are included on next Migration PULL request.
>
OK, I'll post the next version only contain the last 3 commits.
>
> Implement dirty-limit convergence algo for live
On 2023/6/15 17:21, Daniel Henrique Barboza wrote:
Cc: qemu-triv...@nongnu.org
Signed-off-by: Daniel Henrique Barboza
---
Reviewed-by: Weiwei Li
Weiwei Li
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index
On 2023/6/15 20:58, Rob Bradford wrote:
On Thu, 2023-06-15 at 14:32 +0800, Weiwei Li wrote:
Add ext_zfbfmin/zvfbfmin/zvfbfwma properties.
Add require check for BF16 extensions.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Daniel Henrique Barboza
---
On Thu, 2023-06-15 at 14:32 +0800, Weiwei Li wrote:
> Add ext_zfbfmin/zvfbfmin/zvfbfwma properties.
> Add require check for BF16 extensions.
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
> Reviewed-by: Daniel Henrique Barboza
> ---
> target/riscv/cpu.c | 20
Test in the following two scenarios:
[1] Test scenario: Both source VM and target VM (in listening mode)
have enabled return-path and switchover-ack capability:
Test result : The VFIO migration completed successfully
[2] Test scenario : The source VM has enabled return-path and
On Thu Jun 15, 2023 at 4:30 PM AEST, Harsh Prateek Bora wrote:
>
>
> On 6/8/23 14:43, Nicholas Piggin wrote:
> > Create spapr_nested.c for most of the nested HV implementation.
> >
> > Signed-off-by: Nicholas Piggin
> > ---
> > hw/ppc/meson.build | 1 +
> > hw/ppc/spapr_hcall.c | 415
On Thu Jun 15, 2023 at 7:25 PM AEST, BALATON Zoltan wrote:
> On Thu, 15 Jun 2023, Nicholas Piggin wrote:
> > On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
> >> After previous changes the hypercall handling in 7xx and 74xx
> >> exception handlers can be folded into one if statement to
On Thu Jun 15, 2023 at 7:19 PM AEST, BALATON Zoltan wrote:
> On Thu, 15 Jun 2023, Nicholas Piggin wrote:
> > On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
> >> Changing the parameter of cpu_interrupt_exittb() from CPUState to env
> >> allows removing some more local CPUState variables
On Thu, 15 Jun 2023 10:46:45 +0530
Ani Sinha wrote:
> PCIE root ports and other upstream ports only allow one device on slot 0.
> When hotplugging a device on a pcie root port, make sure that the device
> address passed always represents slot 0. Any other slot value would be
> illegal on a root
Hi
On Thu, Jun 15, 2023 at 12:36 PM Zhang Huasen
wrote:
> If the monitor or the serial port use STDIO as backend on Windows 11 host,
> e.g. -nographic options is used, the monitor or the guest Linux do not
> response to arrow keys.
>
> When Windows creates a console,
On 15/6/23 11:21, Daniel Henrique Barboza wrote:
Cc: qemu-triv...@nongnu.org
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
On 15/6/23 11:30, Martin Kaiser wrote:
The linux kernel added a flood check for rx data recently in commmit
"Linux", "commit"
Also maybe s/rx/RX/ s/uart/UART/.
496a4471b7c3 ("serial: imx: work-around for hardware RX flood"). This
check uses the wake bit in the uart status register 2. The
On 15/06/2023 10:19, Duan, Zhenzhong wrote:
>> -Original Message-
>> From: Joao Martins
>> Sent: Thursday, June 15, 2023 4:54 PM
>> To: Duan, Zhenzhong
>> Cc: alex.william...@redhat.com; c...@redhat.com; qemu-devel@nongnu.org;
>> Peng, Chao P
>> Subject: Re: [PATCH] vfio/migration: Fix
Skimming over at shmem_read_mapping_page() users, I assume most of
them
use a VM_PFNMAP mapping (or don't mmap them at all), where we won't be
messing with the struct page at all.
(That might even allow you to mmap hugetlb sub-pages, because the struct
page -- and mapcount -- will be ignored
[ ... ]
Yes it worked with 2 chips.
I will give the next series a try.
[ ... ]
It's difficult to review PATCH 4 without some good knowledge of HW. I know
you do but you can not review your own patches ! That said, the impact is
limited to PowerNV machines, I guess we are fine.
Yeah. I
On Saturday, June 10, 2023 3:39:44 PM CEST Christian Schoenebeck wrote:
> As recent CVE-2023-2861 once again showed, the 9p 'proxy' fs driver is in
> bad shape. Using the 'proxy' backend was already discouraged for safety
> reasons before and we recommended to use the 'local' backend instead,
>
The linux kernel added a flood check for rx data recently in commmit
496a4471b7c3 ("serial: imx: work-around for hardware RX flood"). This
check uses the wake bit in the uart status register 2. The wake bit
indicates that the receiver detected a start bit on the rx line. If the
kernel sees a
On Thu, Jun 15, 2023 at 11:07 AM Bilal Elmoussaoui
wrote:
> So that clients making use of the DBus backend could
> send touch events through the new org.qemu.Display1.Touch
> interface
>
> Signed-off-by: Bilal Elmoussaoui
>
Reviewed-by: Marc-André Lureau
> ---
> ui/dbus-console.c| 59
Hi Philippe,
thanks for reviewing my patch.
Philippe Mathieu-Daudé (phi...@linaro.org) wrote:
> Shouldn't we mask this bit for interruptions now?
yes, we should support interrupts from the wake bit. I'll add your
snippet and send a v2.
Thanks,
Martin
> -- >8 --
> diff --git
On Thu, Jun 15, 2023 at 11:07 AM Bilal Elmoussaoui
wrote:
> To share code between the GTK and DBus UI bakcends
> see the next commit for details
>
> Signed-off-by: Bilal Elmoussaoui
>
Reviewed-by: Marc-André Lureau
> ---
> include/ui/console.h | 15 ++
> ui/console.c | 65
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
After previous changes the hypercall handling in 7xx and 74xx
exception handlers can be folded into one if statement to simpilfy
this code.
Signed-off-by: BALATON Zoltan
---
Cc: qemu-triv...@nongnu.org
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 95708d890e..3464abd226 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1690,7 +1690,7 @@
>-Original Message-
>From: Joao Martins
>Sent: Thursday, June 15, 2023 4:54 PM
>To: Duan, Zhenzhong
>Cc: alex.william...@redhat.com; c...@redhat.com; qemu-devel@nongnu.org;
>Peng, Chao P
>Subject: Re: [PATCH] vfio/migration: Fix return value of
>vfio_migration_realize()
>
>
>
>On
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
Changing the parameter of cpu_interrupt_exittb() from CPUState to env
allows removing some more local CPUState variables in callers.
I think it's more consistent to keep cs, which is same as
To share code between the GTK and DBus UI bakcends
see the next commit for details
Signed-off-by: Bilal Elmoussaoui
---
include/ui/console.h | 15 ++
ui/console.c | 65
ui/gtk.c | 61
So that clients making use of the DBus backend could
send touch events through the new org.qemu.Display1.Touch
interface
Signed-off-by: Bilal Elmoussaoui
---
ui/dbus-console.c| 59 +++-
ui/dbus-display1.xml | 45 +++--
On 15/06/2023 09:18, Zhenzhong Duan wrote:
> We should print "Migration disabled" when migration is blocked
> in vfio_migration_realize().
>
> Fix it by reverting return value of migrate_add_blocker(),
> meanwhile error out directly once migrate_add_blocker() failed.
>
It wasn't immediately
We should print "Migration disabled" when migration is blocked
in vfio_migration_realize().
Fix it by reverting return value of migrate_add_blocker(),
meanwhile error out directly once migrate_add_blocker() failed.
Signed-off-by: Zhenzhong Duan
---
hw/vfio/common.c| 4 ++--
On Thursday, 15 June 2023 Fiona Ebner wrote:
> which version/build of QEMU are you using? Can you correlate the issue
> with any block job or was the drive in use by the guest only?
I believe this has been seen on a range of releases so that includes QEMU 4.2
and 2.12. We do have custom patches
On Thu, 15 Jun 2023 at 03:02, Nicholas Piggin wrote:
>
> On Wed Jun 14, 2023 at 11:09 AM AEST, Joel Stanley wrote:
> > On Thu, 8 Jun 2023 at 07:58, Nicholas Piggin wrote:
> > >
> > > Posting again, a couple of patches were merged and accounted for review
> > > comments from last time.
> >
> > I
Yeqi Fu writes:
> Signed-off-by: Yeqi Fu
> ---
> common-user/native/libnative.c | 65 ++
> include/native/libnative.h | 11 ++
> include/native/native-func.h | 11 ++
> 3 files changed, 87 insertions(+)
> create mode 100644
On 6/14/23 18:59, Bastian Koppelmann wrote:
from ISA v1.6.1 onwards the bit position of ICR.IE changed.
ctx->icr_ie_offset contains the correct value for the ISA version used
by the vCPU.
Signed-off-by: Bastian Koppelmann
---
target/tricore/translate.c | 3 ++-
1 file changed, 2
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