Manos Pitsidianakis writes:
> Tracing DPRINTFs to stderr might not be desired. A developer that relies
> on tracepoints should be able to opt-in to each tracepoint and rely on
> QEMU's log redirection, instead of stderr by default.
>
> This commit converts DPRINTFs in this file that are used for
From: Bibo Mao
When compiling qemu with system KVM mode for LoongArch, header files
in directory linux-headers/asm-loongarch should be used firstly.
Otherwise it fails to find kvm.h on system with old glibc, since
latest kernel header files are not installed.
This patch adds linux_arch
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231207105426.49339-3-phi...@linaro.org>
---
target/alpha/sys_helper.c | 3 ---
target/alpha/meson.build | 6 --
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/alpha/sys_helper.c
accel_init_ops_interfaces() is system specific, so
rename it as accel_system_init_ops_interfaces() to
ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Message-ID: <2024020221.35072-2-phi...@linaro.org>
---
From: Raphael Norwitz
I will be leaving Nutanix so updating my email in MAINTAINERS to my
personal email for now.
Signed-off-by: Raphael Norwitz
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <2024092846.111699-1-raphael.norw...@nutanix.com>
Signed-off-by: Philippe Mathieu-Daudé
---
From: Mark Cave-Ayland
The current code in esp_pci_dma_memory_rw() sets the DMA address to the value
of the DMA_SPA (Starting Physical Address) register which is incorrect: this
means that for each callback from the SCSI layer the DMA address is set back
to the starting address.
In the case
From: Gerd Hoffmann
Add an update buffer where all block updates are staged.
Flush or discard updates properly, so we should never see
half-completed block writes in pflash storage.
Drop a bunch of FIXME comments ;)
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Message-ID:
The tcg_cpu_FOO() names are riscv specific, so rename
them as riscv_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Message-ID:
'can_do_io' is specific to TCG. It was added to other
accelerators in 626cf8f4c6 ("icount: set can_do_io outside
TB execution"), then likely copy/pasted in commit c97d6d2cdf
("i386: hvf: add code base from Google's QEMU repository").
Having it set in non-TCG code is confusing, so remove it from
Both cryptodev_backend_set_throttle() and CryptoDevBackendClass::init()
can set their Error** argument. Do not ignore them, return early
on failure. Without that, running into another failure trips
error_setv()'s assertion. Use the ERRP_GUARD() macro as suggested
in commit ae7c80a7bd ("error: New
Commit e3f7c801f1 introduced the TCGCPUOps::debug_check_breakpoint()
handler, and commit 10c37828b2 "moved breakpoint recognition outside
of translation", so "we no longer need to flush any TBs when changing
BPs".
The last target using tb_invalidate_phys_addr() was converted to the
Since previous commit, tb_invalidate_phys_page() is not used
anymore in system emulation. Make it static for user emulation
and remove its public declaration in "exec/translate-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20231130205600.35727-1-phi...@linaro.org>
Reviewed-by:
From: Daniel Hoffman
This conversion is pretty straight-forward. Standardized some formatting
so the +0 and +4 offset cases can recycle the same message.
Signed-off-by: Daniel Hoffman
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20231118231129.2840388-1-dhoff...@gmail.com>
[PMD: Fixed few
From: Bernhard Beschow
This is a follow-up on commit 89965db43cce "hw/isa/piix3: Avoid Xen-specific
variant of piix3_write_config()" which introduced
piix_intx_routing_notifier_xen(). This function is implemented in board code but
accesses the PCI configuration space of the PIIX ISA function to
From: Gerd Hoffmann
Move the offset calculation, do it once at the start of the function and
let the 'p' variable point directly to the memory location which should
be updated. This makes it simpler to update other buffers than
pfl->storage in an upcoming patch. No functional change.
From: Samuel Tardieu
The 16MiB flash device is only used by the deprecated shix machine.
Its code it old and unmaintained, and has never been adapted to the
QOM architecture. It still contains debug statements and uses global
variables. It is time to deprecate it.
Signed-off-by: Samuel Tardieu
From: Max Filippov
When icount and ibreak exceptions are due to happen on the same address
icount has higher precedence.
Signed-off-by: Max Filippov
Acked-by: Richard Henderson
Message-ID: <20231130171920.3798954-3-jcmvb...@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé
---
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <20231208113529.74067-7-phi...@linaro.org>
---
include/sysemu/cpu-timers.h | 2 +-
include/sysemu/replay.h | 11 ---
stubs/icount.c | 19 ---
3 files changed, 9
Except helper_load_pcc(), all helpers from sys_helper.c
are system-emulation specific. In preparation of restricting
sys_helper.c to system emulation, extract helper_load_pcc()
to clk_helper.c.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id:
Since the CPUState::start-powered-off property is irrelevant
to user emulation, restrict it to system emulation.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <2024061817.43150-1-phi...@linaro.org>
---
cpu-target.c | 7 ++-
1 file changed, 6
From: Samuel Tardieu
The shix machine has been designed and used at Télécom Paris from 2003
to 2010. It had been added to QEMU in 2005 and has not been maintained
since. Since nobody is using the physical board anymore nor interested
in maintaining the QEMU port, it is time to deprecate it.
'tcg_cflags' is specific to TCG.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231130075958.21285-1-phi...@linaro.org>
---
target/arm/cpu.c | 2 +-
target/i386/cpu.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.c
pmu_init() register its event checking the pm_event::supported()
handler. For INST_RETIRED, the event is only registered and the
bit enabled in the PMU Common Event Identification register when
icount is enabled as ICOUNT_PRECISE.
PMU events are TCG-only, hardware accelerators handle them
Peter Maydell writes:
> Convert the musicpal key input device to use
> qemu_add_kbd_event_handler(). This lets us simplify it because we no
> longer need to track whether we're in the middle of a PS/2 multibyte
> key sequence.
>
> In the conversion we move the keyboard handler registration from
These extensions represent the atomic operations from A (Zaamo) and the
Load-Reserved/Store-Conditional operations from A (Zalrsc)
Signed-off-by: Rob Bradford
Reviewed-by: Daniel Henrique Barboza
---
target/riscv/cpu.c | 5 +
target/riscv/cpu_cfg.h | 2 ++
2 files changed, 7
Introduce support for the proposed new (fast-track) Zaamo and Zalrsc
extensions [1] which represent the AMO and LR/SC subsets of the A
extension.
The motivation for the subsets being available separately is that
certain classes of CPUs may choose to only implement a subset for
architectural
Following the pattern for 'M' and Zmmul check if either the 'A'
extension is enabled or the appropriate split extension for the
instruction.
Signed-off-by: Rob Bradford
---
target/riscv/insn_trans/trans_rva.c.inc | 56 +++--
1 file changed, 34 insertions(+), 22 deletions(-)
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
According to the QEMU Coding Style document:
> Do not use printf(), fprintf() or monitor_printf(). Instead, use
> error_report() or error_vreport() from error-report.h. This ensures the
> error is reported in the right place (current monitor or stderr), and in
> a uniform format.
> Use
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
This series changes some printfs to use the trace event framework.
Additionally, it converts some error/warning reporting fprintfs to
error_report/warn_report.
Manos Pitsidianakis (6):
hw/arm/z2: convert DPRINTF to tracepoints
hw/arm/strongarm.c: convert DPRINTF to tracepoints
On Thu, 2024-01-18 at 16:49 -0300, Daniel Henrique Barboza wrote:
>
>
> On 1/15/24 13:25, Rob Bradford wrote:
> > Following the pattern for 'M' and Zmmul check if either the 'A'
> > extension is enabled or the appropriate split extension for the
> > instruction.
> >
> > Also remove the
Hello, Phil, PeterM,
On Thu, Jan 18, 2024 at 04:53:42PM +0100, Philippe Mathieu-Daudé wrote:
> I concur. Devices reset is hard, but bus reset is even harder.
> Having a quick look, the issues tracked by Alex & Peter might
> come from the PCI bridges using the legacy DeviceReset.
The challenges
On Wed, Jan 17, 2024 at 11:29:08AM +0100, Eric Auger wrote:
> Hi Peter,
Hi, Eric,
Thanks for the reviews!
>
> On 1/17/24 10:15, pet...@redhat.com wrote:
> > From: Peter Xu
> >
> > There're issue reported that when syetem_reset the VM with an intel iommu
> system_reset
> > device and MT2892
On Fri, Jan 19, 2024 at 08:12:18AM +1100, Richard Henderson wrote:
> On 1/16/24 07:21, Ilya Leoshkevich wrote:
> > CVDG is the same as CVD, except that it converts 64 bits into 128,
> > rather than 32 into 64. Use larger data types in the CVD helper and
> > reuse it.
> >
> > Reported-by: Ido Plat
On Fri, Jan 19, 2024 at 7:42 AM Wentao Jia wrote:
>
>
> VIRTIO_F_IN_ORDER and VIRTIO_F_NOTIFICATION_DATA feature are important feature
> for dpdk vdpa packets transmitting performance, add the 2 features at
> vhost-user
> front-end to negotiation with backend.
>
> Signed-off-by: Kyle Xu
>
Am 11.01.2024 um 11:08 hat Philippe Mathieu-Daudé geschrieben:
> On 11/1/24 10:47, Marc Zyngier wrote:
> > On Thu, 11 Jan 2024 09:39:18 +,
> > Philippe Mathieu-Daudé wrote:
> > >
> > > On 10/1/24 20:53, Philippe Mathieu-Daudé wrote:
> > > > The "aarch64" property is added to ARMCPU when the
On Thu, 18 Jan 2024 at 12:45, Peter Maydell wrote:
>
> v2: dropped the nuvoton changes as the tests didn't pass
> on big-endian hosts.
>
> -- PMM
>
> The following changes since commit 977542ded7e6b28d2bc077bcda24568c716e393c:
>
> Merge tag 'pull-testing-updates-120124-2' of
>
On Wed, 17 Jan 2024 at 09:43, Daniel P. Berrangé wrote:
>
> On Wed, Jan 17, 2024 at 09:55:56AM +0530, Ani Sinha wrote:
> > By default, the timeout to receive any specified event from the QEMU VM is
> > 60
> > seconds set by the python avocado test framework. Please see event_wait()
> > and
> >
On Tue, 16 Jan 2024 at 07:57, Thomas Huth wrote:
>
> Hi Peter!
>
> The following changes since commit 977542ded7e6b28d2bc077bcda24568c716e393c:
>
> Merge tag 'pull-testing-updates-120124-2' of
> https://gitlab.com/stsquad/qemu into staging (2024-01-12 14:02:53 +)
>
> are available in the
On Fri, Jan 19, 2024 at 10:12:37AM +0300, Michael Tokarev wrote:
> 17.01.2024 19:42, Fabiano Rosas :
> > Avocado needs sqlite3:
>
> > --- a/tests/docker/dockerfiles/opensuse-leap.docker
> > +++ b/tests/docker/dockerfiles/opensuse-leap.docker
> > @@ -90,6 +90,7 @@ RUN zypper update -y && \
> >
Fabiano,
On Thu, Jan 18, 2024 at 01:49:48PM -0300, Fabiano Rosas wrote:
> Here's the second half of adding a migration compatibility test to CI.
>
> We've already added support for running the full set of migration
> tests with two QEMU binaries since commit 5050ad2a380
>
On 1/18/24 15:14, Nicholas Piggin wrote:
POWER10 is the latest IBM Power machine. Although it is not offered in
"OPAL mode" (i.e., powernv configuration), so there is a case that it
should remain at powernv9, most of the development work is going into
powernv10 at the moment.
Signed-off-by:
On 1/18/24 15:09, Nicholas Piggin wrote:
This includes a number of improvements and fixes. Importantly there
is a change for QEMU platforms to permit the ChipTOD to be initialised
if it is present in the device tree. This will facilitate ChipTOD
enablement in pnv.
Signed-off-by: Nicholas Piggin
Hello Nick,
On 1/18/24 16:06, Nicholas Piggin wrote:
This is mostly TCG core emulation improvements and fixes. I
got the chiptod model in there because it's intertwined with
TFMR SPR.
Other non-TCG patches are spapr MSR entry point change which
goes together with the other machine check /
This series has also been successfully tested in x86_64.
Tested-by: Mario Casquero
On Thu, Jan 18, 2024 at 4:08 AM Zhenyu Zhang wrote:
>
> [PATCH v1 2/2] memory-device: reintroduce memory region size check
>
> Test on 64k basic page size aarch64
> The patches work well on my Ampere host.
> The
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