Peter missed the Sphinx HMP document for the "resume/-r" flag in commit
7a4da28b26 ("qmp: hmp: add migrate "resume" option"). Add it. Avoid
adding a Fixes to make life easier for the stable maintainer.
When at it, slightly cleanup the lines, move "detach/-d" to a separate
section rather than
On Thu, May 02, 2024 at 05:22:42PM +0200, Paolo Bonzini wrote:
> Avoids an explicit use of sizeof(). The GLib allocation macros
> ensure that the multiplication by the size of the element
> uses the right type and does not overflow.
>
> While at it, change bitmap_new() to use g_new0 directly.
Devices implementing ATS can send translation requests using
pci_ats_request_translation_pasid.
The invalidation events are sent back to the device using the iommu
notifier managed with pci_register_iommu_tlb_event_notifier and
pci_unregister_iommu_tlb_event_notifier
Signed-off-by: Clément
This will be useful for devices that support ATS
Signed-off-by: Clément Mathieu--Drif
---
include/exec/memory.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 304504de02..f4b33415d7 100644
--- a/include/exec/memory.h
+++
The 'level' field in vtd_iotlb_key is an uint8_t.
We don't need to store level as an int in vtd_lookup_iotlb (avoids a
'loosing precision' warning).
VTDIOTLBPageInvInfo.mask is used in binary operations with addresses.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2
This will be necessary for devices implementing ATS.
We also define a new macro IOMMU_ACCESS_FLAG_FULL in addition to
IOMMU_ACCESS_FLAG to support more access flags.
IOMMU_ACCESS_FLAG is kept for convenience and backward compatibility.
Here are the flags added (defined by the PCIe 5
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 26 ++
hw/i386/intel_iommu_internal.h | 3 +++
2 files changed, 29 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 240ecb8f72..cad70e0d05 100644
---
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2 +-
hw/i386/intel_iommu_internal.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index c475a354a0..98c4a70fe0 100644
--- a/hw/i386/intel_iommu.c
+++
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index a62cbf303d..02c5f0fa4f 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2302,6 +2302,7 @@ out:
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 85a7ebac67..c475a354a0 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -3365,6 +3365,11 @@ static bool
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pcie.c | 24
include/hw/pci/pcie.h | 6 +-
include/hw/pci/pcie_regs.h | 3 +++
3 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pci.c | 20
include/hw/pci/pci.h | 34 ++
2 files changed, 54 insertions(+)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index e5f72f9f1d..9ed788c95d 100644
--- a/hw/pci/pci.c
+++
This will be used to implement the device IOTLB invalidation
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 39 ---
1 file changed, 24 insertions(+), 15 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu_internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/intel_iommu_internal.h
ats_enabled and pasid_enabled check whether the capabilities are
present or not. If so, we read the configuration space to get
the status of the feature (enabled or not).
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pcie.c | 18 ++
include/hw/pci/pcie.h | 3 +++
2
This piece of code can be shared by both IOTLB invalidation and
PASID-based IOTLB invalidation
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 57 +--
1 file changed, 33 insertions(+), 24 deletions(-)
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 75 --
hw/i386/intel_iommu_internal.h | 1 +
2 files changed, 73 insertions(+), 3 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index aac7677063..400b27fc95
This series belongs to a list of series that add SVM support for VT-d.
As a starting point, we use the series called 'intel_iommu: Enable stage-1
translation' (rfc2) by Zhenzhong Duan and Yi Liu.
Here we focus on the implementation of ATS support in the IOMMU and on a
PCI-level
API for ATS to
First stage translation must fail if the address to translate is
not canonical.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 22 ++
hw/i386/intel_iommu_internal.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/hw/i386/intel_iommu.c
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 13 ++---
include/hw/i386/intel_iommu.h | 2 +-
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index e7c1a5582a..e9fa48b378 100644
---
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pci.c| 24 ++--
include/hw/pci/pci_device.h | 1 +
2 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 045d69f4c1..e5f72f9f1d 100644
--- a/hw/pci/pci.c
+++
Implements the behavior defined in section 10.2.3.5 of PCIe spec rev 5.
This is needed by devices that support ATS.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/i386/intel_iommu.c
IOMMU have to implement iommu_ats_request_translation to support ATS.
Devices can use IOMMU_TLB_ENTRY_TRANSLATION_ERROR to check the tlb
entries returned by a translation request.
Signed-off-by: Clément Mathieu--Drif
---
include/exec/memory.h | 26 ++
system/memory.c
As the SVM-capable devices will need to cache translations, we provide
an first implementation.
This cache uses a two-level design based on hash tables.
The first level is indexed by a PASID and the second by a virtual addresse.
Signed-off-by: Clément Mathieu--Drif
---
tests/unit/meson.build |
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 42 ++
hw/i386/intel_iommu_internal.h | 10
2 files changed, 47 insertions(+), 5 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index e9fa48b378..a62cbf303d 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -6000,9 +6000,24 @@
We add a convenient way to initialize an device-iotlb notifier.
This is meant to be used by ATS-capable devices.
pci_device_iommu_memory_region_pasid is introduces in this commit and
will be used in several other SVM-related functions exposed in
the PCI API.
Signed-off-by: Clément Mathieu--Drif
Avoids an explicit use of sizeof(). The GLib allocation macros
ensure that the multiplication by the size of the element
uses the right type and does not overflow.
While at it, change bitmap_new() to use g_new0 directly. Its current
impl of calling bitmap_try_new() followed by a plain abort()
On 5/2/24 10:02, Daniel P. Berrangé wrote:
Hi QEMU,
I work in Android Studio Emulator and we would like to develop devices
in C++. Unfortunately, QEMU headers cannot be used with C++ as is
(e.g. they use C++ keywords as variable names or implicitly cast void*
to T*).
NB, in recent past QEMU
On Thu, 2 May 2024 at 09:02, Daniel P. Berrangé wrote:
>
> On Wed, May 01, 2024 at 09:40:16PM -0700, Roman Kiryanov wrote:
> > Hi QEMU,
> >
> > I work in Android Studio Emulator and we would like to develop devices
> > in C++. Unfortunately, QEMU headers cannot be used with C++ as is
> > (e.g.
On Thu, May 02, 2024 at 03:57:25PM +0100, John Levon wrote:
> On Wed, Nov 01, 2023 at 06:16:06AM -0700, Mattias Nissler wrote:
>
> > This series adds basic support for message-based DMA in qemu's vfio-user
>
> Now qemu 9.0 is out, any reason not to get this series merged?
It looks like all
On Wed, May 01, 2024 at 07:27:46PM +0100, Daniel P. Berrangé wrote:
> The various targets which define versioned machine types have
> a bunch of obfuscated macro code for defining unique function
> and variable names using string concatenation.
>
> This addes a couple of helpers to improve the
On Wed, Nov 01, 2023 at 06:16:06AM -0700, Mattias Nissler wrote:
> This series adds basic support for message-based DMA in qemu's vfio-user
Now qemu 9.0 is out, any reason not to get this series merged?
thanks
john
The Hexagon Programmer's Reference Manual says that the exception 0x1e
should be raised upon an unaligned program counter. Let's implement that
and also add some tests.
Signed-off-by: Matheus Tavares Bernardino
Reviewed-by: Richard Henderson
---
v3:
On Thu, May 02, 2024 at 01:35:06PM +, Dr. David Alan Gilbert wrote:
> * Markus Armbruster (arm...@redhat.com) wrote:
> > Fabiano Rosas writes:
> >
> > > The block migration is considered obsolete and has been deprecated in
> > > 8.2. Remove the migrate command option that enables it. This
On Thu, May 2, 2024 at 12:20 AM Thomas Huth wrote:
> On 02/05/2024 06.40, Roman Kiryanov wrote:
> > Hi QEMU,
> >
> > I work in Android Studio Emulator and we would like to develop devices
> > in C++. Unfortunately, QEMU headers cannot be used with C++ as is
> > (e.g. they use C++ keywords as
On Tue, 30 Apr 2024 08:52:36 -0700 Richard Henderson
wrote:
>
> On 4/30/24 07:25, Matheus Tavares Bernardino wrote:
> > +void test_multi_cof(void)
> > +{
> > +asm volatile(
> > +"p0 = cmp.eq(r0, r0)\n"
> > +"{\n"
> > +"if (p0) jump test_multi_cof_unaligned\n"
> >
On Thu, May 02, 2024 at 03:29:04PM +0100, Peter Maydell wrote:
> We only support the most recent two versions of macOS (currently
> macOS 13 Ventura and macOS 14 Sonoma), and our ui/cocoa.m code
> already assumes at least macOS 12 Monterey or better, because it uses
> NSScreen safeAreaInsets,
We only support the most recent two versions of macOS (currently
macOS 13 Ventura and macOS 14 Sonoma), and our ui/cocoa.m code
already assumes at least macOS 12 Monterey or better, because it uses
NSScreen safeAreaInsets, which is 12.0-or-newer.
Remove the ifdefs that were providing backwards
On Thu, May 02, 2024 at 04:23:16PM +0200, Paolo Bonzini wrote:
> Avoids an explicit use of sizeof(). The GLib allocation macros
> ensure that the multiplication by the size of the element
> uses the right type and does not overflow.
>
> Cc: qemu-triv...@nongnu.org
> Cc: Roman Kiryanov
> Cc:
Avoids an explicit use of sizeof(). The GLib allocation macros
ensure that the multiplication by the size of the element
uses the right type and does not overflow.
Cc: qemu-triv...@nongnu.org
Cc: Roman Kiryanov
Cc: Daniel Berrange
Signed-off-by: Paolo Bonzini
---
include/qemu/bitmap.h | 12
Add xlnx_dpdma_read_descriptor() and
xlnx_dpdma_write_descriptor() functions.
xlnx_dpdma_read_descriptor() combines reading a
descriptor from desc_addr by calling dma_memory_read()
and swapping the desc fields from guest memory order
to host memory order. xlnx_dpdma_write_descriptor()
performs
I saw the patch failed to be applied so figured the email mangled it. I sent
another email of the patch as plain text so hopefully that will work better.
Sorry for the duplicate submission but I didn't have this email thread yet to
respond to. How would you like to continue this discussion
On Thu, 2 May 2024 at 14:50, Marcin Juszkiewicz
wrote:
> Both hw/arm/sbsa-ref.c and hw/arm/virt.c build cpu information in
> DeviceTree using "arm_build_mp_afinnity()" function. So if firmware
> parses it then it gets wrong values.
What wrong values? The values in the dtb should match the
Aff*
W dniu 2.05.2024 o 15:13, Peter Maydell pisze:
On Thu, 2 May 2024 at 14:11, Marcin Juszkiewicz
wrote:
W dniu 2.05.2024 o 15:04, Dorjoy Chowdhury pisze:
Should "return" also have "(1 << 24) |" to have MT=1 set?
Otherwise MPIDR_EL1 = 0x000100 can mean core0 in cluster1 or core1 in
cluster0.
On 2/5/24 12:27, Philippe Mathieu-Daudé wrote:
On 30/4/24 23:42, Ilya Leoshkevich wrote:
On Tue, Apr 30, 2024 at 09:00:17PM +0200, Philippe Mathieu-Daudé wrote:
On 30/4/24 20:45, Philippe Mathieu-Daudé wrote:
Hi Ilya,
On 30/4/24 19:55, Ilya Leoshkevich wrote:
On Tue, Apr 30, 2024 at
* Markus Armbruster (arm...@redhat.com) wrote:
> Fabiano Rosas writes:
>
> > The block migration is considered obsolete and has been deprecated in
> > 8.2. Remove the migrate command option that enables it. This only
> > affects the QMP and HMP commands, the feature can still be accessed by
> >
Hi Michael, Hi Peter,
On Thu, May 2, 2024 at 3:23 PM Michael Galaxy wrote:
>
> Yu Zhang / Jinpu,
>
> Any possibility (at your lesiure, and within the disclosure rules of
> your company, IONOS) if you could share any of your performance
> information to educate the group?
>
> NICs have indeed
Yu Zhang / Jinpu,
Any possibility (at your lesiure, and within the disclosure rules of
your company, IONOS) if you could share any of your performance
information to educate the group?
NICs have indeed changed, but not everybody has 100ge mellanox cards at
their disposal. Some people don't.
sclp_get_event_facility_bus() scans the whole machine to find a
TYPE_SCLP_EVENTS_BUS object. The SCLPDevice instance is now available
under the machine state, use it to simplify the lookup and adjust the
creation of the consoles.
Signed-off-by: Cédric Le Goater
---
get_sclp_device() scans the whole machine to find a TYPE_SCLP object.
Now that the SCLPDevice instance is available under the machine state,
use it to simplify the lookup. While at it, remove the inline to let
the compiler decide on how to optimize.
Signed-off-by: Cédric Le Goater
---
Initialize directly SCLPDevice from the machine init handler and
remove s390_sclp_init(). We will use the SCLPDevice pointer later to
create the consoles.
Signed-off-by: Cédric Le Goater
---
include/hw/s390x/s390-virtio-ccw.h | 3 +++
include/hw/s390x/sclp.h| 2 --
Hello,
Here is a little series reworking the SCLPDevice initialization in the
machine to simplify its use.
Applies on top of :
https://lore.kernel.org/qemu-devel/20240430190843.453903-1-th...@redhat.com/
Thanks,
C.
Cédric Le Goater (3):
s390x: Introduce a SCLPDevice pointer under the
On Thu, 2 May 2024 at 14:11, Marcin Juszkiewicz
wrote:
>
> W dniu 2.05.2024 o 15:04, Dorjoy Chowdhury pisze:
> >> Should "return" also have "(1 << 24) |" to have MT=1 set?
> >>
> >> Otherwise MPIDR_EL1 = 0x000100 can mean core0 in cluster1 or core1 in
> >> cluster0.
> >>
> >> Value 0x1000100
W dniu 2.05.2024 o 15:04, Dorjoy Chowdhury pisze:
Should "return" also have "(1 << 24) |" to have MT=1 set?
Otherwise MPIDR_EL1 = 0x000100 can mean core0 in cluster1 or core1 in
cluster0.
Value 0x1000100 shows MT=1 so thread0 in core1 in cluster0.
I don't know all the details but from what
On Thu, May 2, 2024 at 6:14 PM Marcin Juszkiewicz
wrote:
>
> W dniu 19.04.2024 o 20:31, Dorjoy Chowdhury pisze:
> > -uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz)
> > +uint64_t arm_build_mp_affinity(ARMCPU *cpu, int idx, uint8_t clustersz)
> > {
> > +if (cpu->has_smt) {
> > +
On Tue, 30 Apr 2024 at 21:01, Ryan Mamone
wrote:
>
> From 617b2d92085d03524dcf5c223568a4856cdff47f Mon Sep 17 00:00:00 2001
>
> From: Ryan Mamone
>
> Date: Tue, 30 Apr 2024 13:20:50 -0400
>
> Subject: [PATCH] hw/display: Add SSD1306 dot matrix display controller support
Hi; thanks for this
Peter Xu writes:
> On Tue, Apr 30, 2024 at 11:00:24AM -0300, Fabiano Rosas wrote:
>> Philippe Mathieu-Daudé writes:
>>
>> > (Cc'ing migration maintainers)
>> >
>> > On 30/4/24 03:23, Song Gao wrote:
>> >> vmstate does not save kvm_state_conter,
>> >> which can cause VM recovery from disk to
On Tue, Apr 30, 2024 at 03:00:45PM GMT, Daniel Henrique Barboza wrote:
>
>
> On 4/29/24 16:28, Atish Patra wrote:
> > Currently, if a counter monitoring cycle/instret is stopped via
> > mcountinhibit we just update the state while the value is saved
> > during the next read. This is not accurate
Steve Sistare writes:
> Add the cpr-exec migration mode. Usage:
> qemu-system-$arch -machine memfd-alloc=on ...
> migrate_set_parameter mode cpr-exec
> migrate_set_parameter cpr-exec-args \
> ... -incoming
> migrate -d
>
> The migrate command stops the VM, saves state to the
Steve Sistare writes:
> Create the cpr-exec-args migration parameter, defined as a list of
> strings. It will be used for cpr-exec migration mode in a subsequent
> patch.
>
> No functional change, except that cpr-exec-args is shown by the
> 'info migrate' command.
>
> Signed-off-by: Steve
On Thu, May 02, 2024 at 02:08:58PM +0200, Thomas Huth wrote:
> On 01/05/2024 20.27, Daniel P. Berrangé wrote:
> > The automatic deprecation mechanism introduced in the preceeding patches
> > will mark every i440fx machine upto and including 2.12 as deprecated. As
> > such we can revert the
W dniu 19.04.2024 o 20:31, Dorjoy Chowdhury pisze:
-uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz)
+uint64_t arm_build_mp_affinity(ARMCPU *cpu, int idx, uint8_t clustersz)
{
+if (cpu->has_smt) {
+/*
+ * Right now, the ARM CPUs with SMT supported by QEMU only
On Tue, Apr 16, 2024 at 08:59:36PM +0200, Philippe Mathieu-Daudé wrote:
> The pc-i440fx-2.3 machine was deprecated for the 8.2
> release (see commit c7437f0ddb "docs/about: Mark the
> old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
> time to remove it.
>
> Signed-off-by: Philippe
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
This changes the DEFINE_VIRT_MACHINE macro to use the common
helpers for constructing versioned symbol names and strings,
bringing greater consistency across targets.
Signed-off-by: Daniel P. Berrangé
---
hw/arm/virt.c | 28
On Thu, 2 May 2024 at 08:42, Philippe Mathieu-Daudé wrote:
>
> Check the function index is not negative and use an unsigned
> variable to avoid the following warning with GCC 13.2.0:
>
> [666/5358] Compiling C object libcommon.fa.p/hw_input_tsc2005.c.o
> hw/input/tsc2005.c: In function
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
The automatic deprecation mechanism introduced in the preceeding patches
will mark every i440fx machine upto and including 2.12 as deprecated. As
such we can revert the manually added deprecation which was a subset:
commit
On Tue, Apr 16, 2024 at 08:59:17PM +0200, Philippe Mathieu-Daudé wrote:
> Similarly to the commit c7437f0ddb "docs/about: Mark the
> old pc-i440fx-2.0 - 2.3 machine types as deprecated",
> deprecate the 2.4 to 2.12 machines.
>
> Suggested-by: Thomas Huth
> Signed-off-by: Philippe Mathieu-Daudé
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
The automatic deprecation mechanism introduced in the preceeding patches
will mark every spapr machine upto and including 2.12 as deprecated. As
such we can revert the manually added deprecation which was a subset:
commit
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
This calls the MACHINE_VER_DELETION() macro in the machine type
registration method, so that when a versioned machine type reaches
the end of its life, it is no longer registered with QOM and thus
cannot be used.
The actual definition of the
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
This changes the DEFINE_VIRT_MACHINE macro to use the common
helpers for constructing versioned symbol names and strings,
bringing greater consistency across targets.
A DEFINE_VIRT_MACHINE_AS_LATEST helper is added so that it
is not required to
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
This changes the DEFINE_SPAPR_MACHINE macro to use the common
helpers for constructing versioned symbol names and strings,
bringing greater consistency across targets.
The added benefit is that it avoids the need to repeat the
version number twice
Fabiano Rosas writes:
> The block migration is considered obsolete and has been deprecated in
> 8.2. Remove the migrate command option that enables it. This only
> affects the QMP and HMP commands, the feature can still be accessed by
> setting the migration 'block' capability. The whole feature
On Thu, 2 May 2024 at 11:56, Marcin Juszkiewicz
wrote:
>
> W dniu 2.05.2024 o 12:37, Peter Maydell pisze:
> >> * what are the constraints on the Aff* fields (eg that kernel
> >> commit suggests Aff0 shouldn't be > 15)?
>
> > This one is apparently related to GICv3 -- if the GIC doesn't
> >
Hi Daniel,
Daniel Henrique Barboza 於 2024年3月8日 週五 上午12:04寫道：
>
> From: Tomasz Jeznach
>
> The RISC-V IOMMU specification is now ratified as-per the RISC-V
> international process. The latest frozen specifcation can be found
> at:
>
>
Avihai Horon writes:
> Add a new QAPI event for VFIO device migration state change. This event
> will be emitted when a VFIO device changes its migration state, for
> example, during migration or when stopping/starting the guest.
>
> This event can be used by management applications to get
On Thu, May 02, 2024 at 01:05:20PM +0200, Thomas Huth wrote:
> On 01/05/2024 20.27, Daniel P. Berrangé wrote:
> > The new deprecation and deletion policy for versioned machine types is
> > being introduced in QEMU 9.1.0.
> >
> > Under the new policy a number of old machine types (any prior to
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
This changes the DEFINE_CCW_MACHINE macro to use the common
helpers for constructing versioned symbol names and strings,
bringing greater consistency across targets.
The added benefit is that it avoids the need to repeat the
version number twice in
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
This calls the MACHINE_VER_DEPRECATION() macro in the definition of
all machine type classes which support versioning. This ensures
that they will automatically get deprecation info set when they
reach the appropriate point in their lifecycle.
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
The new deprecation and deletion policy for versioned machine types is
being introduced in QEMU 9.1.0.
Under the new policy a number of old machine types (any prior to 2.12)
would be liable for immediate deletion which would be a violation of our
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
Versioned machines live for a long time to provide back compat for
incoming migration and restore of saved images. To guide users away from
usage of old machines, however, we want to deprecate any older than 3
years (equiv of 9 releases), and delete
W dniu 2.05.2024 o 12:37, Peter Maydell pisze:
* what are the constraints on the Aff* fields (eg that kernel
commit suggests Aff0 shouldn't be > 15)?
This one is apparently related to GICv3 -- if the GIC doesn't
implement RangeSelector support in ICC_SGI0R_EL1 and other
places
On Thu, 2 May 2024 at 10:11, Peter Maydell wrote:
> On the QEMU side I guess we should strive to set up the MPIDR
> fields to something plausibly matching the topology as defined
> by the user on the command line. Unanswered questions:
>
> * I guess we need some kind of back-compat thing where
As the links [1][2] below stated, QEMU development community is currently
having some difficulties in maintaining the RDMA migration subsystem due
to the lack of resources (maintainers, test cases, test environment etc.)
and considering to deprecate it.
According to our user experience in the
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
The various targets which define versioned machine types have
a bunch of obfuscated macro code for defining unique function
and variable names using string concatenation.
This addes a couple of helpers to improve the clarity of such
code macro.
On 4/30/24 11:58, Duan, Zhenzhong wrote:
-Original Message-
From: Cédric Le Goater
Subject: Re: [PATCH v3 06/19] range: Introduce range_get_last_bit()
On 4/29/24 08:50, Zhenzhong Duan wrote:
This helper get the highest 1 bit position of the upper bound.
If the range is empty or
On 30/4/24 23:42, Ilya Leoshkevich wrote:
On Tue, Apr 30, 2024 at 09:00:17PM +0200, Philippe Mathieu-Daudé wrote:
On 30/4/24 20:45, Philippe Mathieu-Daudé wrote:
Hi Ilya,
On 30/4/24 19:55, Ilya Leoshkevich wrote:
On Tue, Apr 30, 2024 at 02:27:54PM +0200, Philippe Mathieu-Daudé wrote:
On 01/05/2024 13:28, Avihai Horon wrote:
>
> On 01/05/2024 14:50, Joao Martins wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> On 30/04/2024 06:16, Avihai Horon wrote:
>>> Emit VFIO device migration state change QAPI event when a VFIO device
>>> changes its migration
On Thu, May 02, 2024 at 11:19:28AM +0200, Philippe Mathieu-Daudé wrote:
> On 2/5/24 11:10, Daniel P. Berrangé wrote:
> > On Thu, May 02, 2024 at 11:05:47AM +0200, Philippe Mathieu-Daudé wrote:
> > > On-demand paging support was added in libibverbs v1.2.0 in
> > > commit
We only use Libtasn1 in unit tests. As noted in commit d47b83b118
("tests: add migration tests of TLS with x509 credentials"), having
GnuTLS without Libtasn1 is a valid configuration, so do not require
Libtasn1, to avoid:
Dependency gnutls found: YES 3.7.1 (cached)
Run-time dependency
crypto-tls-psk-helpers.c doesn't access the declarations
of "crypto-tls-x509-helpers.h", remove the include line
to avoid when building with GNUTLS but without Libtasn1:
In file included from tests/unit/crypto-tls-psk-helpers.c:23:
tests/unit/crypto-tls-x509-helpers.h:26:10: fatal error:
pkix_asn1_tab[] is only accessed by crypto-tls-x509-helpers.c,
rename pkix_asn1_tab.c as pkix_asn1_tab.c.inc and include it once.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/crypto-tls-x509-helpers.h| 3 ---
tests/unit/crypto-tls-x509-helpers.c| 6 +-
Since v1:
- split in 3
- remove "crypto-tls-x509-helpers.h" (danpb)
- include pkix_asn1_tab.c.inc
Philippe Mathieu-Daudé (3):
crypto: Remove 'crypto-tls-x509-helpers.h' from
crypto-tls-psk-helpers.c
crypto: Restrict pkix_asn1_tab[] to crypto-tls-x509-helpers.c
crypto: Allow building
On Thu, May 02, 2024 at 11:21:31AM +0200, Philippe Mathieu-Daudé wrote:
> On 2/5/24 11:19, Philippe Mathieu-Daudé wrote:
> > On 2/5/24 11:10, Daniel P. Berrangé wrote:
> > > On Thu, May 02, 2024 at 11:05:47AM +0200, Philippe Mathieu-Daudé wrote:
> > > > On-demand paging support was added in
On Thu, May 02, 2024 at 11:47:40AM +0200, Thomas Huth wrote:
> On 01/05/2024 20.27, Daniel P. Berrangé wrote:
> > This extends the deprecation policy to indicate that versioned machine
> > types will be marked deprecated after 3 years, and then subject to
> > removal after a further 3 years has
On 01/05/2024 20.27, Daniel P. Berrangé wrote:
This extends the deprecation policy to indicate that versioned machine
types will be marked deprecated after 3 years, and then subject to
removal after a further 3 years has passed.
Signed-off-by: Daniel P. Berrangé
---
docs/about/deprecated.rst
On 2/5/24 11:26, Philippe Mathieu-Daudé wrote:
On 2/5/24 10:26, Daniel P. Berrangé wrote:
On Thu, May 02, 2024 at 10:22:02AM +0200, Philippe Mathieu-Daudé wrote:
On 2/5/24 10:11, Philippe Mathieu-Daudé wrote:
We only use Libtasn1 in unit tests. As noted in commit d47b83b118
("tests: add
On 4/29/24 04:21, Frank Chang wrote:
Daniel Henrique Barboza mailto:dbarb...@ventanamicro.com>> 於 2024年3月8日 週五 上午12:04寫道：
>
> From: Tomasz Jeznach mailto:tjezn...@rivosinc.com>>
>
> The RISC-V IOMMU can be modelled as a PCIe device following the
> guidelines of the RISC-V IOMMU spec,
On 2/5/24 10:26, Daniel P. Berrangé wrote:
On Thu, May 02, 2024 at 10:22:02AM +0200, Philippe Mathieu-Daudé wrote:
On 2/5/24 10:11, Philippe Mathieu-Daudé wrote:
We only use Libtasn1 in unit tests. As noted in commit d47b83b118
("tests: add migration tests of TLS with x509 credentials"),
On 2/5/24 11:19, Philippe Mathieu-Daudé wrote:
On 2/5/24 11:10, Daniel P. Berrangé wrote:
On Thu, May 02, 2024 at 11:05:47AM +0200, Philippe Mathieu-Daudé wrote:
On-demand paging support was added in libibverbs v1.2.0 in
commit https://github.com/linux-rdma/rdma-core/commit/e500adc7b1
That
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