On Mon, May 27, 2024 at 9:06 PM Jin Cao wrote:
>
> Supplementary info: VM is paused after "migrate" command. After being
> resumed with "cont", snapshot_delete_blkdev_internal works again, which
> is confusing, as disk snapshot generally recommend I/O is paused, and a
> frozen VM satisfy this
Peter Xu writes:
> On Mon, May 27, 2024 at 08:59:00PM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > On Thu, May 23, 2024 at 05:19:22PM -0300, Fabiano Rosas wrote:
>> >> We have two new migration tests that check cross version
>> >> compatibility. One uses the
On Tue, May 28, 2024 at 11:10:03AM -0400, Steven Sistare via wrote:
> On 5/27/2024 2:20 PM, Peter Xu wrote:
> > On Mon, Apr 29, 2024 at 08:55:16AM -0700, Steve Sistare wrote:
> > > Define a type for the 256 byte id string to guarantee the same length is
> > > used and enforced everywhere.
> > >
>
On 5/28/24 08:37, Peter Maydell wrote:
On Sat, 25 May 2024 at 00:32, Richard Henderson
wrote:
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 16 +
target/arm/tcg/translate-a64.h | 6 ++
target/arm/tcg/gengvec64.c | 106 +++
On 28/05/2024 17.56, Michael S. Tsirkin wrote:
On Mon, May 27, 2024 at 08:02:43AM +0200, Thomas Huth wrote:
We are reusing the same temporary directory for installing the headers
of all targets, so there could be stale files here when switching from
one target to another. Make sure to delete
On 5/28/24 06:18, Peter Maydell wrote:
On Sat, 25 May 2024 at 00:25, Richard Henderson
wrote:
For all, rm == 15 is invalid.
Prior to v8, thumb with rm == 13 is invalid.
For PLDW, rn == 15 is invalid.
Fixes a RISU mismatch for the HINTSPACE pattern in t32.risu
compared to a neoverse-n1
On 5/28/24 09:15, Peter Maydell wrote:
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
These are the only instructions in the 3 source scalar class.
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 10 ++
target/arm/tcg/translate-a64.c | 233
On 5/28/24 08:53, Peter Maydell wrote:
On Sat, 25 May 2024 at 00:28, Richard Henderson
wrote:
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 8
target/arm/tcg/translate.h | 4
target/arm/tcg/neon-dp.decode | 10 ++---
On 5/28/24 08:51, Peter Maydell wrote:
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 10 +
target/arm/tcg/translate.h | 4
target/arm/tcg/neon-dp.decode | 10 ++---
On 5/28/24 09:10, Peter Maydell wrote:
+void HELPER(neon_sqdmulh_idx_s)(void *vd, void *vn, void *vm,
+void *vq, uint32_t desc)
+{
+intptr_t i, j, opr_sz = simd_oprsz(desc);
+int idx = simd_data(desc);
+int32_t *d = vd, *n = vn, *m = (int32_t *)vm +
On 5/28/24 09:15, Michal Privoznik wrote:
+sz = ROUND_UP(sz, qemu_ram_pagesize(backend->mr.ram_block));
Second argument is evaluated twice.
You probably don't want that to be a function call.
r~
Pierrick Bouvier writes:
> From: Alex Bennée
>
> We are about to remove direct calls to individual accelerators for
> this information and will need a central point for plugins to hook
> into time changes.
>
> From: Alex Bennée
> Signed-off-by: Alex Bennée
> Reviewed-by: Philippe
On 5/27/24 23:12, Jeuk Kim wrote:
From: Minwoo Im
This patch adds support for MCQ defined in UFSHCI 4.0. This patch
utilized the legacy I/O codes as much as possible to support MCQ.
MCQ operation & runtime register is placed at 0x1000 offset of UFSHCI
register statically with no spare space
Am 28.05.24 um 18:15 schrieb Michal Privoznik:
The unspoken premise of qemu_madvise() is that errno is set on
error. And it is mostly the case except for posix_madvise() which
is documented to return either zero (on success) or a positive
error number. This means, we must set errno ourselves.
Am 28.05.24 um 18:15 schrieb Michal Privoznik:
./build/qemu-system-x86_64 \ -m size=8389632k,slots=16,maxmem=2560k \
-object
'{"qom-type":"memory-backend-file","id":"ram-node0","mem-path":"hugepages2M","prealloc":true,"size":8590983168,"host-nodes":[0],"policy":"bind"}' \ -numa
On Tue, May 28, 2024 at 11:10:27AM -0400, Steven Sistare wrote:
> On 5/27/2024 1:45 PM, Peter Xu wrote:
> > On Tue, May 21, 2024 at 07:46:12AM -0400, Steven Sistare wrote:
> > > I understand, thanks. If I can help with any of your todo list,
> > > just ask - steve
> >
> > Thanks for offering the
Gustavo Romero writes:
> This commit implements the stubs to handle the qIsAddressTagged,
> qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag'
> subcommands to work with QEMU gdbstub on aarch64 user mode. It also
> implements the get/set function for the special GDB MTE register
>
Gustavo Romero writes:
> Currently, it's not possible to have stubs specific to a given target,
> even though there are GDB features which are target-specific, like, for
> instance, memory tagging.
>
> This commit introduces set_query_supported_arch,
> set_gdb_gen_query_table_arch, and
On Tue, 28 May 2024 at 16:37, Cord Amfmgm wrote:
>
>
>
> On Tue, May 28, 2024 at 9:03 AM Peter Maydell
> wrote:
>>
>> On Mon, 20 May 2024 at 23:24, Cord Amfmgm wrote:
>> > On Mon, May 20, 2024 at 12:05 PM Peter Maydell
>> > wrote:
>> >> For the "zero length buffer" case, do you have a more
On Sat, 25 May 2024 at 00:22, Richard Henderson
wrote:
>
> In the process, convert more code to gvec as well -- I will need
> the gvec code for implementing SME2. I guess this is about 1/3
> of the job done, but there's no reason to wait until the patch
> set is completely unwieldy.
>
> Changes
On Sat, 25 May 2024 at 00:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
The unspoken premise of qemu_madvise() is that errno is set on
error. And it is mostly the case except for posix_madvise() which
is documented to return either zero (on success) or a positive
error number. This means, we must set errno ourselves. And while
at it, make the function return a
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> These are the only instructions in the 3 source scalar class.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 10 ++
> target/arm/tcg/translate-a64.c | 233 -
> 2 files
This is a resurrection of the following old patch of mine:
https://lists.gnu.org/archive/html/qemu-devel/2023-11/msg05536.html
You could say it's a v2 and here's what changed since v1:
- qemu_madvise() is fixed in case posix_madvise() is used
- Warnings are reported in case of qemu_madvise()
If user sets .merge or .dump attributes qemu_madvise() is called
with corresponding advice. But it is never checked for failure
which may mislead users into thinking the attribute is set
correctly.I believe at this point it's too late to report errors
in that case but let's report a warning at
Simple reproducer:
qemu.git $ ./build/qemu-system-x86_64 \
-m size=8389632k,slots=16,maxmem=2560k \
-object
'{"qom-type":"memory-backend-file","id":"ram-node0","mem-path":"/hugepages2M/","prealloc":true,"size":8590983168,"host-nodes":[0],"policy":"bind"}'
\
-numa
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> These are the last instructions within disas_simd_three_reg_same
> and disas_simd_scalar_three_reg_same, so remove them.
>
> Signed-off-by: Richard Henderson
> diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
>
Am 25.04.2024 um 09:04 hat Prasad Pandit geschrieben:
> From: Prasad Pandit
>
> Libaio defines IO_CMD_FDSYNC command to sync all outstanding
> asynchronous I/O operations, by flushing out file data to the
> disk storage. Enable linux-aio to submit such aio request.
>
> When using aio=native
On Sat, 25 May 2024 at 00:30, Richard Henderson
wrote:
>
> We already have a gvec helper for the operations, but we aren't
> using it on the aa32 neon side. Create a unified expander for
> use by both aa32 and aa64 translators.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 8
> target/arm/tcg/translate-a64.c | 77 ++
> 2 files changed, 31 insertions(+), 54 deletions(-)
>
Reviewed-by: Peter
Gustavo Romero writes:
> This patchset adds the stubs necessary to support GDB memory tagging
> commands on QEMU aarch64 user mode.
On application I'm getting the following failure on configure which
makes me think something is missing:
Program scripts/undefsym.py found: YES
On Sat, 25 May 2024 at 00:26, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 5
> target/arm/tcg/translate-a64.c | 51 +-
> 2 files changed, 25 insertions(+), 31 deletions(-)
Reviewed-by: Peter
Am 29.04.2024 um 16:19 hat Fiona Ebner geschrieben:
> rather than the uint32_t for which the maximum is slightly more than 4
> seconds and larger values would overflow. The QAPI interface allows
> specifying the number of seconds, so only values 0 to 4 are safe right
> now, other values lead to a
On Tue, May 28, 2024 at 09:35:22AM -0400, Peter Xu wrote:
> On Tue, May 28, 2024 at 02:27:57PM +1000, Nicholas Piggin wrote:
> > There is no need to use /dev/shm for file-backed memory devices, and
> > it is too small to be usable in gitlab CI. Switch to using a regular
> > file in /tmp/ which
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4
> target/arm/tcg/translate-a64.c | 22 ++
> 2 files changed, 10 insertions(+), 16 deletions(-)
Reviewed-by: Peter Maydell
thanks
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4
> target/arm/tcg/translate-a64.c | 22 ++
> 2 files changed, 10 insertions(+), 16 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
On Sat, 25 May 2024 at 00:31, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 2 ++
> target/arm/tcg/translate-a64.c | 11 +++
> 2 files changed, 5 insertions(+), 8 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h | 6 --
> target/arm/tcg/translate.h | 4 +
> target/arm/tcg/gengvec.c| 144
> target/arm/tcg/neon_helper.c|
On Sat, 25 May 2024 at 00:26, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h | 6 --
> target/arm/tcg/translate.h | 5 ++
> target/arm/tcg/gengvec.c| 144
> target/arm/tcg/neon_helper.c|
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 2 ++
> target/arm/tcg/translate-a64.c | 11 +++
> 2 files changed, 5 insertions(+), 8 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/gengvec.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:30, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/gengvec.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:26, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 12 +++
> target/arm/tcg/translate-a64.c | 132 -
> 2 files changed, 60 insertions(+), 84 deletions(-)
Reviewed-by: Peter
Am 07.05.2024 um 20:05 hat Stefan Hajnoczi geschrieben:
> cvtnum() parses positive int64_t values and returns a negative errno on
> failure. Print errors and return early when cvtnum() fails.
>
> While we're at it, also reject nr_zones values greater or equal to 2^32
> since they cannot be
On Mon, May 27, 2024 at 08:02:43AM +0200, Thomas Huth wrote:
> We are reusing the same temporary directory for installing the headers
> of all targets, so there could be stale files here when switching from
> one target to another. Make sure to delete the folder before installing
> a new set of
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 6 ++
> target/arm/tcg/translate-a64.c | 34 +++---
> 2 files changed, 17 insertions(+), 23 deletions(-)
> @@ -10958,6 +10956,11
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4 +++
> target/arm/tcg/translate-a64.c | 48 --
> 2 files changed, 26 insertions(+), 26 deletions(-)
Reviewed-by: Peter Maydell
On Tue, May 28, 2024 at 09:06:04AM +, Gonglei (Arei) wrote:
> Hi Peter,
>
> > -Original Message-
> > From: Peter Xu [mailto:pet...@redhat.com]
> > Sent: Wednesday, May 22, 2024 6:15 AM
> > To: Yu Zhang
> > Cc: Michael Galaxy ; Jinpu Wang
> > ; Elmar Gerdes ;
> > zhengchuan ; Gonglei
Am 06.05.2024 um 21:06 hat Stefan Hajnoczi geschrieben:
> This series fixes RHEL-34618 "qemu crash on Assertion `luringcb->co->ctx ==
> s->aio_context' failed when do block_resize on hotplug disk with
> aio=io_uring":
> https://issues.redhat.com/browse/RHEL-34618
>
> Kevin identified commit
On Sat, 25 May 2024 at 00:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4 ++
> target/arm/tcg/translate-a64.c | 74 ++
> 2 files changed, 53 insertions(+), 25 deletions(-)
>
Reviewed-by: Peter Maydell
On Sat, 25 May 2024 at 00:28, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h | 8
> target/arm/tcg/translate.h | 4
> target/arm/tcg/neon-dp.decode | 10 ++---
> target/arm/tcg/gengvec.c| 24
On Mon, May 27, 2024 at 07:52:28PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Thu, May 23, 2024 at 05:19:20PM -0300, Fabiano Rosas wrote:
> >> We have the vmstate-static-checker script that takes the output of:
> >> '$QEMU -M $machine -dump-vmstate' for two different QEMU versions
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4
> target/arm/tcg/translate-a64.c | 22 +++---
> 2 files changed, 11 insertions(+), 15 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h | 10 +
> target/arm/tcg/translate.h | 4
> target/arm/tcg/neon-dp.decode | 10 ++---
> target/arm/tcg/gengvec.c| 22
On 5/27/2024 2:16 PM, Peter Xu wrote:
On Mon, Apr 29, 2024 at 08:55:14AM -0700, Steve Sistare wrote:
Provide the VMStateDescription precreate field to mark objects that must
be loaded on the incoming side before devices have been created, because
they provide properties that will be needed at
On Mon, May 27, 2024 at 08:59:00PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Thu, May 23, 2024 at 05:19:22PM -0300, Fabiano Rosas wrote:
> >> We have two new migration tests that check cross version
> >> compatibility. One uses the vmstate-static-checker.py script to
> >> compare
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 7 ++
> target/arm/tcg/translate-a64.c | 40 +-
> 2 files changed, 32 insertions(+), 15 deletions(-)
Reviewed-by: Peter
/alistair23/qemu.git tags/pull-riscv-to-apply-20240528
for you to fetch changes up to 1806da76cb81088ea026ca3441551782b850e393:
target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR
(2024-05-28 12:20:27 +1000
On Sat, 25 May 2024 at 00:26, Richard Henderson
wrote:
>
> These are faux 2-operand instructions, reading from rd.
> Sort them next to the other three-operand same insns for clarity.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 8 +
>
On Sat, 25 May 2024 at 00:28, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 11
> target/arm/tcg/translate-a64.c | 100 +++--
> 2 files changed, 68 insertions(+), 43 deletions(-)
>
Reviewed-by: Peter
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> This eliminates the last uses of these neon helpers.
> Incorporate the MO_64 expanders as an option to the vector expander.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
Am 16.05.2024 um 18:22 hat Daniel P. Berrangé geschrieben:
> This patch kicks the hornet's nest of AI / LLM code generators.
>
> With the increasing interest in code generators in recent times,
> it is inevitable that QEMU contributions will include AI generated
> code. Thus far we have remained
Am 16.05.2024 um 18:22 hat Daniel P. Berrangé geschrieben:
> Files contributed to QEMU are generally expected to be provided in the
> preferred format for manipulation. IOW, we generally don't expect to
> have generated / compiled code included in the tree, rather, we expect
> to run the code
On Sat, 25 May 2024 at 00:23, Richard Henderson
wrote:
>
> This eliminates the last uses of these neon helpers.
> Incorporate the MO_64 expanders as an option to the vector expander.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h| 8 --
>
On Sat, 25 May 2024 at 00:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h| 16 +
> target/arm/tcg/translate-a64.h | 6 ++
> target/arm/tcg/gengvec64.c | 106 +++
> target/arm/tcg/translate-a64.c |
On Tue, May 28, 2024 at 9:03 AM Peter Maydell
wrote:
> On Mon, 20 May 2024 at 23:24, Cord Amfmgm wrote:
> > On Mon, May 20, 2024 at 12:05 PM Peter Maydell
> wrote:
> >> For the "zero length buffer" case, do you have a more detailed
> >> pointer to the bit of the spec that says that "cbp = be +
On Mon, May 27, 2024 at 07:59:50PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Thu, May 23, 2024 at 05:19:21PM -0300, Fabiano Rosas wrote:
> >> The current migration-tests are almost entirely focused on catching
> >> bugs on the migration code itself, not on the device migration
> >>
On Tue, May 28, 2024 at 01:36:38PM +, Liu, Yuan1 wrote:
> > -Original Message-
> > From: Peter Xu
> > Sent: Tuesday, May 28, 2024 4:51 AM
> > To: Liu, Yuan1
> > Cc: faro...@suse.de; qemu-devel@nongnu.org; Zou, Nanhai
> >
> > Subject: Re: [PATCH v6 2/7] migration/multifd: put IOV
On Mon, May 27, 2024 at 01:27:10PM GMT, Halil Pasic wrote:
On Thu, 16 May 2024 10:39:42 +0200
Stefano Garzarella wrote:
[..]
>---
>
>This is a minimal fix, that follows the current patterns in the
>codebase, and not necessarily the best one.
Yeah, I did something similar with commit
On Sat, 25 May 2024 at 00:28, Richard Henderson
wrote:
>
> No need for a full comparison; xor produces non-zero bits
> for QC just fine.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On 5/27/2024 1:45 PM, Peter Xu wrote:
On Tue, May 21, 2024 at 07:46:12AM -0400, Steven Sistare wrote:
I understand, thanks. If I can help with any of your todo list,
just ask - steve
Thanks for offering the help, Steve. Started looking at this today, then I
found that I miss something
On 5/27/2024 2:20 PM, Peter Xu wrote:
On Mon, Apr 29, 2024 at 08:55:16AM -0700, Steve Sistare wrote:
Define a type for the 256 byte id string to guarantee the same length is
used and enforced everywhere.
Signed-off-by: Steve Sistare
---
include/exec/ramblock.h | 3 ++-
On 5/27/2024 2:31 PM, Peter Xu wrote:
On Mon, Apr 29, 2024 at 08:55:17AM -0700, Steve Sistare wrote:
Define VMSTATE_VOID_PTR so the value of a pointer (but not its target)
can be saved in the migration stream. This will be needed for CPR.
Signed-off-by: Steve Sistare
This is really tricky.
Am 30.04.2024 um 19:02 hat Denis V. Lunev via geschrieben:
> This parameter is always passed as 'false' from the caller.
>
> Signed-off-by: Denis V. Lunev
> CC: Andrey Zhadchenko
> CC: Kevin Wolf
> CC: Hanna Reitz
Let me add a "Since commit 72373e40fbc" to the commit message.
Thanks,
Am 28.05.2024 um 14:49 hat Vladimir Sementsov-Ogievskiy geschrieben:
> On 30.04.24 12:13, Vladimir Sementsov-Ogievskiy wrote:
> > We want to have similar QMP objects in different tests. Reworking these
> > objects to make common parts by calling some helper functions doesn't
> > seem good. It's a
On 23/5/24 21:41, Inès Varhol wrote:
Expose the clock period via the QOM 'qtest-clock-period' property so it
can be used in QTests. This property is only accessible in QTests (not
via HMP).
Signed-off-by: Philippe Mathieu-Daudé
Addressing Luc and Peter comments, you can replace that line by:
Calling qemu_plugin_vcpu_init__async() on the vCPU thread
is a detail of plugins, not relevant to TCG vCPU management.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/cpu-exec-common.c | 11 ++-
plugins/core.c | 8 +++-
2 files changed, 9 insertions(+), 10
system/runstate.c never required "qemu/plugin.h".
Signed-off-by: Philippe Mathieu-Daudé
---
system/runstate.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/system/runstate.c b/system/runstate.c
index cb4905a40f..ec32e270cb 100644
--- a/system/runstate.c
+++ b/system/runstate.c
@@ -45,7
Use the AccelClass::cpu_common_[un]realize_assigned() handlers
to [un]register the TCG plugin handlers, allowing to remove
accel specific code from the common hw/core/cpu-common.c file.
Remove the now unnecessary qemu_plugin_vcpu_init_hook() and
qemu_plugin_vcpu_exit_hook() stub.
Signed-off-by:
Introduce handlers called while the vCPU has an assigned
index and is still in the global %cpus_queue.
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu/accel.h | 20
accel/accel-target.c | 23 +++
cpu-target.c | 6 ++
3 files changed,
In preparation of introducing [un]realize handlers for
when vCPUs are assigned, rename current handlers using
the '_unassigned' suffix.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal-common.h | 4 ++--
include/qemu/accel.h| 17 +++--
accel/accel-target.c
'internal-target.h' is meant for target-specific declarations,
while 'internal-common.h' for common ones. Move common declarations
to it.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal-common.h | 15 +++
accel/tcg/internal-target.h | 14 --
Hi,
TL;DR; this series remove TCG plugin code from generic accel code.
Since the introduction of the scoreboard in plugins, the INIT
hook use the vCPU index, which is only available somewhere
during the vCPU REALIZE() step (see below for call tree).
In order to clarify that, we split
On Thu, 23 May 2024 at 20:44, Inès Varhol wrote:
>
> Expose the clock period via the QOM 'qtest-clock-period' property so it
> can be used in QTests. This property is only accessible in QTests (not
> via HMP).
>
> Signed-off-by: Philippe Mathieu-Daudé
> Signed-off-by: Inès Varhol
> ---
>
On Mon, 2024-05-27 at 14:13 +0200, Thomas Huth wrote:
> It's not used anywhere, so let's simply remove it.
>
> Signed-off-by: Thomas Huth
> ---
> include/hw/s390x/s390_flic.h | 3 ---
> 1 file changed, 3 deletions(-)
Reviewed-by: Eric Farman
On Thu, 23 May 2024 at 20:44, Inès Varhol wrote:
>
> For USART, GPIO and SYSCFG devices, check that clock frequency before
> and after enabling the peripheral clock in RCC is correct.
>
> Signed-off-by: Inès Varhol
> ---
> tests/qtest/stm32l4x5.h | 43 +
>
On Thu, 23 May 2024 at 20:44, Inès Varhol wrote:
>
> This commit creates a clock in STM32L4x5 SYSCFG and wires it up to the
> corresponding clock from STM32L4x5 RCC.
>
> Signed-off-by: Inès Varhol
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Thu, 23 May 2024 at 20:44, Inès Varhol wrote:
>
> `vmstate_stm32l4x5_usart_base` namely uses `VMSTATE_CLOCK` so
> version needs to be 2.
>
> Signed-off-by: Inès Varhol
> ---
> hw/char/stm32l4x5_usart.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
On Wed, 22 May 2024 at 21:40, Inès Varhol wrote:
>
> The previous implementation for EXTI interrupts only handled
> "configurable" interrupts, like those originating from STM32L4x5 SYSCFG
> (the only device currently connected to the EXTI up until now).
>
> In order to connect STM32L4x5 USART to
On 4/30/24 19:05, Denis V. Lunev wrote:
Preallocate filter allows to implement really interesting setups.
Assume that we have
* shared block device, f.e. iSCSI LUN, implemented with some HW device
* clustered LVM on top of it
* QCOW2 image stored inside LVM volume
This allows very cheap
On 4/30/24 19:02, Denis V. Lunev wrote:
This parameter is always passed as 'false' from the caller.
Signed-off-by: Denis V. Lunev
CC: Andrey Zhadchenko
CC: Kevin Wolf
CC: Hanna Reitz
---
block/file-posix.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git
Reviewed-by: Glenn Miles
Thanks,
Glenn
On Tue, 2024-05-28 at 16:20 +1000, Nicholas Piggin wrote:
> From: Glenn Miles
>
> The LPC HC irq status register bits are set when an LPC IRQSER input
> is
> asserted. These irq status bits drive the PSI irq to the CPU
> interrupt
> controller. The LPC
On Tue, May 28, 2024 at 03:53:55PM +0800, Zhao Liu wrote:
> Hi Stefan,
>
> [snip]
>
> > > diff --git a/scripts/simpletrace-rust/.rustfmt.toml
> > > b/scripts/simpletrace-rust/.rustfmt.toml
> > > new file mode 100644
> > > index ..97a97c24ebfb
> > > --- /dev/null
> > > +++
From: Richard Henderson
Reviewed-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-8-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/translate.h |5 +
target/arm/tcg/gengvec.c | 1612
From: Zenghui Yu
We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so
we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
wrong key.
Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux
guest can properly detect FEAT_SSBS2 on my
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-31-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h | 7 -
target/arm/tcg/translate-neon.c | 55
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-10-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 21 +++--
target/arm/tcg/translate-a64.c | 86
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