Now that we store FPSR and FPCR separately, the FPSR_MASK and
FPCR_MASK macros are slightly confusingly named and the comment
describing them is out of date. Rename them to FPSCR_FPSR_MASK and
FPSCR_FPCR_MASK, document that they are the mask of which FPSCR bits
are architecturally mapped to which
The QC, N, Z, C, V bits live in the FPSR, not the FPCR. Rename the
macros that define these bits accordingly.
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 17 ++---
target/arm/tcg/mve_helper.c | 8
target/arm/tcg/translate-m-nocp.c | 16
In AArch32, the floating point control and status bits are all in a
single register, FPSCR. In AArch64, these were split into separate
FPCR and FPSR registers, but the bit layouts remained the same, with
no overlaps, so that you could construct an FPSCR value by ORing FPCR
and FPSR, or
In AArch32, the floating point control and status bits are all in a
single register, FPSCR. In AArch64, these were split into separate
FPCR and FPSR registers, but the bit layouts remained the same, with
no overlaps, so that you could construct an FPSCR value by ORing FPCR
and FPSR, or
Now that we have refactored the set/get functions so that the FPSCR
format is no longer the authoritative one, we can keep FPSR and FPCR
in separate CPU state fields.
As well as the get and set functions, we also have a scattering of
places in the code which directly access
In order to allow FPCR bits that aren't in the FPSCR (like the new
bits that are defined for FEAT_AFP), we need to make sure that writes
to the FPSCR only write to the bits of FPCR that are architecturally
mapped, and not the others.
Implement this with a new function vfp_set_fpcr_masked() which
The M-profile FPSCR LTPSIZE is bits [18:16]; this is the same
field as A-profile FPSCR Len, not Stride. Correct the comment
in vfp_get_fpscr().
We also implemented M-profile FPSCR.QC, but forgot to delete
a TODO comment from vfp_set_fpscr(); remove it now.
Signed-off-by: Peter Maydell
---
To support FPSR and FPCR bits that don't exist in the AArch32 FPSCR
view of floating point control and status (such as the FEAT_AFP ones),
we need to make sure those bits can be migrated. This commit allows
that, whilst maintaining backwards and forwards migration compatibility
for CPUs where
We already have a load_cpu_field_low32() to load the low half of a
64-bit CPU struct field to a TCGv_i32; however we haven't yet needed
the store equivalent. We'll want that in the next patch, so
implement it.
Signed-off-by: Peter Maydell
---
target/arm/tcg/translate-a32.h | 7 +++
1 file
John Snow writes:
> This is a directive that creates a syntactic sugar for creating
> "Example" boxes very similar to the ones already used in the bitmaps.rst
> document, please see e.g.
> https://www.qemu.org/docs/master/interop/bitmaps.html#creation-block-dirty-bitmap-add
>
> In its simplest
Il ven 28 giu 2024, 10:32 Xiaoyao Li ha scritto:
> On 6/27/2024 10:06 PM, Paolo Bonzini wrote:
> > The recent addition of the SUCCOR bit to kvm_arch_get_supported_cpuid()
> > causes the bit to be visible when "-cpu host" VMs are started on Intel
> > processors.
> >
> > While this should in
John Snow writes:
> Factor out the compatibility parser helper so it can be shared by other
> directives.
Suggest "Factor out the compatibility parser helper into a base class,
so it can be shared by other directives."
>
> Signed-off-by: John Snow
> ---
> docs/sphinx/qapidoc.py | 64
From: Gustavo Romero
Allow passing the current CPU context to command handlers via user_ctx
when the handler requires it.
Signed-off-by: Gustavo Romero
Signed-off-by: Alex Bennée
Message-Id: <20240628050850.536447-9-gustavo.rom...@linaro.org>
---
include/gdbstub/commands.h | 3 +++
From: Gustavo Romero
If page in 'ptr_access' is inaccessible and probe is 'true'
allocation_tag_mem_probe should not throw an exception, but currently it
does, so fix it.
Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-Id:
From: Gustavo Romero
This commit implements the stubs to handle the qIsAddressTagged,
qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag'
subcommands to work with QEMU gdbstub on aarch64 user mode. It also
implements the get/set functions for the special GDB MTE register
'tag_ctl',
From: David Woodhouse
The vmclock device addresses the problem of live migration with precision
clocks. The tolerances of a hardware counter (e.g. TSC) are typically
around ±50PPM. We use NTP/PTP/PPS to discipline that counter against an
external source of 'real' time, and track the precise
From: Gustavo Romero
cmd_startswith is a boolean so use 'true' to set it instead of 1.
Signed-off-by: Gustavo Romero
Message-Id: <20240628050850.536447-10-gustavo.rom...@linaro.org>
---
gdbstub/gdbstub.c | 80 +++
1 file changed, 40 insertions(+),
From: Gustavo Romero
Make gdb_hextomem non-internal so it's not confined to use only in
gdbstub.c.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
Message-Id: <20240628050850.536447-8-gustavo.rom...@linaro.org>
---
gdbstub/internals.h| 1 -
include/gdbstub/commands.h | 6
From: Gustavo Romero
Add tests to exercise the MTE stubs. The tests will only run if a
version of GDB that supports MTE is available in the test environment.
Signed-off-by: Gustavo Romero
Message-Id: <20240628050850.536447-12-gustavo.rom...@linaro.org>
---
configure
On 28/6/24 11:37, Daniel P. Berrangé wrote:
On Fri, Jun 28, 2024 at 11:19:52AM +0200, Philippe Mathieu-Daudé wrote:
On 28/6/24 10:14, Daniel P. Berrangé wrote:
On Fri, Jun 28, 2024 at 09:00:38AM +0200, Philippe Mathieu-Daudé wrote:
Recent SDHCI expect cards to support the v3.01 spec
to
From: Gustavo Romero
Currently, it's not possible to have stubs specific to a given target,
even though there are GDB features which are target-specific, like, for
instance, memory tagging.
This commit introduces gdb_extend_qsupported_features,
gdb_extend_query_table, and gdb_extend_set_table
From: Akihiko Odaki
The test cases for "converting double-precision to single-precision"
emits float but the result variable was typed as uint32_t and corrupted
the printed values. Propertly type it as float.
Signed-off-by: Akihiko Odaki
Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcvt test cases
We can't assign sock_path directly from the autofree'd GStrv, take a
copy.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c
index 237543b43a..111ec3fa27 100644
From: Gustavo Romero
Change 'process_string_cmd' to return true on success and false on
failure, instead of 0 and -1.
Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
Incorrect brace positions causes an unintended overflow on 32 bit
builds and shenanigans result.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2413
Suggested-by: Mark Cave-Ayland
Signed-off-by: Alex Bennée
---
target/i386/tcg/translate.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Gustavo Romero
Factor out the code used for setting the MTE TCF0 field from the prctl
code into a convenient function. Other subsystems, like gdbstub, need to
set this field as well, so keep it as a separate function to avoid
duplication and ensure consistency in how this field is set
The commit 4f9a8315e6 (gitlab-ci.d/crossbuilds: Drop the i386 system
emulation job) was a little too aggressive dropping testing for 32 bit
system builds. Partially revert but using the debian-i686 cross build
images this time as fedora has deprecated the 32 bit stuff.
As the SEV breakage gets in
Hi,
This is a grab bag of fixes and clean-ups as we swiftly approach the
soft freeze deadline. The i386 TCG fix came about when re-enabling the
32 bit host build and finding a regression which was masked by KVM's
presence. As a result I decided to disable KVM in the build anyway as
its TCG most
From: Akihiko Odaki
Previously we are always specifying -u $(UID) to match the UID in the
container with one outside. This causes a problem with rootless Podman.
Rootless Podman remaps user IDs in the container to ones controllable
for the current user outside. The -u option instructs Podman to
We are interested in the particular instruction so we should use a
stable record for it. We could bring this down to physical address but
for now vaddr + disas seems to do the trick.
Signed-off-by: Alex Bennée
---
tests/plugin/insn.c | 76 ++---
1 file
From: Gustavo Romero
Move GdbCmdParseEntry and its associated types into a separate header
file to allow the use of GdbCmdParseEntry and other gdbstub command
functions outside of gdbstub.c.
Since GdbCmdParseEntry and get_param are now public, kdoc
GdbCmdParseEntry and rename get_param to
This really helps with lockstep although its super slow on big jobs.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c
index 761bcdf363..353bf12dfb 100644
---
The ExecState is shared across the socket and if we want to compare
say 64 bit and 32 bit binaries we need the two to use the same sizes
for things.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
While the match functionality is useful lets make the verbosity
optional while we are actually running.
Signed-off-by: Alex Bennée
---
tests/plugin/insn.c | 36 +---
1 file changed, 21 insertions(+), 15 deletions(-)
diff --git a/tests/plugin/insn.c
From: Gustavo Romero
Make the MTE helpers allocation_tag_mem_probe, load_tag1, and store_tag1
available to other subsystems.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240628050850.536447-6-gustavo.rom...@linaro.org>
---
We were repeating information which wasn't super clear. As we already
will have dumped the last failing PC just note the divergence and dump
the previous instruction log.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 16
1 file changed, 8 insertions(+), 8
I guess we never noticed and tried to build with this cross image. Fix
the toolchain prefix so we actually build 32 bit images.
Signed-off-by: Alex Bennée
---
tests/docker/dockerfiles/debian-i686-cross.docker | 2 +-
tests/lcitool/refresh | 2 +-
2 files changed, 2
They don't need to be in the global trace-events file and can have a
local trace header. Also add address_space_map tracepoint for tracking
mapping behaviour.
Signed-off-by: Alex Bennée
---
system/physmem.c| 6 --
system/trace-events | 6 ++
trace-events| 5 -
3 files
memcpy() is trying to READ 512 bytes from memory,
pointed by info->kernel_cmdline,
which was (presumable) allocated by g_strdup("");
Found with ASAN, making check with enabled sanitizers.
Signed-off-by: Dmitry Frolov
---
hw/loongarch/boot.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Gustavo Romero writes:
> This patchset adds the stubs necessary to support GDB memory tagging
> commands on QEMU aarch64 user mode.
Queued to gdbstub/next, thanks. I've manually fixed up the include
issues and moved the PR defines to avoid using prctl.
--
Alex Bennée
Virtualisation Tech Lead
Akihiko Odaki writes:
> The test cases for "converting double-precision to single-precision"
> emits float but the result variable was typed as uint32_t and corrupted
> the printed values. Propertly type it as float.
>
> Signed-off-by: Akihiko Odaki
> Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add
Akihiko Odaki writes:
> Unlike GCC, clang checks if the operands in assembly matches with the
> type in C. It also does not support "x" constraint for AArch64 and
> complains about them.
I guess there are more needed:
ninja: no work to do.
Gustavo Romero writes:
> Factor out the code used for setting the MTE TCF0 field from the prctl
> code into a convenient function. Other subsystems, like gdbstub, need to
> set this field as well, so keep it as a separate function to avoid
> duplication and ensure consistency in how this field
On Thu, 27 Jun 2024 15:09:12 +0200
Igor Mammedov wrote:
> On Thu, 20 Jun 2024 17:03:13 +0100
> Jonathan Cameron wrote:
>
> > Using a property allows us to hide the internal details of the PCI device
> > from the code to build a SRAT Generic Initiator Affinity Structure with
> > PCI Device
On Thu, 27 Jun 2024 14:46:14 +0100
Jonathan Cameron wrote:
> On Thu, 27 Jun 2024 15:27:58 +0200
> Igor Mammedov wrote:
>
> > On Thu, 20 Jun 2024 17:03:15 +0100
> > Jonathan Cameron wrote:
> >
> > > This allows the ACPI SRAT Generic Port Affinity Structure
> > > creation to be independent
When a command's arguments are specified as an explicit type T,
generated documentation points to the members of T.
Example:
##
# @announce-self:
#
# Trigger generation of broadcast RARP frames to update network
[...]
##
{ 'command': 'announce-self', 'boxed': true,
On Fri, 7 Jun 2024 14:17:24 +
Ricardo Ribalda wrote:
> Signed-off-by: Ricardo Ribalda
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
> b/tests/qtest/bios-tables-test-allowed-diff.h
On Fri, Jun 28, 2024 at 12:09:59PM +0100, Roy Hopkins wrote:
> On Mon, 2024-06-24 at 15:00 +0100, Daniel P. Berrangé wrote:
> > On Fri, Jun 21, 2024 at 03:29:07PM +0100, Roy Hopkins wrote:
> > > An IGVM file contains configuration of guest state that should be
> > > applied during configuration of
On Fri, 7 Jun 2024 14:17:25 +
Ricardo Ribalda wrote:
> When qemu runs without kvm acceleration the ACPI executions take a great
> amount of time. If they take more than the default time (30sec), the
> ACPI calls fail and the system might not behave correctly.
>
> Now the _PRT table is
On Thu, 2024-06-27 at 14:48 +0200, Stefano Garzarella wrote:
> On Fri, Jun 21, 2024 at 03:29:09PM GMT, Roy Hopkins wrote:
> > The class function and implementations for updating launch data return
> > a code in case of error. In some cases an error message is generated and
> > in other cases, just
On Thu, 2024-06-27 at 14:38 +0200, Stefano Garzarella wrote:
> On Fri, Jun 21, 2024 at 03:29:08PM GMT, Roy Hopkins wrote:
> > When using an IGVM file the configuration of the system firmware is
> > defined by IGVM directives contained in the file. In this case the user
> > should not configure any
On Mon, 2024-06-24 at 15:00 +0100, Daniel P. Berrangé wrote:
> On Fri, Jun 21, 2024 at 03:29:07PM +0100, Roy Hopkins wrote:
> > An IGVM file contains configuration of guest state that should be
> > applied during configuration of the guest, before the guest is started.
> >
> > This patch allows
On Thu, 2024-06-27 at 10:14 +0100, Daniel P. Berrangé wrote:
> On Thu, Jun 27, 2024 at 11:06:50AM +0200, Stefano Garzarella wrote:
> > On Fri, Jun 21, 2024 at 03:29:06PM GMT, Roy Hopkins wrote:
> > > Adds an IGVM loader to QEMU which processes a given IGVM file and
> > > applies the directives
On Mon, 2024-06-24 at 14:29 +0100, Daniel P. Berrangé wrote:
> On Fri, Jun 21, 2024 at 03:29:06PM +0100, Roy Hopkins wrote:
> > Adds an IGVM loader to QEMU which processes a given IGVM file and
> > applies the directives within the file to the current guest
> > configuration.
> >
> > The IGVM
On Mon, 2024-06-24 at 14:50 +0100, Daniel P. Berrangé wrote:
> On Fri, Jun 21, 2024 at 03:29:03PM +0100, Roy Hopkins wrote:
> > Based-on: 02d9c38236
> >
> > Here is v3 of the set of patches to add support for IGVM files to QEMU.
> >
> > Firstly, apologies for the long gap between v2 and v3. This
This prevents the IRQs from being leaked when the macio IDE device is used.
Signed-off-by: Mark Cave-Ayland
---
hw/ide/macio.c| 10 ++
include/hw/misc/macio/macio.h | 5 +
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/hw/ide/macio.c
...
Could you clarify which tree you are referring to ? I see his tree
https://github.com/awilliam/tests is bit old and updated recently, however
I have been using those tests for my unit testing.
Yes, this tree.
...
This went through cycles of breakage and fixes. It worked on 5.18(not
In the test environment, we conducted IO stress tests on all storage disks
within a virtual machine that had five storage devices mounted.During
testing,
we found that the qemu process allocated a large amount of memory (~800MB)
to handle these IO operations.
When the test ended, although qemu
One more ping...
On 3/15/24 09:58, Alexander Ivanov wrote:
If a block device is an LVM logical volume we can resize it using
standard LVM tools.
Add a helper to detect if a device is a DM device. In raw_co_truncate()
check if the block device is DM and resize it executing lvresize.
Ping?
On 6/7/24 17:00, Alexander Ivanov wrote:
static void nbd_blockdev_client_closed(NBDClient *client, bool ignored)
{
nbd_client_put(client);
+if (nbd_server == NULL) {
+return;
+}
assert(nbd_server->connections > 0);
nbd_server->connections--;
John Snow writes:
> We do not need a dedicated section for notes. By eliminating a specially
> parsed section, these notes can be treated as normal rST paragraphs in
> the new QMP reference manual, and can be placed and styled much more
> flexibly.
>
> Convert all existing "Note" and "Notes"
In the original extract32(val, 0, lmul) logic, when lmul is 2 and val is v10 or
v12,
there is an issue with this check condition. I think a simple mod operation is
sufficient.
Signed-off-by: Zhiwei Jiang
---
target/riscv/insn_trans/trans_rvv.c.inc | 2 +-
1 file changed, 1 insertion(+), 1
On Fri, Jun 28, 2024 at 11:19:52AM +0200, Philippe Mathieu-Daudé wrote:
> On 28/6/24 10:14, Daniel P. Berrangé wrote:
> > On Fri, Jun 28, 2024 at 09:00:38AM +0200, Philippe Mathieu-Daudé wrote:
> > > Recent SDHCI expect cards to support the v3.01 spec
> > > to negociate lower I/O voltage. Select
Hi,
This is trying to address an issue Cédric found.
See https://www.mail-archive.com/qemu-devel@nongnu.org/msg1043142.html
While looking into it, also found a potential memory leak.
I'm sorry that I didn't find how to test this fix, because it looks
a GFX card is needed. Any idea on how to test
EDID related device region info is leaked in three paths:
1. In vfio_get_dev_region_info(), when edid info isn't find, the last
device region info is leaked.
2. In vfio_display_edid_init() error path, edid info is leaked.
3. In VFIODisplay destroying path, edid info is leaked.
Fixes: 08479114b0de
vfio_display_edid_init() can fail for many reasons and return silently.
It would be good to report the error.
Old mdev driver may not support vfio edid region and we allow to go
through in this case.
vfio_display_edid_update() isn't changed because it can be called at
runtime when UI changes
On 28/6/24 07:20, Gustavo Romero wrote:
Hi Phil,
On 6/27/24 3:05 AM, Philippe Mathieu-Daudé wrote:
On 27/6/24 06:13, Gustavo Romero wrote:
Factor out the code used for setting the MTE TCF0 field from the prctl
code into a convenient function. Other subsystems, like gdbstub, need to
set this
On 28/6/24 10:14, Daniel P. Berrangé wrote:
On Fri, Jun 28, 2024 at 09:00:38AM +0200, Philippe Mathieu-Daudé wrote:
Recent SDHCI expect cards to support the v3.01 spec
to negociate lower I/O voltage. Select it by default.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
On 6/28/24 9:02 AM, Philippe Mathieu-Daudé wrote:
When booting U-boot/Linux on Aspeed boards via eMMC,
some commands don't behave as expected from the spec.
Add the 'x-aspeed-emmc-kludge' property to allow non
standard uses until we figure out the reasons.
I am not aware of any singularity in
From: Jonathan Cameron
Creates a GED - Generic Event Device and set a GPIO to
be used or error injection.
Signed-off-by: Jonathan Cameron
Signed-off-by: Shiju Jose
---
hw/arm/virt-acpi-build.c | 29 +
hw/arm/virt.c| 12 +++-
include/hw/boards.h
From: Jonathan Cameron
Add error notification to GHES v2 using the GPIO source.
Signed-off-by: Jonathan Cameron
Signed-off-by: Mauro Carvalho Chehab
Signed-off-by: Shiju Jose
---
hw/acpi/ghes.c | 8 ++--
include/hw/acpi/ghes.h | 1 +
2 files changed, 7 insertions(+), 2
From: Shiju Jose
Series adds,
1. ACPI based FW First error injection and
2. Support for injecting ARM processor errors.
This qemu based error injection mechanism found very useful for testing and
upstream the RAS FW-first related changes in the kernel
as well as in the user space tools when
From: Jonathan Cameron
1. Some GHES functions require handling addresses. Add a helper function
to support it.
2. Add support for ACPI CPER (firmware-first) ARM processor error injection.
Compliance with N.2.4.4 ARM Processor Error Section in UEFI 2.6 and
upper specs, using error type bit
On 6/27/2024 10:06 PM, Paolo Bonzini wrote:
The recent addition of the SUCCOR bit to kvm_arch_get_supported_cpuid()
causes the bit to be visible when "-cpu host" VMs are started on Intel
processors.
While this should in principle be harmless, it's not tidy and we don't
even know for sure that
On 6/27/2024 10:06 PM, Paolo Bonzini wrote:
This allows modifying the bits in "-cpu max"/"-cpu host" depending on
the guest CPU vendor (which, at least by default, is the host vendor in
the case of KVM).
For example, machine check architecture differs between Intel and AMD,
and bits from AMD
On Fri, Jun 28, 2024 at 09:00:38AM +0200, Philippe Mathieu-Daudé wrote:
> Recent SDHCI expect cards to support the v3.01 spec
> to negociate lower I/O voltage. Select it by default.
>
> Signed-off-by: Philippe Mathieu-Daudé
> Reviewed-by: Cédric Le Goater
> ---
> hw/sd/sd.c | 2 +-
> 1 file
On Thu, Jun 27, 2024 at 05:58:17PM -0700, Gregor Haas wrote:
> The read() syscall is not guaranteed to return all data from a file. The
> default ROM loader implementation currently does not take this into account,
> instead failing if all bytes are not read at once. This change loads the ROM
>
On 6/28/24 9:02 AM, Philippe Mathieu-Daudé wrote:
From: Luc Michel
The JEDEC standards specifies a sleep state where the eMMC won't answer
any command appart from RESET and WAKEUP and go to low power state.
Implement this state and the corresponding command number 5.
Signed-off-by: Luc Michel
On 6/28/24 9:02 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 7c6f5ccc72..0f9bab105e 100644
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 249fad0468..ebcd8c1e43 100644
---
On 6/28/24 9:02 AM, Philippe Mathieu-Daudé wrote:
Per the spec v4.5 these commands are mandatory,
but we don't implement them.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
So far eMMC will only use sd_sleep_state, but
all all states specified for completeness.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 11 +++
1 file changed, 11
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
In preparation of introducing eMMC support which have
different CSD/CID structures, introduce a pair of handlers
in SDCardClass.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/sd/sd.h |
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Some commands expect less than BLOCK_LENGTH.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 4 ++--
hw/sd/trace-events | 2 +-
2 files changed, 3 insertions(+), 3
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
All read/write on DAT lines are explicitly handled.
Reaching this point would be a programming error:
replace by an assertion.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 9
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
These CMD names weren't really useful, "UNKNOWN_CMD" is simpler.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/sd/sd.c
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
These ACMD names weren't really useful, "UNKNOWN_ACMD" is simpler.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
All handlers using the 'sd_none' enum got converted,
remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/sd/sd.h | 1 -
hw/sd/sd.c | 7 +--
2 files changed, 1
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index b3b4cd5a3a..2f853a89d1 100644
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 82 ++
1 file changed, 45 insertions(+), 37 deletions(-)
diff --git a/hw/sd/sd.c
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 25 +
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 36 +---
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 28 +++-
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 50cee5ac40..b3b4cd5a3a 100644
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 53 -
1 file changed, 28 insertions(+), 25 deletions(-)
diff --git a/hw/sd/sd.c
On 6/28/24 9:01 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sd.c | 47 ---
1 file changed, 24 insertions(+), 23 deletions(-)
diff --git a/hw/sd/sd.c
101 - 200 of 370 matches
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