am working on adding AWS Nitro Enclave[1]
emulation support in QEMU. Alexander Graf is mentoring me on this work. This is
a patch series adding, not yet complete, but useful emulation support of nitro
enclaves. I have a gitlab branch where you can view the patches in the gitlab
web UI for each
On 22.05.24 19:23, Dorjoy Chowdhury wrote:
Hi Daniel,
Thanks for reviewing.
On Wed, May 22, 2024 at 9:32 PM Daniel P. Berrangé wrote:
On Sat, May 18, 2024 at 02:07:52PM +0600, Dorjoy Chowdhury wrote:
An EIF (Enclave Image Format)[1] image is used to boot an AWS nitro
enclave[2] virtual
On 27.05.24 16:52, Dorjoy Chowdhury wrote:
Hi Philippe,
Thank you for reviewing.
On Mon, May 27, 2024 at 4:47 PM Philippe Mathieu-Daudé
wrote:
Hi Dorjoy,
On 18/5/24 10:07, Dorjoy Chowdhury wrote:
An EIF (Enclave Image Format)[1] image is used to boot an AWS nitro
enclave[2] virtual
licon support")
Signed-off-by: Zenghui Yu
Nice catch! Did you find them only because of functional issues or have
you taken an automated pass somehow to validate the sysreg definitions
are correct?
Reviewed-by: Alexander Graf
Alex
Language: C
* Mentor: agraf
* Suggested by: Alexander Graf (OFTC: agraf, Email: g...@amazon.com)
Alex
On 30.11.23 15:17, Philippe Mathieu-Daudé wrote:
Hi,
On 16/9/21 17:53, Alexander Graf wrote:
With Apple Silicon available to the masses, it's a good time to add
support
for driving its virtualization extensions from QEMU.
This patch adds all necessary architecture specific code to get
Hey Gerd!
On 15.11.23 16:12, Gerd Hoffmann wrote:
This patch adds a virtual device to qemu which the uefi firmware can use
to store variables. This moves the UEFI variable management from
privileged guest code (managing vars in pflash) to the host. Main
advantage is that the need to have
On 21.04.23 00:52, Alexander Graf wrote:
Hvf on x86 only supported 2MiB large pages, but never bothered to strip
out the 1GiB page size capability from -cpu host. With QEMU 8.0.0 this
became a problem because OVMF started to use 1GiB pages by default.
Let's just unconditionally add 1GiB page
Hi Joelle,
On 01.08.23 03:46, Joelle van Dyne wrote:
On Tue, Jul 18, 2023 at 7:16 AM Stefan Berger wrote:
On 7/17/23 09:46, Igor Mammedov wrote:
On Fri, 14 Jul 2023 00:09:21 -0700
Joelle van Dyne wrote:
Since this device is gated to only build for targets with the PC
configuration, we
On 31.08.23 10:53, Akihiko Odaki wrote:
On 2023/08/31 17:12, Philippe Mathieu-Daudé wrote:
On 30/8/23 18:14, Alexander Graf wrote:
Recent versions of macOS use clang instead of gcc. The
OS_OBJECT_USE_OBJC
define is only necessary when building with gcc. Let's not define it
when
building
VMApple contains an "aes" engine device that it uses to encrypt and
decrypt its nvram. It has trivial hard coded keys it uses for that
purpose.
Add device emulation for this device model.
Signed-off-by: Alexander Graf
---
hw/vmapple/aes.c
Recent versions of macOS use clang instead of gcc. The OS_OBJECT_USE_OBJC
define is only necessary when building with gcc. Let's not define it when
building with clang.
With this patch, I can successfully include GCD headers in QEMU when
building with clang.
Signed-off-by: Alexander Graf
OS booting
successfully.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Adapt to system_ss meson.build target
- Add documentation
---
MAINTAINERS | 1 +
docs/system/arm/vmapple.rst | 63
docs/system/target-arm.rst | 1 +
hw/vmapple/vmapple.c
ompatibilities.
---
v1 -> v2:
- Adapt to system_ss meson.build target
- Add documentation
- Rework virtio-blk patch to make all vmapple virtio-blk logic subclasses
- Add log message on write
- Move max slot number to define
- Use SPDX header
- Remove useless includes
Alexande
then map at the fixed location in the address space. That way, we can
influence and annotate all configuration fields easily.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Adapt to system_ss meson.build target
---
include/hw/vmapple/cfg.h | 68 +
hw/vmapple/cf
for
guest recovery and I don't understand the protocol yet.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Adapt to system_ss meson.build target
---
include/hw/vmapple/bdif.h | 31 +
hw/vmapple/bdif.c | 245 ++
hw/vmapple/Kconfig| 2 +
callbacks on MMIO access as well as to share memory address
space between the VM and PVG.
This patch implements a QEMU device that drives PVG for the VMApple
variant of it.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Adapt to system_ss meson.build target
---
meson.build |
In addition to the ISA and PCI variants of pvpanic, let's add an MMIO
platform device that we can use in embedded arm environments.
Signed-off-by: Alexander Graf
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
v1 -> v2:
- Use SPDX header
- Remove usel
For PVG we will need more than the current 32 possible memory slots.
Bump the limit to 512 instead.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move max slot number to define
---
include/sysemu/hvf_int.h | 4 +++-
accel/hvf/hvf-accel-ops.c | 2 +-
2 files changed, 4 insertions(+)
We will introduce a number of devices that are specific to the vmapple
target machine. To keep them all tidily together, let's put them into
a single target directory.
Signed-off-by: Alexander Graf
---
MAINTAINERS | 6 ++
meson.build | 1 +
hw/vmapple/trace.h
MacOS unconditionally disables interrupts of the physical timer on boot
and then continues to use the virtual one. We don't really want to support
a full physical timer emulation, so let's just ignore those writes.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Add log message on wr
;vmapple-virtio-root" and "vmapple-virtio-aux".
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Rework to make all vmapple virtio-blk logic a subclass
---
include/hw/pci/pci_ids.h| 1 +
include/hw/virtio/virtio-blk.h | 12 +-
include/hw/vmapple/virtio-blk.h |
mode, GPEX will export more IRQ lines, one for each device.
Signed-off-by: Alexander Graf
---
include/hw/pci-host/gpex.h | 7 +++
hw/arm/sbsa-ref.c | 2 +-
hw/arm/virt.c | 2 +-
hw/i386/microvm.c | 2 +-
hw/loongarch/virt.c| 2 +-
hw/mips/loongson3_vir
On 20.06.23 19:35, Bernhard Beschow wrote:
Am 14. Juni 2023 22:57:34 UTC schrieb Alexander Graf :
Apple defines a new "vmapple" machine type as part of its proprietary
macOS Virtualization.Framework vmm. This machine type is similar to the
virt one, but with subtle differenc
On 16.06.23 13:48, Kevin Wolf wrote:
Am 15.06.2023 um 00:56 hat Alexander Graf geschrieben:
Apple has its own virtio-blk PCI device ID where it deviates from the
official virtio-pci spec slightly: It puts a new "apple type"
field at a static offset in config space and introduces a n
On 16.06.23 12:47, Philippe Mathieu-Daudé wrote:
On 15/6/23 00:57, Alexander Graf wrote:
Instead of device tree or other more standardized means, VMApple passes
platform configuration to the first stage boot loader in a binary
encoded
format that resides at a dedicated RAM region
On 16.06.23 12:39, Philippe Mathieu-Daudé wrote:
On 15/6/23 00:56, Alexander Graf wrote:
The VMApple machine exposes AUX and ROOT block devices (as well as
USB OTG
emulation) via virtio-pci as well as a special, simple backdoor platform
device.
This patch implements this backdoor platform
Hi Antonio,
On 02.08.23 11:43, Antonio Caggiano wrote:
Hi there,
I am trying to bring up a guest on HVF, which at a certain point is
trying to write to an area of mmio space and it triggers a data abort
where ISV=0 (translation fault level 2).
I wonder what could cause it and how to recover.
Hi Mads,
On 20.06.23 13:17, Mads Ynddal wrote:
On 15 Jun 2023, at 00.40, Alexander Graf wrote:
This patch set introduces a new ARM and HVF specific machine type
called "vmapple". It mimicks the device model that Apple's proprietary
Virtualization.Framework exposes, but
Hi Philippe,
On 16.06.23 12:28, Philippe Mathieu-Daudé wrote:
On 15/6/23 00:40, Alexander Graf wrote:
For PVG we will need more than the current 32 possible memory slots.
Bump the limit to 512 instead.
Signed-off-by: Alexander Graf
---
accel/hvf/hvf-accel-ops.c | 2 +-
include/sysemu
callbacks on MMIO access as well as to share memory address
space between the VM and PVG.
This patch implements a QEMU device that drives PVG for the VMApple
variant of it.
Signed-off-by: Alexander Graf
---
hw/vmapple/Kconfig | 3 +
hw/vmapple/apple-gfx.m | 578
ble to see macOS booting
successfully.
Signed-off-by: Alexander Graf
---
hw/vmapple/Kconfig | 19 ++
hw/vmapple/meson.build | 1 +
hw/vmapple/vmapple.c | 661 +
3 files changed, 681 insertions(+)
create mode 100644 hw/vmapple/vmapple.c
diff
VMApple contains an "aes" engine device that it uses to encrypt and
decrypt its nvram. It has trivial hard coded keys it uses for that
purpose.
Add device emulation for this device model.
Signed-off-by: Alexander Graf
---
hw/vmapple/Kconfig | 2 +
hw/vmapple/aes.c
then map at the fixed location in the address space. That way, we can
influence and annotate all configuration fields easily.
Signed-off-by: Alexander Graf
---
hw/vmapple/Kconfig | 3 ++
hw/vmapple/cfg.c | 105 +++
hw/vmapple/meson.build | 1
mode, GPEX will export more IRQ lines, one for each device.
Signed-off-by: Alexander Graf
---
hw/arm/sbsa-ref.c | 2 +-
hw/arm/virt.c | 2 +-
hw/i386/microvm.c | 2 +-
hw/loongarch/virt.c| 2 +-
hw/mips/loongson3_virt.c | 2 +-
hw/openrisc/virt.c
for
guest recovery and I don't understand the protocol yet.
Signed-off-by: Alexander Graf
---
hw/vmapple/Kconfig| 2 +
hw/vmapple/bdif.c | 245 ++
hw/vmapple/meson.build| 1 +
hw/vmapple/trace-events | 5 +
include/hw/vmapple/bdif.h | 31
We will introduce a number of devices that are specific to the vmapple
target machine. To keep them all tidily together, let's put them into
a single target directory.
Signed-off-by: Alexander Graf
---
MAINTAINERS | 6 ++
hw/Kconfig | 1 +
hw/meson.build
virtio-blk-pci.
When that property is set, we assume the virtio-blk device is an Apple one
of the specific type and act accordingly.
Signed-off-by: Alexander Graf
---
hw/block/virtio-blk.c | 23 +
hw/virtio/virtio-blk-pci.c | 7 +++
incl
MacOS unconditionally disables interrupts of the physical timer on boot
and then continues to use the virtual one. We don't really want to support
a full physical timer emulation, so let's just ignore those writes.
Signed-off-by: Alexander Graf
---
target/arm/hvf/hvf.c | 7 +++
1 file
Recent versions of macOS use clang instead of gcc. The OS_OBJECT_USE_OBJC
define is only necessary when building with gcc. Let's not define it when
building with clang.
With this patch, I can successfully include GCD headers in QEMU when
building with clang.
Signed-off-by: Alexander Graf
For PVG we will need more than the current 32 possible memory slots.
Bump the limit to 512 instead.
Signed-off-by: Alexander Graf
---
accel/hvf/hvf-accel-ops.c | 2 +-
include/sysemu/hvf_int.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/accel/hvf/hvf-accel-ops.c b
MacOS unconditionally disables interrupts of the physical timer on boot
and then continues to use the virtual one. We don't really want to support
a full physical timer emulation, so let's just ignore those writes.
Signed-off-by: Alexander Graf
---
target/arm/hvf/hvf.c | 7 +++
1 file
In addition to the ISA and PCI variants of pvpanic, let's add an MMIO
platform device that we can use in embedded arm environments.
Signed-off-by: Alexander Graf
---
hw/misc/Kconfig | 4 +++
hw/misc/meson.build | 1 +
hw/misc/pvpanic-mmio.c| 66
nt to enable TSO
Over time, I hope that some of the limitations above could cease to exist.
This device model would enable very nice use cases with KVM on an Asahi
Linux device.
Alexander Graf (12):
build: Only define OS_OBJECT_USE_OBJC with gcc
hw/misc/pvpanic: Add MMIO interface
hvf: Incr
Hi Philippe,
On 23.05.23 08:44, Philippe Mathieu-Daudé wrote:
QOM object instance should not modify its class state (because
all other objects instanciated from this class get affected).
Instead of modifying the PPCE500MachineClass 'mpic_version' field
in the instance machine_init() handler,
applied, I can successfully run OVMF again.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1603
Signed-off-by: Alexander Graf
Reported-by: Akihiro Suda
Reported-by: Philippe Mathieu-Daudé
---
On my test VM, Linux dies later on with issues in interrupt delivery. But
those are unrelated
this work consistently, also fix up all places in QEMU that
expect fd offsets to be 0.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- add qom documentation
- propagate offset into truncate, size and alignment checks
v2 -> v3:
- failed attempt at fixing typo
v3 -> v4:
- fix
On 03.04.23 09:13, David Hildenbrand wrote:
On 01.04.23 19:47, Stefan Hajnoczi wrote:
On Sat, Apr 01, 2023 at 12:42:57PM +, Alexander Graf wrote:
Add an option for hostmem-file to start the memory object at an offset
into the target file. This is useful if multiple memory objects reside
On 03.04.23 08:28, Markus Armbruster wrote:
Alexander Graf writes:
Add an option for hostmem-file to start the memory object at an offset
into the target file. This is useful if multiple memory objects reside
inside the same target file, such as a device node.
In particular, it's useful
-by: Alexander Graf
Reviewed-by: Stefan Hajnoczi
---
v1 -> v2:
- add qom documentation
- propagate offset into truncate, size and alignment checks
v2 -> v3:
- failed attempt at fixing typo
v2 -> v4:
- fix typo
---
backends/hostmem-fi
-by: Alexander Graf
Reviewed-by: Stefan Hajnoczi
---
v1 -> v2:
- add qom documentation
- propagate offset into truncate, size and alignment checks
v2 -> v3:
- fix typo
---
backends/hostmem-file.c | 40 +++-
include/exec/memory.h | 2 ++
i
-by: Alexander Graf
---
v1 -> v2:
- add qom documentation
- propagate offset into truncate, size and alignment checks
---
backends/hostmem-file.c | 40 +++-
include/exec/memory.h | 2 ++
include/exec/ram_addr.h | 3 ++-
qapi/qom.json |
from outside of the organization. Do not
click links or open attachments unless you can confirm the sender and know
the content is safe.
We have multiple contributors from both .co.uk and .com versions of
the address.
Signed-off-by: Alex Bennée
Cc: Alexander Graf
Cc: Paul Durrant
Cc: David
On 03.01.23 18:41, Peter Maydell wrote:
On Fri, 23 Dec 2022 at 08:50, Alexander Graf wrote:
While trying to make Windows work with GICv3 emulation, I stumbled over
the fact that it only supports ITT entry sizes that are power of 2 sized.
While the spec allows arbitrary sizes, in practice
Hey Peter,
On 03.02.23 11:57, Peter Maydell wrote:
On Thu, 2 Feb 2023 at 17:56, Peter Maydell wrote:
On Sat, 28 Jan 2023 at 22:45, Alexander Graf wrote:
We currently only support GICv2 emulation. To also support GICv3, we will
need to pass a few system registers into their respective
-by: Alexander Graf
---
backends/hostmem-file.c | 40 +++-
include/exec/memory.h | 2 ++
include/exec/ram_addr.h | 3 ++-
qapi/qom.json | 1 +
qemu-options.hx | 6 +-
softmmu/memory.c| 3 ++-
softmmu/physmem.c | 5
-by: Alexander Graf
---
v1 -> v2:
- assert when guest has EL2/EL3 and uses non-TCG GICv3
- use defines for sysreg masks
---
hw/intc/arm_gicv3_cpuif.c | 15 +++-
target/arm/hvf/hvf.c| 151
target/arm/hvf/trace-events | 2 +
3 files changed,
On 06.01.23 17:37, Peter Maydell wrote:
On Mon, 19 Dec 2022 at 22:08, Alexander Graf wrote:
We currently only support GICv2 emulation. To also support GICv3, we will
need to pass a few system registers into their respective handler functions.
This patch adds support for HVF to call
Hi Peter,
On 03.01.23 18:41, Peter Maydell wrote:
On Fri, 23 Dec 2022 at 08:50, Alexander Graf wrote:
While trying to make Windows work with GICv3 emulation, I stumbled over
the fact that it only supports ITT entry sizes that are power of 2 sized.
While the spec allows arbitrary sizes
Hi Vitaly,
On 31.12.22 11:17, Vitaly Chikunov wrote:
Alexander,
On Sat, Dec 31, 2022 at 10:28:21AM +0100, Alexander Graf wrote:
On 30.12.22 19:16, Vitaly Chikunov wrote:
On Fri, Dec 30, 2022 at 06:44:14PM +0100, Alexander Graf wrote:
This is a kvm kernel bug and should be fixed
Hi Vitaly,
On 30.12.22 19:16, Vitaly Chikunov wrote:
Alexander,
On Fri, Dec 30, 2022 at 06:44:14PM +0100, Alexander Graf wrote:
Hi Vitaly,
This is a kvm kernel bug and should be fixed with the latest stable releases.
Which kernel version are you running?
This is on latest v6.0 stable
Hi Vitaly,
This is a kvm kernel bug and should be fixed with the latest stable releases.
Which kernel version are you running?
Thanks,
Alex
> Am 30.12.2022 um 15:30 schrieb Vitaly Chikunov :
>
> Hi,
>
> QEMU 7.2.0 when run on 32-bit x86 architecture fails with:
>
> i586$
Hey Cornelia,
On 23.12.22 13:30, Cornelia Huck wrote:
On Fri, Dec 23 2022, Alexander Graf wrote:
Up to now, the finalize_gic_version() code open coded what is essentially
a support bitmap match between host/emulation environment and desired
target GIC type.
This open coding leads
-> v2:
- Leave VIRT_GIC_VERSION defines intact, we need them for MADT generation
- Include TCG header for tcg_enabled()
v2 -> v3:
- Fix comment
- Flip kvm-enabled logic for host around
Alexander Graf (2):
hw/arm/virt: Consolidate GIC finalize logic
hw/arm/virt: Make accels
Let's explicitly list out all accelerators that we support when trying to
determine the supported set of GIC versions. KVM was already separate, so
the only missing one is HVF which simply reuses all of TCG's emulation
code and thus has the same compatibility matrix.
Signed-off-by: Alexander Graf
which target GIC mode that means for us.
After this patch, the only user noticable changes should be consolidated
error messages as well as TCG -M virt supporting -smp > 8 automatically.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Leave VIRT_GIC_VERSION defines intact, we need them fo
any existing scenarios. To
play it safe, this patch set only bumps them on newer machine types.
Alexander Graf (2):
hw/intc/arm_gicv3: Make ITT entry size configurable
hw/intc/arm_gicv3: Bump ITT entry size to 16
hw/core/machine.c | 4 +++-
hw/intc/arm_gicv3_its.c
for a future where we expose power of 2 sized entry sizes, let's
make the size itself configurable. We only need to watch out that we don't
have an entry be smaller than the fields we want to access inside. Bigger
is always fine.
Signed-off-by: Alexander Graf
---
hw/intc/arm_gicv3_its.c| 14
of entries without gap at the end.
So let's just bump the entry size to 16. That gives us enough space for
the 12 bytes of data that we want to have in each ITT entry and makes
QEMU look a bit more like real hardware.
Signed-off-by: Alexander Graf
---
hw/core/machine.c | 4 +++-
hw/intc
which target GIC mode that means for us.
After this patch, the only user noticable changes should be consolidated
error messages as well as TCG -M virt supporting -smp > 8 automatically.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- leave VIRT_GIC_VERSION defines intact, we need them fo
-> v2:
- Leave VIRT_GIC_VERSION defines intact, we need them for MADT generation
- Include TCG header for tcg_enabled()
Alexander Graf (2):
hw/arm/virt: Consolidate GIC finalize logic
hw/arm/virt: Make accels in GIC finalize logic explicit
hw/arm/virt.c |
Let's explicitly list out all accelerators that we support when trying to
determine the supported set of GIC versions. KVM was already separate, so
the only missing one is HVF which simply reuses all of TCG's emulation
code and thus has the same compatibility matrix.
Signed-off-by: Alexander Graf
Hey Zengui,
On 21.12.22 04:35, Zenghui Yu wrote:
On 2022/12/21 7:04, Alexander Graf wrote:
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index c7dd59d7f1..365d19f7a3 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -109,12 +109,12 @@ typedef enum
Let's explicitly list out all accelerators that we support when trying to
determine the supported set of GIC versions. KVM was already separate, so
the only missing one is HVF which simply reuses all of TCG's emulation
code and thus has the same compatibility matrix.
Signed-off-by: Alexander Graf
which target GIC mode that means for us.
After this patch, the only user noticable changes should be consolidated
error messages as well as TCG -M virt supporting -smp > 8 automatically.
Signed-off-by: Alexander Graf
---
hw/arm/virt.c |
Alexander Graf (2):
hw/arm/virt: Consolidate GIC finalize logic
hw/arm/virt: Make accels in GIC finalize logic explicit
hw/arm/virt.c | 199 ++
include/hw/arm/virt.h | 12 +--
2 files changed, 110 insertions(+), 101 deletions(-)
--
2.37.1 (Apple Git
On 20.12.22 14:53, Fabiano Rosas wrote:
Alexander Graf writes:
Hey Fabiano,
On 19.12.22 12:42, Fabiano Rosas wrote:
Claudio Fontana writes:
Ciao Alex,
On 12/19/22 11:47, Alexander Graf wrote:
Hey Claudio,
On 19.12.22 09:37, Claudio Fontana wrote:
On 12/16/22 22:59, Alexander Graf
Hi Zenghui,
On 20.12.22 08:14, Zenghui Yu wrote:
On 2022/12/20 6:08, Alexander Graf wrote:
We currently only support GICv2 emulation.
Before looking into it, I think it's worth finalizing the GIC version in
the hvf case - only v2 is allowed and fail early if user selects the
unsupported
Hey Fabiano,
On 19.12.22 12:42, Fabiano Rosas wrote:
Claudio Fontana writes:
Ciao Alex,
On 12/19/22 11:47, Alexander Graf wrote:
Hey Claudio,
On 19.12.22 09:37, Claudio Fontana wrote:
On 12/16/22 22:59, Alexander Graf wrote:
Hi Claudio,
If the PSCI implementation becomes TCG only, can
-by: Alexander Graf
---
hw/intc/arm_gicv3_cpuif.c | 8 +-
target/arm/hvf/hvf.c| 151
target/arm/hvf/trace-events | 2 +
3 files changed, 160 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
index
Hey Claudio,
On 19.12.22 09:37, Claudio Fontana wrote:
On 12/16/22 22:59, Alexander Graf wrote:
Hi Claudio,
If the PSCI implementation becomes TCG only, can we also move to a tcg accel
directory? It slowly gets super confusing to keep track of which files are
supposed to be generic target
gt; From: Claudio Fontana
>
> Signed-off-by: Claudio Fontana
> Cc: Alexander Graf
> Reviewed-by: Richard Henderson
> Reviewed-by: Alex Bennée
> Signed-off-by: Fabiano Rosas
> ---
> Originally from:
> [RFC v14 09/80] target/arm: only build psci for TCG
> https:/
to install a hook on KVM MSR reads or writes.
Signed-off-by: Alexander Graf
---
target/i386/kvm/kvm.c | 124 +
target/i386/kvm/kvm_i386.h | 11
2 files changed, 135 insertions(+)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index
027ac0cb516
("target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT") to KVM.
Signed-off-by: Alexander Graf
---
target/i386/kvm/kvm.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index ea53092dd0..791e995
ng as host KVM is recent enough to support MSR trapping.
With this support added, I can successfully execute macOS guests in
KVM with an APFS enabled OVMF build, a valid applesmc plus OSK and
-cpu Skylake-Client,+invtsc,+hypervisor
Alex
Alexander Graf (3):
x86: Implement MSR_CORE_THREAD
if the emulated CPU generation is at least Haswell-E.
This patch propagates the existing hvf logic from patch 027ac0cb516
("target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT") to TCG.
Signed-off-by: Alexander Graf
---
target/i386/tcg/sysemu/misc_helper.c | 5 +
1 file
be correct in this case).
Signed-off-by: Alex Bennée
Cc: Mads Ynddal
Cc: Alexander Graf
---
target/arm/hvf/hvf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 060aa0ccf4..13b7971560 100644
--- a/target/arm/hvf/hvf.c
+++ b
On 26.09.22 15:38, Alex Bennée wrote:
We currently have hacks across the hw/ to reference current_cpu to
work out what the current accessing CPU is. This breaks in some cases
including using gdbstub to access HW state. As we have MemTxAttrs to
describe details about the access lets extend it
We need to fetch the name of the current accelerator in flexible error
messages more going forward. Let's create a helper that gives it to us
without casting in the target code.
Signed-off-by: Alexander Graf
---
accel/accel-common.c | 8
include/qemu/accel.h | 1 +
softmmu/vl.c
/qemu/-/issues/1073
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Use current_accel_name()
- Use !tcg_enabled()
---
target/arm/cpu.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 1b5d535788..0862dcd63c 100
/1073
Signed-off-by: Alexander Graf
---
target/arm/cpu.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 1b5d535788..03510f29f9 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1490,7 +1490,7 @@ static void
> Am 29.04.2022 um 21:18 schrieb Vladislav Yaroshchuk
> :
>
> On Apple hosts we can read AppleSMC OSK key directly from host's
> SMC and forward this value to QEMU Guest.
>
> New 'hostosk' property is added:
> * `-device isa-applesmc,hostosk=on`
> The property is set to 'on' by default for
On 01.05.22 19:06, Alexander Graf wrote:
Hey Vladislav,
On 29.04.22 21:18, Vladislav Yaroshchuk wrote:
On Apple hosts we can read AppleSMC OSK key directly from host's
SMC and forward this value to QEMU Guest.
New 'hostosk' property is added:
* `-device isa-applesmc,hostosk=on`
The property
Hey Vladislav,
On 29.04.22 21:18, Vladislav Yaroshchuk wrote:
On Apple hosts we can read AppleSMC OSK key directly from host's
SMC and forward this value to QEMU Guest.
New 'hostosk' property is added:
* `-device isa-applesmc,hostosk=on`
The property is set to 'on' by default for machine
Hey Stefan!
On 16.03.22 14:16, Stefan Hajnoczi wrote:
On Mon, 14 Feb 2022 at 13:58, Stefan Hajnoczi wrote:
On Wed, 9 Feb 2022 at 14:50, Alexander Graf wrote:
On 28.01.22 16:47, Stefan Hajnoczi wrote:
Dear QEMU, KVM, and rust-vmm communities,
QEMU will apply for Google Summer of Code 2022
On 09.03.22 23:02, Jason A. Donenfeld wrote:
Hi Alex,
On Wed, Mar 9, 2022 at 3:10 AM Alexander Graf wrote:
The vmgenid driver basically works, though it is racy, because that ACPI
notification can arrive after the system is already running again. This
I believe enough people already
On 01.03.22 16:42, Jason A. Donenfeld wrote:
Hey folks,
Having finally wrapped up development of the initial vmgenid driver, I
thought I'd pull together some thoughts on vmgenid, notification, and
propagating, from disjointed conversations I've had with a few of you
over the last several
On 25.02.22 16:43, Jason A. Donenfeld wrote:
Hi Alex,
On Fri, Feb 25, 2022 at 04:22:54PM +0100, Alexander Graf wrote:
I don't understand the rush here. This had been sitting on the ML for 1
year - and now suddenly talking the match through properly and getting
VMGenID spec compatible
On 25.02.22 16:34, Jason A. Donenfeld wrote:
On Fri, Feb 25, 2022 at 04:16:27PM +0100, Ard Biesheuvel wrote:
I just booted up a Windows VM, and it looks like Hyper-V uses
"Hyper_V_Gen_Counter_V1", which is also quite long, so we can't really
HID match on that either.
Yes, due to the same
On 25.02.22 15:36, Greg KH wrote:
On Fri, Feb 25, 2022 at 02:57:38PM +0100, Alexander Graf wrote:
+
+ phys_addr = (obj->package.elements[0].integer.value << 0) |
+ (obj->package.elements[1].integer.value << 32);
+ state->next_id = devm_mem
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