/USER/qemu-1.6.0/rules.mak:60: recipe for target `qemu-img.exe' failed
make: *** [qemu-img.exe] Error 1
2013/9/24 Alexander Voropay alexander.voro...@gmail.com
Hi!
Can anyone please correct a building qemu-1.6.0 under Cygwin64 ?
./configure reports non-working cc . The gcc is installed
2013/9/24 Eric Blake ebl...@redhat.com
-mno-cygwin is an obsolete command line option, formerly used for
cross-compiling from cygwin to mingw. It is NOT used when building for
cygwin, and these days, building for mingw should use a proper cross
compiler (available from cygwin.com) rather
[EMAIL PROTECTED] wrote:
- QEMU malta emulation is not really complete, to put it mildly
Out of curiosity, what parts did you miss?
Like, for example, the PCI stuff. So I can use the network card.
PCI stuff in the QEMU/Malta works fine, but pseudo-bootrom
does not perform PCI enumeration
Mulyadi Santosa [EMAIL PROTECTED] wrote:
/home/wine/qemu/vl.c:59:24: linux/hpet.h: No such file or directory
/home/wine/qemu/vl.c: In function `hpet_start_timer':
/home/wine/qemu/vl.c:1222: storage size of `info' isn't known
/home/wine/qemu/vl.c:1230: `HPET_IRQFREQ' undeclared (first use in
Hi!
This patch add a simply YAMON services ( print() and print_count() )
to Malta pseudo-loader. This services are requred for NetBSD to run.
As a result, an *unmodified* NetBSD 3.0 kernel starts to work but hangs
very early on the PCNET PCI Ethernet (IRQ=0). The PCI is not initialized
and
Hi!
This patch adds SP initialization fot the Malta YAMON pseudo-loader.
It allows to run standalone (written in C) applications:
http://www.nwpi.ru/~alec/mips/yamon_test_salone.tgz
$ qemu-system-mipsel -nographic -M malta -kernel yamon_test.elf
Could not configure '/dev/rtc' to have a 1024
Thiemo Seufer [EMAIL PROTECTED] wrote:
For the AR7 case, could you
- add AR7 as a CPU type
- handle the interesting cases for AR7 only, after verifying the
cornercase behaviour of qemu and real hardware is consistent.
AFAIK, Texas Instrument AR7 isn't a CPU. It's a SoC which
combines
Hi!
This patch replaces hardcoded MIPS Malta bootloader with soft version.
This preserves ROM area clean. Also it initializes MIPS $sp register as
YAMON does.
The GPR values before execution:
=== less /tmp/qemu.log ===
pc=0x80294040
Johannes Schindelin [EMAIL PROTECTED] wrote:
Did anyone try the latest CVS qemu on Cygwin ?
AFAICT this is due to SDL. I did not succeed in compiling any SDL related
stuff in cygwin, but then, I did not really try, since the MinGW
compilation is easy enough.
I've successfully compiled
Aurelien Jarno [EMAIL PROTECTED] wrote:
Then after playing with the current code, I am sure we are missing a
simple interrupt controller for the MIPS CPU. It supports 6 hardware
interrupts (IP2 to IP7) and we are using two of them in the current
emulation: one for the i8259a and the other for
Aurelien Jarno [EMAIL PROTECTED] wrote:
This patch changes the 82371SB PCI-to-ISA bridge into a 82371EB.
Note that the ACPI controller
implemented in QEMU is already a 82371EB.
Shouldn't we also change all piix3 names to piix4 ?
[qemu]$ find . -type f | xargs grep piix3 | wc -l
18
--
Hi!
This patch corrects mips*_bios.bin names.
It allows to use arbitrary BIOS file size also.
--
-=AV=-
mips_bios.patch
Description: Binary data
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Thiemo Seufer [EMAIL PROTECTED] wrote:
AFAICS the output interferes with the serial console output.
I wonder how the typical scrolling text Linux on MALTA would look
like in that case. :-)
What about starting with the core of the new machine description before
submitting the unconnected
Hi!
This patch separates MIPS CPU timer and R4K machine, please review.
It's required to add a new MIPS machines.
--
-=AV=-
mipstimer.diff
Description: Binary data
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Alexander Voropay wrote:
I'm still trying to run a MIPS mmon as a BIOS :)
I've found one strange issue : when it runs at the
KSEG0 region (0x80008000) with -kernel option it works fine.
When I'm trying to run it in the MIPS BIOS region (0xbfc0)
it can't output anything to the UART and Qemu
Hi!
The current CVS QEMU Makefile builds qemu-system-mips
binary which really emulates a little-endian system and should be
renamed to the qemu-system-mipsel
[EMAIL PROTECTED] qemu/bin]$ ls
qemuqemu-i386 qemu-mipsel qemu-sparcqemu-system-ppc
qemu-armqemu-img qemu-ppc
Alexander Voropay [EMAIL PROTECTED] wrote:
Another issue:
IN:
0xbfc00424: mtc0 zero,$13
0x0001: raise_exception 0x11
The problem is a code *before* this :
==
mfc0v0,C0_SR
and v0,SR_SR# preserve Soft Reset
or v0,SR_BEV
Thiemo Seufer [EMAIL PROTECTED] wrote:
The Qemu has a bug there. The See MIPS Run p.51 states:
A patch which doesn't negate the HFLAGS_UM check fixes this and was
posted here a while ago.
Thx, found.
http://lists.gnu.org/archive/html/qemu-devel/2006-03/msg00148.html
Is it possible to push
Thiemo Seufer [EMAIL PROTECTED] wrote:
You could find my qemu.log there:
http://www.nwpi.ru/~alec/mips/qemu_log.txt
It goes into infinity exception loop.
I'm not quite sure why but you're getting a RI exception on the
address 0xbfc8 wich is the move k0, zero in the delay slot. I
don't
move k0, zero
j0xbfc00400
nop
Is the move implemented as addiu or as daddiu? The latter would RI.
Oh! It was daddu (gcc -mips3) opcode.
Another issue:
mtc0 zero, C0_CAUSE
===
IN:
0xbfc00424: mtc0 zero,$13
OP:
0x: save_pc 0xbfc00424
0x0001:
Dirk Behme [EMAIL PROTECTED] wrote:
See a http://pastebin.com/628591
Sorry, does this link really work? I get a nearly empty page for this.
Ah, pastebin keeps data only a day.
I'm working on something similiar, if you want to call an
embedded bootloader like uboot a BIOS ;) Anyway, I need
Thiemo Seufer [EMAIL PROTECTED] wrote:
cpu_mips_handle_mmu_fault pc 8001 ad 8001 rw 2
is_user 0 smmu 1
That comes not from the MIPS TLB mapping (which is for KSEG0/1 a fixed
translation involving the high bits) but the underlying qemu softmmu
support.
I'm trying to implement a
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