On 2/17/2014 6:50 AM, Mark Cave-Ayland wrote:
On 14/02/14 14:54, Peter Crosthwaite wrote:
The short answer is we don't know because we don't have any
documentation.
Sigh This has happened quite a lot lately.
If the kernel driver has macros, re-use them as much as possible. If
you
On 3/26/2013 12:24 PM, Artyom Tarasenko wrote:
On Tue, Mar 26, 2013 at 4:08 PM, Bob Breuer breu...@mc.net wrote:
On 3/26/2013 6:13 AM, Artyom Tarasenko wrote:
It looks like we will have more framebuffers beside TCX in the near future.
One way to use them would be to make new machines combining
On 3/27/2013 1:34 PM, Paolo Bonzini wrote:
- Messaggio originale -
Da: C.W. Betts computer...@hotmail.com
A: Paolo Bonzini pbonz...@redhat.com
Cc: qemu-devel@nongnu.org
Inviato: Mercoledì, 27 marzo 2013 19:05:46
Oggetto: Re: [patch]Make GTK build on OS X
On Mar 27, 2013, at
On 3/26/2013 6:13 AM, Artyom Tarasenko wrote:
It looks like we will have more framebuffers beside TCX in the near future.
One way to use them would be to make new machines combining a base
machine name with a framebuffer name, like ss5tcx and ss5cg3, but I
guess this would produce too many
On 5/1/2012 1:48 PM, Mark Cave-Ayland wrote:
On 01/05/12 07:57, Blue Swirl wrote:
Therefore I can't change it to my (modified) sbus_mmio_map() function
because it would break other non-SPARC platforms, and AIUI there is
nothing
in the memory API that allows me to move a subregion to a
The new tracetool has a problem with parsing parenthesis within the
format string. For example, add this line to trace-events:
test_paren(int n) (%d)
and you will get a failure when generating trace.h.
Bob
On 4/13/2012 6:25 AM, Pavel Dovgaluk wrote:
-Original Message-
From: Paolo Bonzini [mailto:pbonz...@redhat.com]
Sent: Thursday, April 12, 2012 8:57 PM
To: Stefan Weil
Cc: Kevin Wolf; 'qemu-devel'; Pavel Dovgaluk
Subject: Re: [Qemu-devel] Fiber switching and stack protection
Il
Kai Tietz wrote:
2011/10/24 Bob Breuer breu...@mc.net:
Kai Tietz wrote:
Hi,
For trunk-version I have a tentative patch for this issue. On 4.6.x
and older branches this doesn't work, as here we can't differenciate
that easy between ms- and sysv-abi.
But could somebody give this patch
Kai Tietz wrote:
Hi,
For trunk-version I have a tentative patch for this issue. On 4.6.x
and older branches this doesn't work, as here we can't differenciate
that easy between ms- and sysv-abi.
But could somebody give this patch a try?
Regards,
Kai
ChangeLog
*
Kai Tietz wrote:
2011/10/18 Bob Breuer breu...@mc.net:
Kai Tietz wrote:
2011/10/17 Bob Breuer breu...@mc.net:
Richard Henderson wrote:
On 10/17/2011 07:09 AM, Bob Breuer wrote:
Google finds a mention of longjmp failing with -fomit-frame-pointer:
http://lua-users.org/lists/lua-l/2005-02
Mark Cave-Ayland wrote:
On 17/10/11 05:39, Bob Breuer wrote:
I'm getting a segfault from qemu-system-sparc with the io thread enabled
on win32. This is with the latest mingw (gcc 4.6.1). mipsel also
fails, but i386 is ok. I haven't checked any of the other system
targets, but they might
Richard Henderson wrote:
On 10/17/2011 07:09 AM, Bob Breuer wrote:
I don't think this is a free/g_free issue. If I use the following
patch, then I at least get the openbios messages:
diff --git a/cpu-exec.c b/cpu-exec.c
index a9fa608..dfbd6ea 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
Kai Tietz wrote:
2011/10/17 Bob Breuer breu...@mc.net:
Richard Henderson wrote:
On 10/17/2011 07:09 AM, Bob Breuer wrote:
I don't think this is a free/g_free issue. If I use the following
patch, then I at least get the openbios messages:
diff --git a/cpu-exec.c b/cpu-exec.c
index a9fa608
I'm getting a segfault from qemu-system-sparc with the io thread enabled
on win32. This is with the latest mingw (gcc 4.6.1). mipsel also
fails, but i386 is ok. I haven't checked any of the other system
targets, but they might also show this problem.
git bisect points to commit cea5f9a
Mark Cave-Ayland wrote:
On 15/08/11 16:38, Bob Breuer wrote:
Depends on the rom. The SS-5 rom always sets it correctly, whereas the
SS-20 rom only sets it when you do boot net. Also, this is just the
top 8 bits of the address. The DMA2 documentation[1] for E_BASE_ADDR
states
Mark Cave-Ayland wrote:
On 11/08/11 17:11, Bob Breuer wrote:
The ledma base address defaults to 0xff00 on reset. This
fixes a bug with Solaris and SS-20 OBP when boot net is skipped.
Signed-off-by: Bob Breuerbreu...@mc.net
---
diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c
index
/hw/dbri.c
new file mode 100644
index 000..46f21e4
--- /dev/null
+++ b/hw/dbri.c
@@ -0,0 +1,1342 @@
+/*
+ * QEMU DBRI audio interface
+ *
+ * Copyright (c) 2011 Bob Breuer
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated
The ledma base address defaults to 0xff00 on reset. This
fixes a bug with Solaris and SS-20 OBP when boot net is skipped.
Signed-off-by: Bob Breuer breu...@mc.net
---
diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c
index e75694b..61812fb 100644
--- a/hw/sparc32_dma.c
+++ b/hw/sparc32_dma.c
Avi Kivity wrote:
Also related chips.
Reviewed-by: Richard Henderson r...@twiddle.net
Reviewed-by: Anthony Liguori aligu...@us.ibm.com
Signed-off-by: Avi Kivity a...@redhat.com
---
hw/lance.c | 31 ++-
hw/pcnet-pci.c | 74
Blue Swirl wrote:
cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memory
access handling. Fix them by always passing CPUState to the handlers.
Reported-by: Hervé Poussineau hpous...@reactos.org
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
v2: don't try to restore
are not affected.
Fix by restoring AREG0 on exit. Remove excess saving by
do_unassigned_access() functions.
Also ignore unassigned accesses outside of CPU context.
Reported-by: Bob Breuer breu...@mc.net
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
target-sparc/op_helper.c | 25
Super Bisquit wrote:
...
It builds, doesn't run. More like it runs and hangs.
$ qemu-system-sparc -cpu LEON3 -hda test.img -cdrom
Downloads/debian-6.0.2.1-sparc-businesscard.iso -m 256 -boot d
That command line won't work. OpenBIOS doesn't support LEON, and the
last version of Debian
Artyom Tarasenko wrote:
On Mon, Jan 10, 2011 at 10:39 PM, Blue Swirl blauwir...@gmail.com wrote:
On Mon, Jan 10, 2011 at 3:57 AM, Bob Breuer breu...@mc.net wrote:
Blue Swirl wrote:
On Mon, Nov 8, 2010 at 6:55 PM, Artyom Tarasenko atar4q...@gmail.com
wrote
Blue Swirl wrote:
On Mon, Nov 8, 2010 at 6:55 PM, Artyom Tarasenko atar4q...@gmail.com wrote:
On Fri, May 7, 2010 at 6:26 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
phys_page_find (exec.c) returns sometimes a page for addresses where
nothing is connected.
One example,
Also trace the extra registers, and update the comments with new
info from Artyom Tarasenko.
Signed-off-by: Bob Breuer breu...@mc.net
---
Since the extra registers are aliased, we could instead alias them at
a higher level. Solaris9 boots to single-user with either option.
diff --git a/hw
Artyom Tarasenko wrote:
On Sun, Dec 19, 2010 at 8:37 PM, Bob Breuer breu...@mc.net wrote:
Andreas Färber wrote:
Am 18.12.2010 um 19:53 schrieb Blue Swirl:
On Sat, Dec 18, 2010 at 5:09 PM, Bob Breuer breu...@mc.net wrote:
ledma has 0x20 bytes of registers according
Andreas Färber wrote:
Am 18.12.2010 um 19:53 schrieb Blue Swirl:
On Sat, Dec 18, 2010 at 5:09 PM, Bob Breuer breu...@mc.net wrote:
ledma has 0x20 bytes of registers according to OBP, and at least
Solaris9
reads the 5th register which is beyond what we've mapped. So let's
setup
a flag
Also trace the extra registers, and call them undocumented instead.
Signed-off-by: Bob Breuer breu...@mc.net
diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c
index 56be8c8..0325a55 100644
--- a/hw/sparc32_dma.c
+++ b/hw/sparc32_dma.c
@@ -170,7 +170,9 @@ static uint32_t dma_mem_readl(void *opaque
-by: Bob Breuer breu...@mc.net
---
hw/sparc32_dma.c | 15 ++-
hw/sun4m.c | 16 +---
2 files changed, 23 insertions(+), 8 deletions(-)
diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c
index e78f025..56be8c8 100644
--- a/hw/sparc32_dma.c
+++ b/hw/sparc32_dma.c
Blue Swirl wrote:
ESP and Lance DMA controllers are not identical.
Separate the controllers on VMState and instantiation level.
NB: This change breaks savevm and migration compatibility.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
Perhaps the compat properties could be used to
Forget this. My test was flawed because I still wasn't comparing apples
to apples. I was comparing the pre-bootloader state to the
post-bootloader state, and it seems that OBP, even on a real machine,
shows all the registers as zero before it runs any program.
However, I still think there's
Blue Swirl wrote:
On Sun, Dec 12, 2010 at 12:17 AM, Bob Breuer breu...@mc.net wrote:
Under qemu-system-sparc, I found a problem with OBP's psr commands.
On an real SS-20, I get:
ok .psr
CWP: 4 ET: 1 PS: 1 S: 1 PIL: f EF: 1 EC: 0 ICC: nZvc VER: 0
IMPL: 4
ok %psr
Under qemu-system-sparc, I found a problem with OBP's psr commands.
On an real SS-20, I get:
ok .psr
CWP: 4 ET: 1 PS: 1 S: 1 PIL: f EF: 1 EC: 0 ICC: nZvc VER: 0
IMPL: 4
ok %psr .
40401fe4
But with qemu, it all shows up as 0, such as:
ok .psr
CWP: 0 ET: 0 PS: 0
Use empty_slot to reserve addresses for several unimplemented devices so they
won't fault.
- BPP (parallel port), DBRI (audio), SX (pixel processor), and vsimms
(framebuffer)
OBP for SS-20 either assumes these devices exist or probes without expecting
faults.
Signed-off-by: Bob Breuer breu
) 2010 Bob Breuer breu...@mc.net
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy
Blue Swirl wrote:
On Fri, Jun 4, 2010 at 5:40 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/5/27 Bob Breuer breu...@mc.net:
+/* DBRI (audio) */
+cpu_register_physical_memory_offset(0xEE0001000ULL, 0x1,
bad_mem, 0xE0001000);
Please add a new DBRI
Artyom Tarasenko wrote:
2010/5/28 Blue Swirl blauwir...@gmail.com:
On Fri, May 28, 2010 at 7:54 AM, Bob Breuer breu...@mc.net wrote:
Artyom Tarasenko wrote:
2010/5/27 Bob Breuer breu...@mc.net:
Artyom Tarasenko wrote:
Was going to put some more empty
Artyom Tarasenko wrote:
2010/5/27 Bob Breuer breu...@mc.net:
Artyom Tarasenko wrote:
Was going to put some more empty slots into SS-10/20 (VSIMMs, SX)
after we are done with SS-5 (due to technical limitations I can switch
access from one real SS model to another one once a few days
Artyom Tarasenko wrote:
Was going to put some more empty slots into SS-10/20 (VSIMMs, SX)
after we are done with SS-5 (due to technical limitations I can switch
access from one real SS model to another one once a few days only).
I have a partial implementation of the SS-20 VSIMM (cg14) that
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