[Qemu-devel] [RFC PATCH 08/11] zynqmp_crf: fix against AF_EX32 changes

From: KONRAD Frederic This seems to be due to a difference between the AF_EX32 define. Signed-off-by: KONRAD Frederic --- hw/misc/xilinx_zynqmp_crf.c | 354 ++-- 1 file changed, 177 insertions(+),

[Qemu-devel] [RFC PATCH 00/11] Clock framework API.

ref" 0.0 qemu-clk "dbg_tstmp" 0.0 mmio fd1a/010c This series is based on the current master (d6550e9ed2e1a60d889dfb721de00d9a4e3bafbe) with the data-driven register patch-set from Alistair. Note that the omap clock infrastructure is really far fro

[Qemu-devel] [RFC PATCH 01/11] qemu-clk: introduce qemu-clk qom object

From: KONRAD Frederic This introduces qemu-clk qom object. Signed-off-by: KONRAD Frederic --- Makefile.objs | 1 + include/qemu/qemu-clock.h | 40 qemu-clock.c | 47

[Qemu-devel] [RFC PATCH 05/11] docs: add qemu-clock documentation

From: KONRAD Frederic This adds the qemu-clock documentation. Signed-off-by: KONRAD Frederic --- docs/clock.txt | 112 + 1 file changed, 112 insertions(+) create mode 100644

[Qemu-devel] [RFC PATCH 06/11] introduce fixed-clock

From: KONRAD Frederic This is a fixed clock device. It justs behave as an empty device with a parametrable output rate. Signed-off-by: KONRAD Frederic --- hw/misc/Makefile.objs | 2 + hw/misc/fixed-clock.c | 87

[Qemu-devel] [PATCH V10 7/9] introduce xlnx-dpdma

From: KONRAD Frederic This is the implementation of the DPDMA. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun Kwon --- hw/dma/Makefile.objs| 1 +

[Qemu-devel] [PATCH V10 8/9] introduce xlnx-dp

From: KONRAD Frederic This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid. Graphic plane is connected to the channel 3. Video plane is connected to the channel 0. Audio stream are connected to the channels 4 and 5. Signed-off-by:

[Qemu-devel] [PATCH V10 5/9] introduce dpcd module

From: KONRAD Frederic This introduces dpcd module. It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter

[Qemu-devel] [PATCH V10 9/9] arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma

From: KONRAD Frederic This adds the DP and the DPDMA to the Zynq MP platform. Signed-off-by: KONRAD Frederic Reviewed-by: Peter Crosthwaite Reviewed-by: Alistair Francis

[Qemu-devel] [PATCH V10 6/9] hw/i2c-ddc.c: Implement DDC I2C slave

From: Peter Maydell Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell - Rebased on the current master. - Modified for QOM. Signed-off-by: KONRAD Frederic

[Qemu-devel] [PATCH V10 3/9] i2c: Factor our send() and recv() common logic

From: Peter Crosthwaite Most of the control flow logic between send and recv (error checking etc) is the same. Factor this out into a common send_recv() API. This is then usable by clients, where the control logic for send and receive differs only by a boolean. E.g.

[Qemu-devel] [PATCH V10 4/9] introduce aux-bus

From: KONRAD Frederic This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD Frederic Tested-By: Hyun Kwon

[Qemu-devel] [PATCH V10 1/9] i2cbus: remove unused dev field

From: KONRAD Frederic The dev field in i2cbus is not used. So just drop it. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite Tested-By:

[Qemu-devel] [PATCH V10 0/9] Xilinx DisplayPort.

my-clk driver in the kernel. It's a clock which does nothing but fakes a clock such that the DPDMA driver works. The patch will be send separately. * The graphic plane works on channel 3, video on channel 0 and audios on channel 4 and 5. Thanks, Fred v9 -> V10 changes: *

[Qemu-devel] [PATCH V10 2/9] i2c: implement broadcast write

From: KONRAD Frederic This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite

[Qemu-devel] [PATCH V9 9/9] arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma

From: KONRAD Frederic This adds the DP and the DPDMA to the Zynq MP platform. Signed-off-by: KONRAD Frederic Reviewed-by: Peter Crosthwaite Reviewed-by: Alistair Francis

[Qemu-devel] [PATCH V9 0/9] Xilinx DisplayPort.

driver in the kernel. It's a clock which does nothing but fakes a clock such that the DPDMA driver works. The patch will be send separately. * The graphic plane works on channel 3, video on channel 0 and audios on channel 4 and 5. Thanks, Fred V8 -> V9 changes: * globally: * Rebased on curre

[Qemu-devel] [PATCH V9 7/9] introduce xlnx-dpdma

From: KONRAD Frederic This is the implementation of the DPDMA. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun Kwon --- hw/dma/Makefile.objs| 1 +

[Qemu-devel] [PATCH V9 2/9] i2c: implement broadcast write

From: KONRAD Frederic This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite

[Qemu-devel] [PATCH V9 8/9] introduce xlnx-dp

From: KONRAD Frederic This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid. Graphic plane is connected to the channel 3. Video plane is connected to the channel 0. Audio stream are connected to the channels 4 and 5. Signed-off-by:

[Qemu-devel] [PATCH V9 3/9] i2c: Factor our send() and recv() common logic

From: Peter Crosthwaite Most of the control flow logic between send and recv (error checking etc) is the same. Factor this out into a common send_recv() API. This is then usable by clients, where the control logic for send and receive differs only by a boolean. E.g.

[Qemu-devel] [PATCH V9 5/9] introduce dpcd module

From: KONRAD Frederic This introduces dpcd module. It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter

[Qemu-devel] [PATCH V9 1/9] i2cbus: remove unused dev field

From: KONRAD Frederic The dev field in i2cbus is not used. So just drop it. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite Tested-By:

[Qemu-devel] [PATCH V9 6/9] hw/i2c-ddc.c: Implement DDC I2C slave

From: Peter Maydell Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell - Rebased on the current master. - Modified for QOM. Signed-off-by: KONRAD Frederic

[Qemu-devel] [PATCH V9 4/9] introduce aux-bus

From: KONRAD Frederic This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD Frederic Tested-By: Hyun Kwon

[Qemu-devel] [PATCH V8 8/9] introduce xlnx-dp

From: KONRAD Frederic This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid. Graphic plane is connected to the channel 3. Video plane is connected to the channel 0. Audio stream are connected to the channels 4 and 5. Signed-off-by:

[Qemu-devel] [PATCH V8 5/9] introduce dpcd module

From: KONRAD Frederic This introduces dpcd module. It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter

[Qemu-devel] [PATCH V8 1/9] i2cbus: remove unused dev field

From: KONRAD Frederic The dev field in i2cbus is not used. So just drop it. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite Tested-By:

[Qemu-devel] [PATCH V8 7/9] introduce xlnx-dpdma

From: KONRAD Frederic This is the implementation of the DPDMA. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun Kwon --- hw/dma/Makefile.objs| 1 +

[Qemu-devel] [PATCH V8 3/9] i2c: Factor our send() and recv() common logic

From: Peter Crosthwaite Most of the control flow logic between send and recv (error checking etc) is the same. Factor this out into a common send_recv() API. This is then usable by clients, where the control logic for send and receive differs only by a boolean. E.g.

[Qemu-devel] [PATCH V8 0/9] Xilinx DisplayPort.

driver in the kernel. It's a clock which does nothing but fakes a clock such that the DPDMA driver works. The patch will be send separately. * The graphic plane works on channel 3, video on channel 0 and audios on channel 4 and 5. Thanks, Fred V7 -> V8 changes: * globally: * Rebased on curre

[Qemu-devel] [PATCH V8 9/9] arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma

From: KONRAD Frederic This adds the DP and the DPDMA to the Zynq MP platform. Signed-off-by: KONRAD Frederic Reviewed-by: Peter Crosthwaite Reviewed-by: Alistair Francis

[Qemu-devel] [PATCH V8 6/9] hw/i2c-ddc.c: Implement DDC I2C slave

From: Peter Maydell Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell - Rebased on the current master. - Modified for QOM. Signed-off-by: KONRAD Frederic

[Qemu-devel] [PATCH V8 4/9] introduce aux-bus

From: KONRAD Frederic This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD Frederic Tested-By: Hyun Kwon

[Qemu-devel] [PATCH V8 2/9] i2c: implement broadcast write

From: KONRAD Frederic This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite

[Qemu-devel] [PATCH V7 1/9] i2cbus: remove unused dev field

From: KONRAD Frederic The dev field in i2cbus is not used. So just drop it. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite Tested-By:

[Qemu-devel] [PATCH V7 2/9] i2c: implement broadcast write

From: KONRAD Frederic This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite

[Qemu-devel] [PATCH V7 3/9] i2c: Factor our send() and recv() common logic

From: Peter Crosthwaite Most of the control flow logic between send and recv (error checking etc) is the same. Factor this out into a common send_recv() API. This is then usable by clients, where the control logic for send and receive differs only by a boolean. E.g.

[Qemu-devel] [PATCH V7 4/9] introduce aux-bus

From: KONRAD Frederic This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD Frederic Tested-By: Hyun Kwon

[Qemu-devel] [PATCH V7 5/9] introduce dpcd module

From: KONRAD Frederic This introduces dpcd module. It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter

[Qemu-devel] [PATCH V7 9/9] arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma

From: KONRAD Frederic This adds the DP and the DPDMA to the Zynq MP platform. Signed-off-by: KONRAD Frederic Reviewed-by: Peter Crosthwaite Reviewed-by: Alistair Francis

[Qemu-devel] [PATCH V7 6/9] hw/i2c-ddc.c: Implement DDC I2C slave

From: Peter Maydell Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell - Rebased on the current master. - Modified for QOM. Signed-off-by: KONRAD Frederic

[Qemu-devel] [PATCH V7 7/9] introduce xlnx-dpdma

From: KONRAD Frederic This is the implementation of the DPDMA. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun Kwon --- hw/dma/Makefile.objs| 1 +

[Qemu-devel] [PATCH V7 8/9] introduce xlnx-dp

From: KONRAD Frederic This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid. Graphic plane is connected to the channel 3. Video plane is connected to the channel 0. Audio stream are connected to the channels 4 and 5. Signed-off-by:

[Qemu-devel] [PATCH V7 0/9] Xilinx DisplayPort.

driver in the kernel. It's a clock which does nothing but fakes a clock such that the DPDMA driver works. The patch will be send separately. * The graphic plane works on channel 3, video on channel 0 and audios on channel 4 and 5. Thanks, Fred V6 -> V7 changes: * globally: * Rebased on curre

[Qemu-devel] [PATCH V6 2/8] introduce aux-bus

From: KONRAD Frederic This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD Frederic Tested-By: Hyun Kwon

[Qemu-devel] [PATCH V6 3/8] i2c: implement broadcast write

From: KONRAD Frederic This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite

[Qemu-devel] [PATCH V6 1/8] i2cbus: remove unused dev field

From: KONRAD Frederic The dev field in i2cbus is not used. So just drop it. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter Crosthwaite Tested-By:

[Qemu-devel] [PATCH V6 4/8] introduce dpcd module

From: KONRAD Frederic This introduces dpcd module. It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Reviewed-by: Peter

[Qemu-devel] [PATCH V6 6/8] introduce xlnx-dpdma

From: KONRAD Frederic This is the implementation of the DPDMA. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun Kwon --- hw/dma/Makefile.objs| 1 +

[Qemu-devel] [PATCH V6 5/8] hw/i2c-ddc.c: Implement DDC I2C slave

From: Peter Maydell Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell - Rebased on the current master. - Modified for QOM. Signed-off-by: KONRAD Frederic

[Qemu-devel] [PATCH V6 0/8] Xilinx DisplayPort.

kernel. It's a clock which does nothing but fakes a clock such that the DPDMA driver works. The patch will be send separately. * The graphic plane works on channel 3, video on channel 0 and audios on channel 4 and 5. Thanks, Fred V5 -> V6 changes: * globally: * Rebased on curre

[Qemu-devel] [PATCH V6 8/8] arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma

From: KONRAD Frederic This adds the DP and the DPDMA to the Zynq MP platform. Signed-off-by: KONRAD Frederic Reviewed-by: Peter Crosthwaite Tested-By: Hyun Kwon --- hw/arm/xlnx-zynqmp.c

[Qemu-devel] [PATCH V6 7/8] introduce xlnx-dp

From: KONRAD Frederic This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid. Graphic plane is connected to the channel 3. Video plane is connected to the channel 0. Audio stream are connected to the channels 4 and 5. Signed-off-by:

[Qemu-devel] [PATCH V5 2/8] introduce aux-bus

From: KONRAD Frederic This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD Frederic Tested-By: Hyun Kwon

[Qemu-devel] [PATCH V5 4/8] introduce dpcd module

From: KONRAD Frederic This introduces dpcd module. It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun

[Qemu-devel] [PATCH V5 8/8] arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma

From: KONRAD Frederic This adds the DP and the DPDMA to the Zynq MP platform. Signed-off-by: KONRAD Frederic Reviewed-by: Peter Crosthwaite Tested-By: Hyun Kwon --- hw/arm/xlnx-zynqmp.c

[Qemu-devel] [PATCH V5 7/8] introduce xlnx-dp

From: KONRAD Frederic This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid. Graphic plane is connected to the channel 3. Video plane is connected to the channel 0. Audio stream are connected to the channels 4 and 5. Signed-off-by:

[Qemu-devel] [PATCH V5 6/8] introduce xlnx-dpdma

From: KONRAD Frederic This is the implementation of the DPDMA. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun Kwon --- hw/dma/Makefile.objs| 1 +

[Qemu-devel] [PATCH V5 5/8] hw/i2c-ddc.c: Implement DDC I2C slave

From: Peter Maydell Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell - Rebased on the current master. - Modified for QOM. Signed-off-by: KONRAD Frederic

[Qemu-devel] [PATCH V5 0/8] Xilinx DisplayPort.

dummy-clk driver in the kernel. It's a clock which does nothing but fakes a clock such that the DPDMA driver works. The patch will be send separately. * The graphic plane works on channel 3, video on channel 0 and audios on channel 4 and 5. Thanks, Fred V4 -> V5 changes: * aux:

[Qemu-devel] [PATCH V5 3/8] i2c: implement broadcast write

From: KONRAD Frederic This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun Kwon ---

[Qemu-devel] [PATCH V5 1/8] i2cbus: remove unused dev field

From: KONRAD Frederic The dev field in i2cbus is not used. So just drop it. Signed-off-by: KONRAD Frederic Reviewed-by: Alistair Francis Tested-By: Hyun Kwon --- hw/i2c/core.c | 1 - 1

[Qemu-devel] [RFC PATCH V7 18/19] mttcg: signal the associated cpu anyway.

From: KONRAD Frederic fred.kon...@greensocs.com We might have a race here. If current_cpu is about to be set then cpu_exit won't be called and we don't exit TCG. This was probably an issue with old implementation as well. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- cpus.c | 3

[Qemu-devel] [RFC PATCH V7 13/19] add a callback when tb_invalidate is called.

From: KONRAD Frederic fred.kon...@greensocs.com Instead of doing the jump cache invalidation directly in tb_invalidate delay it after the exit so we don't have an other CPU trying to execute the code being invalidated. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- translate-all.c

[Qemu-devel] [RFC PATCH V7 15/19] arm: use tlb_flush*_all

From: KONRAD Frederic fred.kon...@greensocs.com This just use the new mechanism to ensure that each VCPU thread flush its own VCPU. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- target-arm/helper.c | 45 +++-- 1 file changed, 7

[Qemu-devel] [RFC PATCH V7 11/19] tcg: switch on multithread.

From: KONRAD Frederic fred.kon...@greensocs.com This switches on multithread. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com Changes V5 - V6: * make qemu_cpu_kick calling qemu_cpu_kick_thread in case of TCG. --- cpus.c | 93

[Qemu-devel] [RFC PATCH V7 06/19] add support for spin lock on POSIX systems exclusively

From: Guillaume Delbergue guillaume.delber...@greensocs.com WARNING: spin lock is currently not implemented on WIN32 Signed-off-by: Guillaume Delbergue guillaume.delber...@greensocs.com --- include/qemu/thread-posix.h | 4 include/qemu/thread-win32.h | 4 include/qemu/thread.h

[Qemu-devel] [RFC PATCH V7 03/19] cpus: introduce async_run_safe_work_on_cpu.

From: KONRAD Frederic fred.kon...@greensocs.com We already had async_run_on_cpu but we need all VCPUs outside their execution loop to execute some tb_flush/invalidate task: async_run_on_cpu_safe schedule a work on a VCPU but the work start when no more VCPUs are executing code. When a safe work

[Qemu-devel] [RFC PATCH V7 10/19] cpu: remove exit_request global.

From: KONRAD Frederic fred.kon...@greensocs.com This removes exit_request global and adds a variable in CPUState for this. Only the flag for the first cpu is used for the moment as we are still with one TCG thread. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- cpu-exec.c | 15

[Qemu-devel] [RFC PATCH V7 19/19] target-arm/psci.c: wake up sleeping CPUs (MTTCG)

From: Alex Bennée alex.ben...@linaro.org Testing with Alexander's bare metal syncronisation tests fails in MTTCG leaving one CPU spinning forever waiting for the second CPU to wake up. We simply need to poke the halt_cond once we have processed the PSCI power on call. Tested-by: Alex Bennée

[Qemu-devel] [RFC PATCH V7 14/19] cpu: introduce tlb_flush*_all.

From: KONRAD Frederic fred.kon...@greensocs.com Some architectures allow to flush the tlb of other VCPUs. This is not a problem when we have only one thread for all VCPUs but it definitely needs to be an asynchronous work when we are in true multithreaded work. TODO: Some test case, I fear some

[Qemu-devel] [RFC PATCH V7 16/19] translate-all: introduces tb_flush_safe.

From: KONRAD Frederic fred.kon...@greensocs.com tb_flush is not thread safe we definitely need to exit VCPUs to do that. This introduces tb_flush_safe which just creates an async safe work which will do a tb_flush later. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com ---

[Qemu-devel] [RFC PATCH V7 09/19] Drop global lock during TCG code execution

:17.03 qemu-system-arm We don't benefit significantly, though, when the guest is not fully loading a host CPU. Note that this patch depends on http://thread.gmane.org/gmane.comp.emulators.qemu/118657 Changes from Fred Konrad: * Rebase on the current HEAD. * Fixes a deadlock

[Qemu-devel] [RFC PATCH V7 07/19] protect TBContext with tb_lock.

From: KONRAD Frederic fred.kon...@greensocs.com This protects TBContext with tb_lock to make tb_* thread safe. We can still have issue with tb_flush in case of multithread TCG: An other CPU can be executing code during a flush. This can be fixed later by making all other TCG thread exiting

[Qemu-devel] [RFC PATCH V7 00/19] Multithread TCG.

From: KONRAD Frederic fred.kon...@greensocs.com This is the 7th round of the MTTCG patch series. It can be cloned from: g...@git.greensocs.com:fkonrad/mttcg.git branch multi_tcg_v7. This patch-set try to address the different issues in the global picture of MTTCG, presented on the wiki. ==

[Qemu-devel] [RFC PATCH V7 05/19] remove unused spinlock.

From: KONRAD Frederic fred.kon...@greensocs.com This just removes spinlock as it is not used anymore. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com Changes V6 - V7: * Drop the checkpatch part. --- include/exec/spinlock.h | 49 - 1

[Qemu-devel] [RFC PATCH V7 01/19] cpus: protect queued_work_* with work_mutex.

From: KONRAD Frederic fred.kon...@greensocs.com This protects queued_work_* used by async_run_on_cpu, run_on_cpu and flush_queued_work with a new lock (work_mutex) to prevent multiple (concurrent) access. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com Reviewed-by: Alex Bennée

[Qemu-devel] [RFC PATCH V7 02/19] cpus: add tcg_exec_flag.

From: KONRAD Frederic fred.kon...@greensocs.com This flag indicates the state of the VCPU thread: * 0 if the VCPU is allowed to execute code. * 1 if the VCPU is currently executing code. * -1 if the VCPU is not allowed to execute code. This allows to atomically check and run safe work or

[Qemu-devel] [RFC PATCH V7 12/19] Use atomic cmpxchg to atomically check the exclusive value in a STREX

From: KONRAD Frederic fred.kon...@greensocs.com This mechanism replaces the existing load/store exclusive mechanism which seems to be broken for multithread. It follows the intention of the existing mechanism and stores the target address and data values during a load operation and checks that

[Qemu-devel] [RFC PATCH V7 08/19] tcg: remove tcg_halt_cond global variable.

From: KONRAD Frederic fred.kon...@greensocs.com This removes tcg_halt_cond global variable. We need one QemuCond per virtual cpu for multithread TCG. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- cpus.c | 18 +++--- 1 file changed, 7 insertions(+), 11 deletions(-)

[Qemu-devel] [RFC PATCH V7 04/19] replace spinlock by QemuMutex.

From: KONRAD Frederic fred.kon...@greensocs.com spinlock is only used in two cases: * cpu-exec.c: to protect TranslationBlock * mem_helper.c: for lock helper in target-i386 (which seems broken). It's a pthread_mutex_t in user-mode so better using QemuMutex directly in this case. It allows as

[Qemu-devel] [RFC PATCH V7 17/19] translate-all: (wip) use tb_flush_safe when we can't alloc more tb.

From: KONRAD Frederic fred.kon...@greensocs.com This changes just the tb_flush called from tb_alloc. TODO: * changes the other tb_flush. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- translate-all.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Qemu-devel] [PATCH V4 7/8] Introduce xilinx dp.

From: KONRAD Frederic fred.kon...@greensocs.com This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid . Graphic plane is connected to the channel 3. Video plane is connected to the channel 0. Audio stream are connected to the channels 4 and 5. Signed-off-by:

[Qemu-devel] [PATCH V4 6/8] Introduce xilinx dpdma.

From: KONRAD Frederic fred.kon...@greensocs.com This is the implementation of the DPDMA. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- hw/dma/Makefile.objs | 1 + hw/dma/xlnx_dpdma.c | 790 +++ hw/dma/xlnx_dpdma.h | 85 ++

[Qemu-devel] [PATCH V4 5/8] hw/i2c-ddc.c: Implement DDC I2C slave

From: Peter Maydell peter.mayd...@linaro.org Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell peter.mayd...@linaro.org - Rebased on the current master. - Modified for QOM. Signed-off-by: KONRAD Frederic

[Qemu-devel] [PATCH V4 2/8] Introduce AUX bus.

From: KONRAD Frederic fred.kon...@greensocs.com This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- default-configs/aarch64-softmmu.mak

[Qemu-devel] [PATCH V4 1/8] i2cbus: remove unused dev field.

From: KONRAD Frederic fred.kon...@greensocs.com Seems this field is not needed. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- hw/i2c/core.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/i2c/core.c b/hw/i2c/core.c index 5a64026..e0f92de 100644 --- a/hw/i2c/core.c +++

[Qemu-devel] [PATCH V4 4/8] introduce dpcd module.

From: KONRAD Frederic fred.kon...@greensocs.com This introduces a DPCD module. It wires on a aux-bus and can be accessed by driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- default-configs/aarch64-softmmu.mak | 1 + hw/display/Makefile.objs

[Qemu-devel] [PATCH V4 3/8] i2c: implement broadcast write.

From: KONRAD Frederic fred.kon...@greensocs.com This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- hw/i2c/core.c | 130 ++ 1 file changed, 76

[Qemu-devel] [PATCH V4 0/8] Xilinx DisplayPort.

in the kernel. It's a clock which does nothing but fakes a clock such that the DPDMA driver works. The patch will be send separately. * The graphic plane works on channel 3, video on channel 0 and audios on channel 4 and 5. Thanks, Fred V3 - V4 changes: * xlnx_dpdma: * Initialize

[Qemu-devel] [PATCH V4 8/8] arm: xlnx-zynqmp: Add DisplayPort and DPDMA.

From: KONRAD Frederic fred.kon...@greensocs.com This adds the DP and the DPDMA to the Zynq MP. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com Reviewed-by: Peter Crosthwaite peter.crosthwa...@xilinx.com --- hw/arm/xlnx-zynqmp.c | 20

[Qemu-devel] [RFC PATCH V3 0/3] Multithread TCG async_safe_work part.

From: KONRAD Frederic fred.kon...@greensocs.com This is the async_safe_work introduction bit of the Multithread TCG work. Rebased on current upstream (6169b60285fe1ff730d840a49527e721bfb30899). (Currently untested as I need to rebase MTTCG first.) It can be cloned here:

[Qemu-devel] [RFC PATCH V3 1/3] cpus: protect queued_work_* with work_mutex.

From: KONRAD Frederic fred.kon...@greensocs.com This protects queued_work_* used by async_run_on_cpu, run_on_cpu and flush_queued_work with a new lock (work_mutex) to prevent multiple (concurrent) access. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com Changes V1 - V2: * Unlock the

[Qemu-devel] [RFC PATCH V3 2/3] cpus: add tcg_exec_flag.

From: KONRAD Frederic fred.kon...@greensocs.com This flag indicates the state of the VCPU thread: * 0 if the VCPU is allowed to execute code. * 1 if the VCPU is currently executing code. * -1 if the VCPU is not allowed to execute code. This allows to atomically check and run safe work or

[Qemu-devel] [RFC PATCH V3 3/3] cpus: introduce async_run_safe_work_on_cpu.

From: KONRAD Frederic fred.kon...@greensocs.com We already had async_run_on_cpu but we need all VCPUs outside their execution loop to execute some tb_flush/invalidate task: async_run_on_cpu_safe schedule a work on a VCPU but the work start when no more VCPUs are executing code. When a safe work

[Qemu-devel] [RFC PATCH 3/3] cpus: introduce async_run_safe_work_on_cpu.

From: KONRAD Frederic fred.kon...@greensocs.com We already had async_run_on_cpu but we need all VCPUs outside their execution loop to execute some tb_flush/invalidate task: async_run_on_cpu_safe schedule a work on a VCPU but the work start when no more VCPUs are executing code. When a safe work

[Qemu-devel] [RFC PATCH 0/3] Multithread TCG async_safe_work part.

From: KONRAD Frederic fred.kon...@greensocs.com This is the async_safe_work introduction bit of the Multithread TCG work. Rebased on current upstream (6169b60285fe1ff730d840a49527e721bfb30899). It can be cloned here: http://git.greensocs.com/fkonrad/mttcg.git branch async_work The first patch

[Qemu-devel] [RFC PATCH 2/3] cpus: add a tcg_executing flag.

From: KONRAD Frederic fred.kon...@greensocs.com This flag indicates if the VCPU is currently executing TCG code. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com Changes V1 - V2: * do both tcg_executing = 0 or 1 in cpu_exec(). --- cpu-exec.c| 2 ++ include/qom/cpu.h | 3 +++

[Qemu-devel] [RFC PATCH V2 3/3] cpus: introduce async_run_safe_work_on_cpu.

From: KONRAD Frederic fred.kon...@greensocs.com We already had async_run_on_cpu but we need all VCPUs outside their execution loop to execute some tb_flush/invalidate task: async_run_on_cpu_safe schedule a work on a VCPU but the work start when no more VCPUs are executing code. When a safe work

<    1   2   3   4   5   6   7   8   9   >